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/drivers/net/wireless/iwmc3200wifi/eeprom.h

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t
C Header | 127 lines | 71 code | 17 blank | 39 comment | 0 complexity | 7faed96dda3307d79176718c5fbc121a MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1/*
  2 * Intel Wireless Multicomm 3200 WiFi driver
  3 *
  4 * Copyright (C) 2009 Intel Corporation. All rights reserved.
  5 *
  6 * Redistribution and use in source and binary forms, with or without
  7 * modification, are permitted provided that the following conditions
  8 * are met:
  9 *
 10 *   * Redistributions of source code must retain the above copyright
 11 *     notice, this list of conditions and the following disclaimer.
 12 *   * Redistributions in binary form must reproduce the above copyright
 13 *     notice, this list of conditions and the following disclaimer in
 14 *     the documentation and/or other materials provided with the
 15 *     distribution.
 16 *   * Neither the name of Intel Corporation nor the names of its
 17 *     contributors may be used to endorse or promote products derived
 18 *     from this software without specific prior written permission.
 19 *
 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 31 *
 32 *
 33 * Intel Corporation <ilw@linux.intel.com>
 34 * Samuel Ortiz <samuel.ortiz@intel.com>
 35 * Zhu Yi <yi.zhu@intel.com>
 36 *
 37 */
 38
 39#ifndef __IWM_EEPROM_H__
 40#define __IWM_EEPROM_H__
 41
 42enum {
 43	IWM_EEPROM_SIG = 0,
 44	IWM_EEPROM_FIRST = IWM_EEPROM_SIG,
 45	IWM_EEPROM_VERSION,
 46	IWM_EEPROM_OEM_HW_VERSION,
 47	IWM_EEPROM_MAC_VERSION,
 48	IWM_EEPROM_CARD_ID,
 49	IWM_EEPROM_RADIO_CONF,
 50	IWM_EEPROM_SKU_CAP,
 51	IWM_EEPROM_FAT_CHANNELS_CAP,
 52
 53	IWM_EEPROM_INDIRECT_OFFSET,
 54	IWM_EEPROM_CALIB_RXIQ_OFFSET = IWM_EEPROM_INDIRECT_OFFSET,
 55
 56	IWM_EEPROM_INDIRECT_DATA,
 57	IWM_EEPROM_CALIB_RXIQ = IWM_EEPROM_INDIRECT_DATA,
 58
 59	IWM_EEPROM_LAST,
 60};
 61
 62#define IWM_EEPROM_SIG_OFF                 0x00
 63#define IWM_EEPROM_VERSION_OFF            (0x54 << 1)
 64#define IWM_EEPROM_OEM_HW_VERSION_OFF     (0x56 << 1)
 65#define IWM_EEPROM_MAC_VERSION_OFF        (0x30 << 1)
 66#define IWM_EEPROM_CARD_ID_OFF            (0x5d << 1)
 67#define IWM_EEPROM_RADIO_CONF_OFF         (0x58 << 1)
 68#define IWM_EEPROM_SKU_CAP_OFF            (0x55 << 1)
 69#define IWM_EEPROM_CALIB_CONFIG_OFF       (0x7c << 1)
 70#define IWM_EEPROM_FAT_CHANNELS_CAP_OFF   (0xde << 1)
 71
 72#define IWM_EEPROM_SIG_LEN              4
 73#define IWM_EEPROM_VERSION_LEN          2
 74#define IWM_EEPROM_OEM_HW_VERSION_LEN   2
 75#define IWM_EEPROM_MAC_VERSION_LEN      1
 76#define IWM_EEPROM_CARD_ID_LEN          2
 77#define IWM_EEPROM_RADIO_CONF_LEN       2
 78#define IWM_EEPROM_SKU_CAP_LEN          2
 79#define IWM_EEPROM_FAT_CHANNELS_CAP_LEN 40
 80#define IWM_EEPROM_INDIRECT_LEN		2
 81
 82#define IWM_MAX_EEPROM_DATA_LEN         240
 83#define IWM_EEPROM_LEN                  0x800
 84
 85#define IWM_EEPROM_MIN_ALLOWED_VERSION          0x0610
 86#define IWM_EEPROM_MAX_ALLOWED_VERSION          0x0700
 87#define IWM_EEPROM_CURRENT_VERSION              0x0612
 88
 89#define IWM_EEPROM_SKU_CAP_BAND_24GHZ           (1 << 4)
 90#define IWM_EEPROM_SKU_CAP_BAND_52GHZ           (1 << 5)
 91#define IWM_EEPROM_SKU_CAP_11N_ENABLE           (1 << 6)
 92
 93#define IWM_EEPROM_FAT_CHANNELS 20
 94/* 2.4 gHz FAT primary channels: 1, 2, 3, 4, 5, 6, 7, 8, 9 */
 95#define IWM_EEPROM_FAT_CHANNELS_24 9
 96/* 5.2 gHz FAT primary channels: 36,44,52,60,100,108,116,124,132,149,157 */
 97#define IWM_EEPROM_FAT_CHANNELS_52 11
 98
 99#define IWM_EEPROM_FAT_CHANNEL_ENABLED (1 << 0)
100
101enum {
102	IWM_EEPROM_CALIB_CAL_HDR,
103	IWM_EEPROM_CALIB_TX_POWER,
104	IWM_EEPROM_CALIB_XTAL,
105	IWM_EEPROM_CALIB_TEMPERATURE,
106	IWM_EEPROM_CALIB_RX_BB_FILTER,
107	IWM_EEPROM_CALIB_RX_IQ,
108	IWM_EEPROM_CALIB_MAX,
109};
110
111#define IWM_EEPROM_CALIB_RXIQ_OFF	(IWM_EEPROM_CALIB_CONFIG_OFF + \
112					 (IWM_EEPROM_CALIB_RX_IQ << 1))
113#define IWM_EEPROM_CALIB_RXIQ_LEN	sizeof(struct iwm_lmac_calib_rxiq)
114
115struct iwm_eeprom_entry {
116	char *name;
117	u32 offset;
118	u32 length;
119};
120
121int iwm_eeprom_init(struct iwm_priv *iwm);
122void iwm_eeprom_exit(struct iwm_priv *iwm);
123u8 *iwm_eeprom_access(struct iwm_priv *iwm, u8 eeprom_id);
124int iwm_eeprom_fat_channels(struct iwm_priv *iwm);
125u32 iwm_eeprom_wireless_mode(struct iwm_priv *iwm);
126
127#endif