PageRenderTime 59ms CodeModel.GetById 26ms RepoModel.GetById 0ms app.codeStats 0ms

/drivers/video/backlight/tdo24m.c

https://bitbucket.org/slukk/jb-tsm-kernel-4.2
C | 477 lines | 393 code | 72 blank | 12 comment | 31 complexity | 587640a6d0e93555cb8b3ae7f45a490a MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1. /*
  2. * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
  3. *
  4. * Copyright (C) 2008 Marvell International Ltd.
  5. * Eric Miao <eric.miao@marvell.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * publishhed by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/device.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/tdo24m.h>
  17. #include <linux/fb.h>
  18. #include <linux/lcd.h>
  19. #include <linux/slab.h>
  20. #define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
  21. #define TDO24M_SPI_BUFF_SIZE (4)
  22. #define MODE_QVGA 0
  23. #define MODE_VGA 1
  24. struct tdo24m {
  25. struct spi_device *spi_dev;
  26. struct lcd_device *lcd_dev;
  27. struct spi_message msg;
  28. struct spi_transfer xfer;
  29. uint8_t *buf;
  30. int (*adj_mode)(struct tdo24m *lcd, int mode);
  31. int color_invert;
  32. int power;
  33. int mode;
  34. };
  35. /* use bit 30, 31 as the indicator of command parameter number */
  36. #define CMD0(x) ((0 << 30) | (x))
  37. #define CMD1(x, x1) ((1 << 30) | ((x) << 9) | 0x100 | (x1))
  38. #define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\
  39. ((x1) << 9) | 0x100 | (x2))
  40. #define CMD_NULL (-1)
  41. static uint32_t lcd_panel_reset[] = {
  42. CMD0(0x1), /* reset */
  43. CMD0(0x0), /* nop */
  44. CMD0(0x0), /* nop */
  45. CMD0(0x0), /* nop */
  46. CMD_NULL,
  47. };
  48. static uint32_t lcd_panel_on[] = {
  49. CMD0(0x29), /* Display ON */
  50. CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
  51. CMD0(0x11), /* Sleep out */
  52. CMD1(0xB0, 0x16), /* Wake */
  53. CMD_NULL,
  54. };
  55. static uint32_t lcd_panel_off[] = {
  56. CMD0(0x28), /* Display OFF */
  57. CMD2(0xB8, 0x80, 0x02), /* Output Control */
  58. CMD0(0x10), /* Sleep in */
  59. CMD1(0xB0, 0x00), /* Deep stand by in */
  60. CMD_NULL,
  61. };
  62. static uint32_t lcd_vga_pass_through_tdo24m[] = {
  63. CMD1(0xB0, 0x16),
  64. CMD1(0xBC, 0x80),
  65. CMD1(0xE1, 0x00),
  66. CMD1(0x36, 0x50),
  67. CMD1(0x3B, 0x00),
  68. CMD_NULL,
  69. };
  70. static uint32_t lcd_qvga_pass_through_tdo24m[] = {
  71. CMD1(0xB0, 0x16),
  72. CMD1(0xBC, 0x81),
  73. CMD1(0xE1, 0x00),
  74. CMD1(0x36, 0x50),
  75. CMD1(0x3B, 0x22),
  76. CMD_NULL,
  77. };
  78. static uint32_t lcd_vga_transfer_tdo24m[] = {
  79. CMD1(0xcf, 0x02), /* Blanking period control (1) */
  80. CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
  81. CMD1(0xd1, 0x01), /* CKV timing control on/off */
  82. CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
  83. CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
  84. CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
  85. CMD1(0xd5, 0x14), /* ASW timing control (2) */
  86. CMD0(0x21), /* Invert for normally black display */
  87. CMD0(0x29), /* Display on */
  88. CMD_NULL,
  89. };
  90. static uint32_t lcd_qvga_transfer[] = {
  91. CMD1(0xd6, 0x02), /* Blanking period control (1) */
  92. CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
  93. CMD1(0xd8, 0x01), /* CKV timing control on/off */
  94. CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
  95. CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
  96. CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
  97. CMD1(0xe0, 0x0a), /* ASW timing control (2) */
  98. CMD0(0x21), /* Invert for normally black display */
  99. CMD0(0x29), /* Display on */
  100. CMD_NULL,
  101. };
  102. static uint32_t lcd_vga_pass_through_tdo35s[] = {
  103. CMD1(0xB0, 0x16),
  104. CMD1(0xBC, 0x80),
  105. CMD1(0xE1, 0x00),
  106. CMD1(0x3B, 0x00),
  107. CMD_NULL,
  108. };
  109. static uint32_t lcd_qvga_pass_through_tdo35s[] = {
  110. CMD1(0xB0, 0x16),
  111. CMD1(0xBC, 0x81),
  112. CMD1(0xE1, 0x00),
  113. CMD1(0x3B, 0x22),
  114. CMD_NULL,
  115. };
  116. static uint32_t lcd_vga_transfer_tdo35s[] = {
  117. CMD1(0xcf, 0x02), /* Blanking period control (1) */
  118. CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
  119. CMD1(0xd1, 0x01), /* CKV timing control on/off */
  120. CMD2(0xd2, 0x00, 0x1e), /* CKV 1,2 timing control */
  121. CMD2(0xd3, 0x14, 0x28), /* OEV timing control */
  122. CMD2(0xd4, 0x28, 0x64), /* ASW timing control (1) */
  123. CMD1(0xd5, 0x28), /* ASW timing control (2) */
  124. CMD0(0x21), /* Invert for normally black display */
  125. CMD0(0x29), /* Display on */
  126. CMD_NULL,
  127. };
  128. static uint32_t lcd_panel_config[] = {
  129. CMD2(0xb8, 0xff, 0xf9), /* Output control */
  130. CMD0(0x11), /* sleep out */
  131. CMD1(0xba, 0x01), /* Display mode (1) */
  132. CMD1(0xbb, 0x00), /* Display mode (2) */
  133. CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
  134. CMD1(0xbf, 0x10), /* Drive system change control */
  135. CMD1(0xb1, 0x56), /* Booster operation setup */
  136. CMD1(0xb2, 0x33), /* Booster mode setup */
  137. CMD1(0xb3, 0x11), /* Booster frequency setup */
  138. CMD1(0xb4, 0x02), /* Op amp/system clock */
  139. CMD1(0xb5, 0x35), /* VCS voltage */
  140. CMD1(0xb6, 0x40), /* VCOM voltage */
  141. CMD1(0xb7, 0x03), /* External display signal */
  142. CMD1(0xbd, 0x00), /* ASW slew rate */
  143. CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */
  144. CMD1(0xc0, 0x11), /* Sleep out FR count (A) */
  145. CMD1(0xc1, 0x11), /* Sleep out FR count (B) */
  146. CMD1(0xc2, 0x11), /* Sleep out FR count (C) */
  147. CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
  148. CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
  149. CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
  150. CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */
  151. CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
  152. CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
  153. CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */
  154. CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */
  155. CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
  156. CMD_NULL,
  157. };
  158. static int tdo24m_writes(struct tdo24m *lcd, uint32_t *array)
  159. {
  160. struct spi_transfer *x = &lcd->xfer;
  161. uint32_t data, *p = array;
  162. int nparams, err = 0;
  163. for (; *p != CMD_NULL; p++) {
  164. if (!lcd->color_invert && *p == CMD0(0x21))
  165. continue;
  166. nparams = (*p >> 30) & 0x3;
  167. data = *p << (7 - nparams);
  168. switch (nparams) {
  169. case 0:
  170. lcd->buf[0] = (data >> 8) & 0xff;
  171. lcd->buf[1] = data & 0xff;
  172. break;
  173. case 1:
  174. lcd->buf[0] = (data >> 16) & 0xff;
  175. lcd->buf[1] = (data >> 8) & 0xff;
  176. lcd->buf[2] = data & 0xff;
  177. break;
  178. case 2:
  179. lcd->buf[0] = (data >> 24) & 0xff;
  180. lcd->buf[1] = (data >> 16) & 0xff;
  181. lcd->buf[2] = (data >> 8) & 0xff;
  182. lcd->buf[3] = data & 0xff;
  183. break;
  184. default:
  185. continue;
  186. }
  187. x->len = nparams + 2;
  188. err = spi_sync(lcd->spi_dev, &lcd->msg);
  189. if (err)
  190. break;
  191. }
  192. return err;
  193. }
  194. static int tdo24m_adj_mode(struct tdo24m *lcd, int mode)
  195. {
  196. switch (mode) {
  197. case MODE_VGA:
  198. tdo24m_writes(lcd, lcd_vga_pass_through_tdo24m);
  199. tdo24m_writes(lcd, lcd_panel_config);
  200. tdo24m_writes(lcd, lcd_vga_transfer_tdo24m);
  201. break;
  202. case MODE_QVGA:
  203. tdo24m_writes(lcd, lcd_qvga_pass_through_tdo24m);
  204. tdo24m_writes(lcd, lcd_panel_config);
  205. tdo24m_writes(lcd, lcd_qvga_transfer);
  206. break;
  207. default:
  208. return -EINVAL;
  209. }
  210. lcd->mode = mode;
  211. return 0;
  212. }
  213. static int tdo35s_adj_mode(struct tdo24m *lcd, int mode)
  214. {
  215. switch (mode) {
  216. case MODE_VGA:
  217. tdo24m_writes(lcd, lcd_vga_pass_through_tdo35s);
  218. tdo24m_writes(lcd, lcd_panel_config);
  219. tdo24m_writes(lcd, lcd_vga_transfer_tdo35s);
  220. break;
  221. case MODE_QVGA:
  222. tdo24m_writes(lcd, lcd_qvga_pass_through_tdo35s);
  223. tdo24m_writes(lcd, lcd_panel_config);
  224. tdo24m_writes(lcd, lcd_qvga_transfer);
  225. break;
  226. default:
  227. return -EINVAL;
  228. }
  229. lcd->mode = mode;
  230. return 0;
  231. }
  232. static int tdo24m_power_on(struct tdo24m *lcd)
  233. {
  234. int err;
  235. err = tdo24m_writes(lcd, lcd_panel_on);
  236. if (err)
  237. goto out;
  238. err = tdo24m_writes(lcd, lcd_panel_reset);
  239. if (err)
  240. goto out;
  241. err = lcd->adj_mode(lcd, lcd->mode);
  242. out:
  243. return err;
  244. }
  245. static int tdo24m_power_off(struct tdo24m *lcd)
  246. {
  247. return tdo24m_writes(lcd, lcd_panel_off);
  248. }
  249. static int tdo24m_power(struct tdo24m *lcd, int power)
  250. {
  251. int ret = 0;
  252. if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
  253. ret = tdo24m_power_on(lcd);
  254. else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
  255. ret = tdo24m_power_off(lcd);
  256. if (!ret)
  257. lcd->power = power;
  258. return ret;
  259. }
  260. static int tdo24m_set_power(struct lcd_device *ld, int power)
  261. {
  262. struct tdo24m *lcd = lcd_get_data(ld);
  263. return tdo24m_power(lcd, power);
  264. }
  265. static int tdo24m_get_power(struct lcd_device *ld)
  266. {
  267. struct tdo24m *lcd = lcd_get_data(ld);
  268. return lcd->power;
  269. }
  270. static int tdo24m_set_mode(struct lcd_device *ld, struct fb_videomode *m)
  271. {
  272. struct tdo24m *lcd = lcd_get_data(ld);
  273. int mode = MODE_QVGA;
  274. if (m->xres == 640 || m->xres == 480)
  275. mode = MODE_VGA;
  276. if (lcd->mode == mode)
  277. return 0;
  278. return lcd->adj_mode(lcd, mode);
  279. }
  280. static struct lcd_ops tdo24m_ops = {
  281. .get_power = tdo24m_get_power,
  282. .set_power = tdo24m_set_power,
  283. .set_mode = tdo24m_set_mode,
  284. };
  285. static int __devinit tdo24m_probe(struct spi_device *spi)
  286. {
  287. struct tdo24m *lcd;
  288. struct spi_message *m;
  289. struct spi_transfer *x;
  290. struct tdo24m_platform_data *pdata;
  291. enum tdo24m_model model;
  292. int err;
  293. pdata = spi->dev.platform_data;
  294. if (pdata)
  295. model = pdata->model;
  296. else
  297. model = TDO24M;
  298. spi->bits_per_word = 8;
  299. spi->mode = SPI_MODE_3;
  300. err = spi_setup(spi);
  301. if (err)
  302. return err;
  303. lcd = kzalloc(sizeof(struct tdo24m), GFP_KERNEL);
  304. if (!lcd)
  305. return -ENOMEM;
  306. lcd->spi_dev = spi;
  307. lcd->power = FB_BLANK_POWERDOWN;
  308. lcd->mode = MODE_VGA; /* default to VGA */
  309. lcd->buf = kmalloc(TDO24M_SPI_BUFF_SIZE, GFP_KERNEL);
  310. if (lcd->buf == NULL) {
  311. kfree(lcd);
  312. return -ENOMEM;
  313. }
  314. m = &lcd->msg;
  315. x = &lcd->xfer;
  316. spi_message_init(m);
  317. x->cs_change = 1;
  318. x->tx_buf = &lcd->buf[0];
  319. spi_message_add_tail(x, m);
  320. switch (model) {
  321. case TDO24M:
  322. lcd->color_invert = 1;
  323. lcd->adj_mode = tdo24m_adj_mode;
  324. break;
  325. case TDO35S:
  326. lcd->adj_mode = tdo35s_adj_mode;
  327. lcd->color_invert = 0;
  328. break;
  329. default:
  330. dev_err(&spi->dev, "Unsupported model");
  331. goto out_free;
  332. }
  333. lcd->lcd_dev = lcd_device_register("tdo24m", &spi->dev,
  334. lcd, &tdo24m_ops);
  335. if (IS_ERR(lcd->lcd_dev)) {
  336. err = PTR_ERR(lcd->lcd_dev);
  337. goto out_free;
  338. }
  339. dev_set_drvdata(&spi->dev, lcd);
  340. err = tdo24m_power(lcd, FB_BLANK_UNBLANK);
  341. if (err)
  342. goto out_unregister;
  343. return 0;
  344. out_unregister:
  345. lcd_device_unregister(lcd->lcd_dev);
  346. out_free:
  347. kfree(lcd->buf);
  348. kfree(lcd);
  349. return err;
  350. }
  351. static int __devexit tdo24m_remove(struct spi_device *spi)
  352. {
  353. struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
  354. tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  355. lcd_device_unregister(lcd->lcd_dev);
  356. kfree(lcd->buf);
  357. kfree(lcd);
  358. return 0;
  359. }
  360. #ifdef CONFIG_PM
  361. static int tdo24m_suspend(struct spi_device *spi, pm_message_t state)
  362. {
  363. struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
  364. return tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  365. }
  366. static int tdo24m_resume(struct spi_device *spi)
  367. {
  368. struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
  369. return tdo24m_power(lcd, FB_BLANK_UNBLANK);
  370. }
  371. #else
  372. #define tdo24m_suspend NULL
  373. #define tdo24m_resume NULL
  374. #endif
  375. /* Power down all displays on reboot, poweroff or halt */
  376. static void tdo24m_shutdown(struct spi_device *spi)
  377. {
  378. struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
  379. tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  380. }
  381. static struct spi_driver tdo24m_driver = {
  382. .driver = {
  383. .name = "tdo24m",
  384. .owner = THIS_MODULE,
  385. },
  386. .probe = tdo24m_probe,
  387. .remove = __devexit_p(tdo24m_remove),
  388. .shutdown = tdo24m_shutdown,
  389. .suspend = tdo24m_suspend,
  390. .resume = tdo24m_resume,
  391. };
  392. static int __init tdo24m_init(void)
  393. {
  394. return spi_register_driver(&tdo24m_driver);
  395. }
  396. module_init(tdo24m_init);
  397. static void __exit tdo24m_exit(void)
  398. {
  399. spi_unregister_driver(&tdo24m_driver);
  400. }
  401. module_exit(tdo24m_exit);
  402. MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
  403. MODULE_DESCRIPTION("Driver for Toppoly TDO24M LCD Panel");
  404. MODULE_LICENSE("GPL");
  405. MODULE_ALIAS("spi:tdo24m");