/drivers/staging/solo6x10/registers.h
C Header | 637 lines | 506 code | 103 blank | 28 comment | 0 complexity | df0c8c062d9ae00029f0c85ef29f258a MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
- /*
- * Copyright (C) 2010 Bluecherry, LLC www.bluecherrydvr.com
- * Copyright (C) 2010 Ben Collins <bcollins@bluecherry.net>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
- #ifndef __SOLO6X10_REGISTERS_H
- #define __SOLO6X10_REGISTERS_H
- #include "offsets.h"
- /* Global 6X10 system configuration */
- #define SOLO_SYS_CFG 0x0000
- #define SOLO6010_SYS_CFG_FOUT_EN 0x00000001 /* 6010 only */
- #define SOLO6010_SYS_CFG_PLL_BYPASS 0x00000002 /* 6010 only */
- #define SOLO6010_SYS_CFG_PLL_PWDN 0x00000004 /* 6010 only */
- #define SOLO6010_SYS_CFG_OUTDIV(__n) (((__n) & 0x003) << 3) /* 6010 only */
- #define SOLO6010_SYS_CFG_FEEDBACKDIV(__n) (((__n) & 0x1ff) << 5) /* 6010 only */
- #define SOLO6010_SYS_CFG_INPUTDIV(__n) (((__n) & 0x01f) << 14) /* 6010 only */
- #define SOLO_SYS_CFG_CLOCK_DIV 0x00080000
- #define SOLO_SYS_CFG_NCLK_DELAY(__n) (((__n) & 0x003) << 24)
- #define SOLO_SYS_CFG_PCLK_DELAY(__n) (((__n) & 0x00f) << 26)
- #define SOLO_SYS_CFG_SDRAM64BIT 0x40000000 /* 6110: must be set */
- #define SOLO_SYS_CFG_RESET 0x80000000
- #define SOLO_DMA_CTRL 0x0004
- #define SOLO_DMA_CTRL_REFRESH_CYCLE(n) ((n)<<8)
- /* 0=16/32MB, 1=32/64MB, 2=64/128MB, 3=128/256MB */
- #define SOLO_DMA_CTRL_SDRAM_SIZE(n) ((n)<<6)
- #define SOLO_DMA_CTRL_SDRAM_CLK_INVERT (1<<5)
- #define SOLO_DMA_CTRL_STROBE_SELECT (1<<4)
- #define SOLO_DMA_CTRL_READ_DATA_SELECT (1<<3)
- #define SOLO_DMA_CTRL_READ_CLK_SELECT (1<<2)
- #define SOLO_DMA_CTRL_LATENCY(n) ((n)<<0)
- #define SOLO_DMA_CTRL1 0x0008
- #define SOLO_SYS_VCLK 0x000C
- #define SOLO_VCLK_INVERT (1<<22)
- /* 0=sys_clk/4, 1=sys_clk/2, 2=clk_in/2 of system input */
- #define SOLO_VCLK_SELECT(n) ((n)<<20)
- #define SOLO_VCLK_VIN1415_DELAY(n) ((n)<<14)
- #define SOLO_VCLK_VIN1213_DELAY(n) ((n)<<12)
- #define SOLO_VCLK_VIN1011_DELAY(n) ((n)<<10)
- #define SOLO_VCLK_VIN0809_DELAY(n) ((n)<<8)
- #define SOLO_VCLK_VIN0607_DELAY(n) ((n)<<6)
- #define SOLO_VCLK_VIN0405_DELAY(n) ((n)<<4)
- #define SOLO_VCLK_VIN0203_DELAY(n) ((n)<<2)
- #define SOLO_VCLK_VIN0001_DELAY(n) ((n)<<0)
- #define SOLO_IRQ_STAT 0x0010
- #define SOLO_IRQ_ENABLE 0x0014
- #define SOLO_IRQ_P2M(n) (1<<((n)+17))
- #define SOLO_IRQ_GPIO (1<<16)
- #define SOLO_IRQ_VIDEO_LOSS (1<<15)
- #define SOLO_IRQ_VIDEO_IN (1<<14)
- #define SOLO_IRQ_MOTION (1<<13)
- #define SOLO_IRQ_ATA_CMD (1<<12)
- #define SOLO_IRQ_ATA_DIR (1<<11)
- #define SOLO_IRQ_PCI_ERR (1<<10)
- #define SOLO_IRQ_PS2_1 (1<<9)
- #define SOLO_IRQ_PS2_0 (1<<8)
- #define SOLO_IRQ_SPI (1<<7)
- #define SOLO_IRQ_IIC (1<<6)
- #define SOLO_IRQ_UART(n) (1<<((n) + 4))
- #define SOLO_IRQ_G723 (1<<3)
- #define SOLO_IRQ_DECODER (1<<1)
- #define SOLO_IRQ_ENCODER (1<<0)
- #define SOLO_CHIP_OPTION 0x001C
- #define SOLO_CHIP_ID_MASK 0x00000007
- #define SOLO6110_PLL_CONFIG 0x0020
- #define SOLO6110_PLL_RANGE_BYPASS (0 << 20)
- #define SOLO6110_PLL_RANGE_5_10MHZ (1 << 20)
- #define SOLO6110_PLL_RANGE_8_16MHZ (2 << 20)
- #define SOLO6110_PLL_RANGE_13_26MHZ (3 << 20)
- #define SOLO6110_PLL_RANGE_21_42MHZ (4 << 20)
- #define SOLO6110_PLL_RANGE_34_68MHZ (5 << 20)
- #define SOLO6110_PLL_RANGE_54_108MHZ (6 << 20)
- #define SOLO6110_PLL_RANGE_88_200MHZ (7 << 20)
- #define SOLO6110_PLL_DIVR(x) (((x) - 1) << 15)
- #define SOLO6110_PLL_DIVQ_EXP(x) ((x) << 12)
- #define SOLO6110_PLL_DIVF(x) (((x) - 1) << 4)
- #define SOLO6110_PLL_RESET (1 << 3)
- #define SOLO6110_PLL_BYPASS (1 << 2)
- #define SOLO6110_PLL_FSEN (1 << 1)
- #define SOLO6110_PLL_FB (1 << 0)
- #define SOLO_EEPROM_CTRL 0x0060
- #define SOLO_EEPROM_ACCESS_EN (1<<7)
- #define SOLO_EEPROM_CS (1<<3)
- #define SOLO_EEPROM_CLK (1<<2)
- #define SOLO_EEPROM_DO (1<<1)
- #define SOLO_EEPROM_DI (1<<0)
- #define SOLO_EEPROM_ENABLE (EEPROM_ACCESS_EN | EEPROM_CS)
- #define SOLO_PCI_ERR 0x0070
- #define SOLO_PCI_ERR_FATAL 0x00000001
- #define SOLO_PCI_ERR_PARITY 0x00000002
- #define SOLO_PCI_ERR_TARGET 0x00000004
- #define SOLO_PCI_ERR_TIMEOUT 0x00000008
- #define SOLO_PCI_ERR_P2M 0x00000010
- #define SOLO_PCI_ERR_ATA 0x00000020
- #define SOLO_PCI_ERR_P2M_DESC 0x00000040
- #define SOLO_PCI_ERR_FSM0(__s) (((__s) >> 16) & 0x0f)
- #define SOLO_PCI_ERR_FSM1(__s) (((__s) >> 20) & 0x0f)
- #define SOLO_PCI_ERR_FSM2(__s) (((__s) >> 24) & 0x1f)
- #define SOLO_P2M_BASE 0x0080
- #define SOLO_P2M_CONFIG(n) (0x0080 + ((n)*0x20))
- #define SOLO_P2M_DMA_INTERVAL(n) ((n)<<6)/* N*32 clocks */
- #define SOLO_P2M_CSC_BYTE_REORDER (1<<5) /* BGR -> RGB */
- /* 0:r=[14:10] g=[9:5] b=[4:0], 1:r=[15:11] g=[10:5] b=[4:0] */
- #define SOLO_P2M_CSC_16BIT_565 (1<<4)
- #define SOLO_P2M_UV_SWAP (1<<3)
- #define SOLO_P2M_PCI_MASTER_MODE (1<<2)
- #define SOLO_P2M_DESC_INTR_OPT (1<<1) /* 1:Empty, 0:Each */
- #define SOLO_P2M_DESC_MODE (1<<0)
- #define SOLO_P2M_DES_ADR(n) (0x0084 + ((n)*0x20))
- #define SOLO_P2M_DESC_ID(n) (0x0088 + ((n)*0x20))
- #define SOLO_P2M_UPDATE_ID(n) ((n)<<0)
- #define SOLO_P2M_STATUS(n) (0x008C + ((n)*0x20))
- #define SOLO_P2M_COMMAND_DONE (1<<8)
- #define SOLO_P2M_CURRENT_ID(stat) (0xff & (stat))
- #define SOLO_P2M_CONTROL(n) (0x0090 + ((n)*0x20))
- #define SOLO_P2M_PCI_INC(n) ((n)<<20)
- #define SOLO_P2M_REPEAT(n) ((n)<<10)
- /* 0:512, 1:256, 2:128, 3:64, 4:32, 5:128(2page) */
- #define SOLO_P2M_BURST_SIZE(n) ((n)<<7)
- #define SOLO_P2M_BURST_512 0
- #define SOLO_P2M_BURST_256 1
- #define SOLO_P2M_BURST_128 2
- #define SOLO_P2M_BURST_64 3
- #define SOLO_P2M_BURST_32 4
- #define SOLO_P2M_CSC_16BIT (1<<6) /* 0:24bit, 1:16bit */
- /* 0:Y[0]<-0(OFF), 1:Y[0]<-1(ON), 2:Y[0]<-G[0], 3:Y[0]<-Bit[15] */
- #define SOLO_P2M_ALPHA_MODE(n) ((n)<<4)
- #define SOLO_P2M_CSC_ON (1<<3)
- #define SOLO_P2M_INTERRUPT_REQ (1<<2)
- #define SOLO_P2M_WRITE (1<<1)
- #define SOLO_P2M_TRANS_ON (1<<0)
- #define SOLO_P2M_EXT_CFG(n) (0x0094 + ((n)*0x20))
- #define SOLO_P2M_EXT_INC(n) ((n)<<20)
- #define SOLO_P2M_COPY_SIZE(n) ((n)<<0)
- #define SOLO_P2M_TAR_ADR(n) (0x0098 + ((n)*0x20))
- #define SOLO_P2M_EXT_ADR(n) (0x009C + ((n)*0x20))
- #define SOLO_P2M_BUFFER(i) (0x2000 + ((i)*4))
- #define SOLO_VI_CH_SWITCH_0 0x0100
- #define SOLO_VI_CH_SWITCH_1 0x0104
- #define SOLO_VI_CH_SWITCH_2 0x0108
- #define SOLO_VI_CH_ENA 0x010C
- #define SOLO_VI_CH_FORMAT 0x0110
- #define SOLO_VI_FD_SEL_MASK(n) ((n)<<16)
- #define SOLO_VI_PROG_MASK(n) ((n)<<0)
- #define SOLO_VI_FMT_CFG 0x0114
- #define SOLO_VI_FMT_CHECK_VCOUNT (1<<31)
- #define SOLO_VI_FMT_CHECK_HCOUNT (1<<30)
- #define SOLO_VI_FMT_TEST_SIGNAL (1<<28)
- #define SOLO_VI_PAGE_SW 0x0118
- #define SOLO_FI_INV_DISP_LIVE(n) ((n)<<8)
- #define SOLO_FI_INV_DISP_OUT(n) ((n)<<7)
- #define SOLO_DISP_SYNC_FI(n) ((n)<<6)
- #define SOLO_PIP_PAGE_ADD(n) ((n)<<3)
- #define SOLO_NORMAL_PAGE_ADD(n) ((n)<<0)
- #define SOLO_VI_ACT_I_P 0x011C
- #define SOLO_VI_ACT_I_S 0x0120
- #define SOLO_VI_ACT_P 0x0124
- #define SOLO_VI_FI_INVERT (1<<31)
- #define SOLO_VI_H_START(n) ((n)<<21)
- #define SOLO_VI_V_START(n) ((n)<<11)
- #define SOLO_VI_V_STOP(n) ((n)<<0)
- #define SOLO_VI_STATUS0 0x0128
- #define SOLO_VI_STATUS0_PAGE(__n) ((__n) & 0x07)
- #define SOLO_VI_STATUS1 0x012C
- /* XXX: Might be better off in kernel level disp.h */
- #define DISP_PAGE(stat) ((stat) & 0x07)
- #define SOLO_VI_PB_CONFIG 0x0130
- #define SOLO_VI_PB_USER_MODE (1<<1)
- #define SOLO_VI_PB_PAL (1<<0)
- #define SOLO_VI_PB_RANGE_HV 0x0134
- #define SOLO_VI_PB_HSIZE(h) ((h)<<12)
- #define SOLO_VI_PB_VSIZE(v) ((v)<<0)
- #define SOLO_VI_PB_ACT_H 0x0138
- #define SOLO_VI_PB_HSTART(n) ((n)<<12)
- #define SOLO_VI_PB_HSTOP(n) ((n)<<0)
- #define SOLO_VI_PB_ACT_V 0x013C
- #define SOLO_VI_PB_VSTART(n) ((n)<<12)
- #define SOLO_VI_PB_VSTOP(n) ((n)<<0)
- #define SOLO_VI_MOSAIC(ch) (0x0140 + ((ch)*4))
- #define SOLO_VI_MOSAIC_SX(x) ((x)<<24)
- #define SOLO_VI_MOSAIC_EX(x) ((x)<<16)
- #define SOLO_VI_MOSAIC_SY(x) ((x)<<8)
- #define SOLO_VI_MOSAIC_EY(x) ((x)<<0)
- #define SOLO_VI_WIN_CTRL0(ch) (0x0180 + ((ch)*4))
- #define SOLO_VI_WIN_CTRL1(ch) (0x01C0 + ((ch)*4))
- #define SOLO_VI_WIN_CHANNEL(n) ((n)<<28)
- #define SOLO_VI_WIN_PIP(n) ((n)<<27)
- #define SOLO_VI_WIN_SCALE(n) ((n)<<24)
- #define SOLO_VI_WIN_SX(x) ((x)<<12)
- #define SOLO_VI_WIN_EX(x) ((x)<<0)
- #define SOLO_VI_WIN_SY(x) ((x)<<12)
- #define SOLO_VI_WIN_EY(x) ((x)<<0)
- #define SOLO_VI_WIN_ON(ch) (0x0200 + ((ch)*4))
- #define SOLO_VI_WIN_SW 0x0240
- #define SOLO_VI_WIN_LIVE_AUTO_MUTE 0x0244
- #define SOLO_VI_MOT_ADR 0x0260
- #define SOLO_VI_MOTION_EN(mask) ((mask)<<16)
- #define SOLO_VI_MOT_CTRL 0x0264