/drivers/staging/rtl8192e/r819xE_cmdpkt.h

https://bitbucket.org/slukk/jb-tsm-kernel-4.2 · C Header · 207 lines · 118 code · 36 blank · 53 comment · 0 complexity · 640b73d754690c5b68bba23fa82aa399 MD5 · raw file

  1. #ifndef R819XUSB_CMDPKT_H
  2. #define R819XUSB_CMDPKT_H
  3. /* Different command packet have dedicated message length and definition. */
  4. #define CMPK_RX_TX_FB_SIZE sizeof(cmpk_txfb_t) //20
  5. #define CMPK_TX_SET_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16
  6. #define CMPK_BOTH_QUERY_CONFIG_SIZE sizeof(cmpk_set_cfg_t) //16
  7. #define CMPK_RX_TX_STS_SIZE sizeof(cmpk_tx_status_t)//
  8. #define CMPK_RX_DBG_MSG_SIZE sizeof(cmpk_rx_dbginfo_t)//
  9. #define CMPK_TX_RAHIS_SIZE sizeof(cmpk_tx_rahis_t)
  10. /* 2008/05/08 amy For USB constant. */
  11. #define ISR_TxBcnOk BIT27 // Transmit Beacon OK
  12. #define ISR_TxBcnErr BIT26 // Transmit Beacon Error
  13. #define ISR_BcnTimerIntr BIT13 // Beacon Timer Interrupt
  14. #if 0
  15. /* Define packet type. */
  16. typedef enum tag_packet_type
  17. {
  18. PACKET_BROADCAST,
  19. PACKET_MULTICAST,
  20. PACKET_UNICAST,
  21. PACKET_TYPE_MAX
  22. }cmpk_pkt_type_e;
  23. #endif
  24. /* Define element ID of command packet. */
  25. /*------------------------------Define structure----------------------------*/
  26. /* Define different command packet structure. */
  27. /* 1. RX side: TX feedback packet. */
  28. typedef struct tag_cmd_pkt_tx_feedback
  29. {
  30. // DWORD 0
  31. u8 element_id; /* Command packet type. */
  32. u8 length; /* Command packet length. */
  33. /* 2007/07/05 MH Change tx feedback info field. */
  34. /*------TX Feedback Info Field */
  35. u8 TID:4; /* */
  36. u8 fail_reason:3; /* */
  37. u8 tok:1; /* Transmit ok. */
  38. u8 reserve1:4; /* */
  39. u8 pkt_type:2; /* */
  40. u8 bandwidth:1; /* */
  41. u8 qos_pkt:1; /* */
  42. // DWORD 1
  43. u8 reserve2; /* */
  44. /*------TX Feedback Info Field */
  45. u8 retry_cnt; /* */
  46. u16 pkt_id; /* */
  47. // DWORD 3
  48. u16 seq_num; /* */
  49. u8 s_rate; /* Start rate. */
  50. u8 f_rate; /* Final rate. */
  51. // DWORD 4
  52. u8 s_rts_rate; /* */
  53. u8 f_rts_rate; /* */
  54. u16 pkt_length; /* */
  55. // DWORD 5
  56. u16 reserve3; /* */
  57. u16 duration; /* */
  58. }cmpk_txfb_t;
  59. /* 2. RX side: Interrupt status packet. It includes Beacon State,
  60. Beacon Timer Interrupt and other useful informations in MAC ISR Reg. */
  61. typedef struct tag_cmd_pkt_interrupt_status
  62. {
  63. u8 element_id; /* Command packet type. */
  64. u8 length; /* Command packet length. */
  65. u16 reserve;
  66. u32 interrupt_status; /* Interrupt Status. */
  67. }cmpk_intr_sta_t;
  68. /* 3. TX side: Set configuration packet. */
  69. typedef struct tag_cmd_pkt_set_configuration
  70. {
  71. u8 element_id; /* Command packet type. */
  72. u8 length; /* Command packet length. */
  73. u16 reserve1; /* */
  74. u8 cfg_reserve1:3;
  75. u8 cfg_size:2; /* Configuration info. */
  76. u8 cfg_type:2; /* Configuration info. */
  77. u8 cfg_action:1; /* Configuration info. */
  78. u8 cfg_reserve2; /* Configuration info. */
  79. u8 cfg_page:4; /* Configuration info. */
  80. u8 cfg_reserve3:4; /* Configuration info. */
  81. u8 cfg_offset; /* Configuration info. */
  82. u32 value; /* */
  83. u32 mask; /* */
  84. }cmpk_set_cfg_t;
  85. /* 4. Both side : TX/RX query configuraton packet. The query structure is the
  86. same as set configuration. */
  87. #define cmpk_query_cfg_t cmpk_set_cfg_t
  88. /* 5. Multi packet feedback status. */
  89. typedef struct tag_tx_stats_feedback // PJ quick rxcmd 09042007
  90. {
  91. // For endian transfer --> Driver will not the same as firmware structure.
  92. // DW 0
  93. u16 reserve1;
  94. u8 length; // Command packet length
  95. u8 element_id; // Command packet type
  96. // DW 1
  97. u16 txfail; // Tx Fail count
  98. u16 txok; // Tx ok count
  99. // DW 2
  100. u16 txmcok; // tx multicast
  101. u16 txretry; // Tx Retry count
  102. // DW 3
  103. u16 txucok; // tx unicast
  104. u16 txbcok; // tx broadcast
  105. // DW 4
  106. u16 txbcfail; //
  107. u16 txmcfail; //
  108. // DW 5
  109. u16 reserve2; //
  110. u16 txucfail; //
  111. // DW 6-8
  112. u32 txmclength;
  113. u32 txbclength;
  114. u32 txuclength;
  115. // DW 9
  116. u16 reserve3_23;
  117. u8 reserve3_1;
  118. u8 rate;
  119. }__attribute__((packed)) cmpk_tx_status_t;
  120. /* 6. Debug feedback message. */
  121. /* 2007/10/23 MH Define RX debug message */
  122. typedef struct tag_rx_debug_message_feedback
  123. {
  124. // For endian transfer --> for driver
  125. // DW 0
  126. u16 reserve1;
  127. u8 length; // Command packet length
  128. u8 element_id; // Command packet type
  129. // DW 1-??
  130. // Variable debug message.
  131. }cmpk_rx_dbginfo_t;
  132. /* 2008/03/20 MH Define transmit rate history. For big endian format. */
  133. typedef struct tag_tx_rate_history
  134. {
  135. // For endian transfer --> for driver
  136. // DW 0
  137. u8 element_id; // Command packet type
  138. u8 length; // Command packet length
  139. u16 reserved1;
  140. // DW 1-2 CCK rate counter
  141. u16 cck[4];
  142. // DW 3-6
  143. u16 ofdm[8];
  144. // DW 7-14
  145. //UINT16 MCS_BW0_SG0[16];
  146. // DW 15-22
  147. //UINT16 MCS_BW1_SG0[16];
  148. // DW 23-30
  149. //UINT16 MCS_BW0_SG1[16];
  150. // DW 31-38
  151. //UINT16 MCS_BW1_SG1[16];
  152. // DW 7-14 BW=0 SG=0
  153. // DW 15-22 BW=1 SG=0
  154. // DW 23-30 BW=0 SG=1
  155. // DW 31-38 BW=1 SG=1
  156. u16 ht_mcs[4][16];
  157. }__attribute__((packed)) cmpk_tx_rahis_t;
  158. typedef enum tag_command_packet_directories
  159. {
  160. RX_TX_FEEDBACK = 0,
  161. RX_INTERRUPT_STATUS = 1,
  162. TX_SET_CONFIG = 2,
  163. BOTH_QUERY_CONFIG = 3,
  164. RX_TX_STATUS = 4,
  165. RX_DBGINFO_FEEDBACK = 5,
  166. RX_TX_PER_PKT_FEEDBACK = 6,
  167. RX_TX_RATE_HISTORY = 7,
  168. RX_CMD_ELE_MAX
  169. }cmpk_element_e;
  170. u32 cmpk_message_handle_rx(struct r8192_priv *priv, struct ieee80211_rx_stats *pstats);
  171. #endif