/drivers/staging/lirc/lirc_serial.c

https://bitbucket.org/slukk/jb-tsm-kernel-4.2 · C · 1309 lines · 894 code · 173 blank · 242 comment · 126 complexity · 0f151733e3064803b7849e733b4e735e MD5 · raw file

  1. /*
  2. * lirc_serial.c
  3. *
  4. * lirc_serial - Device driver that records pulse- and pause-lengths
  5. * (space-lengths) between DDCD event on a serial port.
  6. *
  7. * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
  8. * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
  9. * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
  10. * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
  11. * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. /*
  28. * Steve's changes to improve transmission fidelity:
  29. * - for systems with the rdtsc instruction and the clock counter, a
  30. * send_pule that times the pulses directly using the counter.
  31. * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
  32. * not needed. Measurement shows very stable waveform, even where
  33. * PCI activity slows the access to the UART, which trips up other
  34. * versions.
  35. * - For other system, non-integer-microsecond pulse/space lengths,
  36. * done using fixed point binary. So, much more accurate carrier
  37. * frequency.
  38. * - fine tuned transmitter latency, taking advantage of fractional
  39. * microseconds in previous change
  40. * - Fixed bug in the way transmitter latency was accounted for by
  41. * tuning the pulse lengths down - the send_pulse routine ignored
  42. * this overhead as it timed the overall pulse length - so the
  43. * pulse frequency was right but overall pulse length was too
  44. * long. Fixed by accounting for latency on each pulse/space
  45. * iteration.
  46. *
  47. * Steve Davies <steve@daviesfam.org> July 2001
  48. */
  49. #include <linux/module.h>
  50. #include <linux/errno.h>
  51. #include <linux/signal.h>
  52. #include <linux/sched.h>
  53. #include <linux/fs.h>
  54. #include <linux/interrupt.h>
  55. #include <linux/ioport.h>
  56. #include <linux/kernel.h>
  57. #include <linux/serial_reg.h>
  58. #include <linux/time.h>
  59. #include <linux/string.h>
  60. #include <linux/types.h>
  61. #include <linux/wait.h>
  62. #include <linux/mm.h>
  63. #include <linux/delay.h>
  64. #include <linux/poll.h>
  65. #include <linux/platform_device.h>
  66. #include <asm/system.h>
  67. #include <linux/io.h>
  68. #include <linux/irq.h>
  69. #include <linux/fcntl.h>
  70. #include <linux/spinlock.h>
  71. #ifdef CONFIG_LIRC_SERIAL_NSLU2
  72. #include <asm/hardware.h>
  73. #endif
  74. /* From Intel IXP42X Developer's Manual (#252480-005): */
  75. /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
  76. #define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */
  77. #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
  78. #include <media/lirc.h>
  79. #include <media/lirc_dev.h>
  80. #define LIRC_DRIVER_NAME "lirc_serial"
  81. struct lirc_serial {
  82. int signal_pin;
  83. int signal_pin_change;
  84. u8 on;
  85. u8 off;
  86. long (*send_pulse)(unsigned long length);
  87. void (*send_space)(long length);
  88. int features;
  89. spinlock_t lock;
  90. };
  91. #define LIRC_HOMEBREW 0
  92. #define LIRC_IRDEO 1
  93. #define LIRC_IRDEO_REMOTE 2
  94. #define LIRC_ANIMAX 3
  95. #define LIRC_IGOR 4
  96. #define LIRC_NSLU2 5
  97. /*** module parameters ***/
  98. static int type;
  99. static int io;
  100. static int irq;
  101. static int iommap;
  102. static int ioshift;
  103. static int softcarrier = 1;
  104. static int share_irq;
  105. static int debug;
  106. static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
  107. static int txsense; /* 0 = active high, 1 = active low */
  108. #define dprintk(fmt, args...) \
  109. do { \
  110. if (debug) \
  111. printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
  112. fmt, ## args); \
  113. } while (0)
  114. /* forward declarations */
  115. static long send_pulse_irdeo(unsigned long length);
  116. static long send_pulse_homebrew(unsigned long length);
  117. static void send_space_irdeo(long length);
  118. static void send_space_homebrew(long length);
  119. static struct lirc_serial hardware[] = {
  120. [LIRC_HOMEBREW] = {
  121. .signal_pin = UART_MSR_DCD,
  122. .signal_pin_change = UART_MSR_DDCD,
  123. .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
  124. .off = (UART_MCR_RTS | UART_MCR_OUT2),
  125. .send_pulse = send_pulse_homebrew,
  126. .send_space = send_space_homebrew,
  127. #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
  128. .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
  129. LIRC_CAN_SET_SEND_CARRIER |
  130. LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
  131. #else
  132. .features = LIRC_CAN_REC_MODE2
  133. #endif
  134. },
  135. [LIRC_IRDEO] = {
  136. .signal_pin = UART_MSR_DSR,
  137. .signal_pin_change = UART_MSR_DDSR,
  138. .on = UART_MCR_OUT2,
  139. .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
  140. .send_pulse = send_pulse_irdeo,
  141. .send_space = send_space_irdeo,
  142. .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
  143. LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
  144. },
  145. [LIRC_IRDEO_REMOTE] = {
  146. .signal_pin = UART_MSR_DSR,
  147. .signal_pin_change = UART_MSR_DDSR,
  148. .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
  149. .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
  150. .send_pulse = send_pulse_irdeo,
  151. .send_space = send_space_irdeo,
  152. .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
  153. LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
  154. },
  155. [LIRC_ANIMAX] = {
  156. .signal_pin = UART_MSR_DCD,
  157. .signal_pin_change = UART_MSR_DDCD,
  158. .on = 0,
  159. .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
  160. .send_pulse = NULL,
  161. .send_space = NULL,
  162. .features = LIRC_CAN_REC_MODE2
  163. },
  164. [LIRC_IGOR] = {
  165. .signal_pin = UART_MSR_DSR,
  166. .signal_pin_change = UART_MSR_DDSR,
  167. .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
  168. .off = (UART_MCR_RTS | UART_MCR_OUT2),
  169. .send_pulse = send_pulse_homebrew,
  170. .send_space = send_space_homebrew,
  171. #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
  172. .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
  173. LIRC_CAN_SET_SEND_CARRIER |
  174. LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
  175. #else
  176. .features = LIRC_CAN_REC_MODE2
  177. #endif
  178. },
  179. #ifdef CONFIG_LIRC_SERIAL_NSLU2
  180. /*
  181. * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
  182. * We receive on CTS of the 2nd serial port (R142,LHS), we
  183. * transmit with a IR diode between GPIO[1] (green status LED),
  184. * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
  185. * See also http://www.nslu2-linux.org for this device
  186. */
  187. [LIRC_NSLU2] = {
  188. .signal_pin = UART_MSR_CTS,
  189. .signal_pin_change = UART_MSR_DCTS,
  190. .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
  191. .off = (UART_MCR_RTS | UART_MCR_OUT2),
  192. .send_pulse = send_pulse_homebrew,
  193. .send_space = send_space_homebrew,
  194. #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
  195. .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
  196. LIRC_CAN_SET_SEND_CARRIER |
  197. LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
  198. #else
  199. .features = LIRC_CAN_REC_MODE2
  200. #endif
  201. },
  202. #endif
  203. };
  204. #define RS_ISR_PASS_LIMIT 256
  205. /*
  206. * A long pulse code from a remote might take up to 300 bytes. The
  207. * daemon should read the bytes as soon as they are generated, so take
  208. * the number of keys you think you can push before the daemon runs
  209. * and multiply by 300. The driver will warn you if you overrun this
  210. * buffer. If you have a slow computer or non-busmastering IDE disks,
  211. * maybe you will need to increase this.
  212. */
  213. /* This MUST be a power of two! It has to be larger than 1 as well. */
  214. #define RBUF_LEN 256
  215. static struct timeval lasttv = {0, 0};
  216. static struct lirc_buffer rbuf;
  217. static unsigned int freq = 38000;
  218. static unsigned int duty_cycle = 50;
  219. /* Initialized in init_timing_params() */
  220. static unsigned long period;
  221. static unsigned long pulse_width;
  222. static unsigned long space_width;
  223. #if defined(__i386__)
  224. /*
  225. * From:
  226. * Linux I/O port programming mini-HOWTO
  227. * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
  228. * v, 28 December 1997
  229. *
  230. * [...]
  231. * Actually, a port I/O instruction on most ports in the 0-0x3ff range
  232. * takes almost exactly 1 microsecond, so if you're, for example, using
  233. * the parallel port directly, just do additional inb()s from that port
  234. * to delay.
  235. * [...]
  236. */
  237. /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
  238. * comment above plus trimming to match actual measured frequency.
  239. * This will be sensitive to cpu speed, though hopefully most of the 1.5us
  240. * is spent in the uart access. Still - for reference test machine was a
  241. * 1.13GHz Athlon system - Steve
  242. */
  243. /*
  244. * changed from 400 to 450 as this works better on slower machines;
  245. * faster machines will use the rdtsc code anyway
  246. */
  247. #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
  248. #else
  249. /* does anybody have information on other platforms ? */
  250. /* 256 = 1<<8 */
  251. #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
  252. #endif /* __i386__ */
  253. /*
  254. * FIXME: should we be using hrtimers instead of this
  255. * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
  256. */
  257. /* fetch serial input packet (1 byte) from register offset */
  258. static u8 sinp(int offset)
  259. {
  260. if (iommap != 0)
  261. /* the register is memory-mapped */
  262. offset <<= ioshift;
  263. return inb(io + offset);
  264. }
  265. /* write serial output packet (1 byte) of value to register offset */
  266. static void soutp(int offset, u8 value)
  267. {
  268. if (iommap != 0)
  269. /* the register is memory-mapped */
  270. offset <<= ioshift;
  271. outb(value, io + offset);
  272. }
  273. static void on(void)
  274. {
  275. #ifdef CONFIG_LIRC_SERIAL_NSLU2
  276. /*
  277. * On NSLU2, we put the transmit diode between the output of the green
  278. * status LED and ground
  279. */
  280. if (type == LIRC_NSLU2) {
  281. gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
  282. return;
  283. }
  284. #endif
  285. if (txsense)
  286. soutp(UART_MCR, hardware[type].off);
  287. else
  288. soutp(UART_MCR, hardware[type].on);
  289. }
  290. static void off(void)
  291. {
  292. #ifdef CONFIG_LIRC_SERIAL_NSLU2
  293. if (type == LIRC_NSLU2) {
  294. gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
  295. return;
  296. }
  297. #endif
  298. if (txsense)
  299. soutp(UART_MCR, hardware[type].on);
  300. else
  301. soutp(UART_MCR, hardware[type].off);
  302. }
  303. #ifndef MAX_UDELAY_MS
  304. #define MAX_UDELAY_US 5000
  305. #else
  306. #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
  307. #endif
  308. static void safe_udelay(unsigned long usecs)
  309. {
  310. while (usecs > MAX_UDELAY_US) {
  311. udelay(MAX_UDELAY_US);
  312. usecs -= MAX_UDELAY_US;
  313. }
  314. udelay(usecs);
  315. }
  316. #ifdef USE_RDTSC
  317. /*
  318. * This is an overflow/precision juggle, complicated in that we can't
  319. * do long long divide in the kernel
  320. */
  321. /*
  322. * When we use the rdtsc instruction to measure clocks, we keep the
  323. * pulse and space widths as clock cycles. As this is CPU speed
  324. * dependent, the widths must be calculated in init_port and ioctl
  325. * time
  326. */
  327. /* So send_pulse can quickly convert microseconds to clocks */
  328. static unsigned long conv_us_to_clocks;
  329. static int init_timing_params(unsigned int new_duty_cycle,
  330. unsigned int new_freq)
  331. {
  332. __u64 loops_per_sec, work;
  333. duty_cycle = new_duty_cycle;
  334. freq = new_freq;
  335. loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
  336. loops_per_sec *= HZ;
  337. /* How many clocks in a microsecond?, avoiding long long divide */
  338. work = loops_per_sec;
  339. work *= 4295; /* 4295 = 2^32 / 1e6 */
  340. conv_us_to_clocks = (work >> 32);
  341. /*
  342. * Carrier period in clocks, approach good up to 32GHz clock,
  343. * gets carrier frequency within 8Hz
  344. */
  345. period = loops_per_sec >> 3;
  346. period /= (freq >> 3);
  347. /* Derive pulse and space from the period */
  348. pulse_width = period * duty_cycle / 100;
  349. space_width = period - pulse_width;
  350. dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
  351. "clk/jiffy=%ld, pulse=%ld, space=%ld, "
  352. "conv_us_to_clocks=%ld\n",
  353. freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
  354. pulse_width, space_width, conv_us_to_clocks);
  355. return 0;
  356. }
  357. #else /* ! USE_RDTSC */
  358. static int init_timing_params(unsigned int new_duty_cycle,
  359. unsigned int new_freq)
  360. {
  361. /*
  362. * period, pulse/space width are kept with 8 binary places -
  363. * IE multiplied by 256.
  364. */
  365. if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
  366. LIRC_SERIAL_TRANSMITTER_LATENCY)
  367. return -EINVAL;
  368. if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
  369. LIRC_SERIAL_TRANSMITTER_LATENCY)
  370. return -EINVAL;
  371. duty_cycle = new_duty_cycle;
  372. freq = new_freq;
  373. period = 256 * 1000000L / freq;
  374. pulse_width = period * duty_cycle / 100;
  375. space_width = period - pulse_width;
  376. dprintk("in init_timing_params, freq=%d pulse=%ld, "
  377. "space=%ld\n", freq, pulse_width, space_width);
  378. return 0;
  379. }
  380. #endif /* USE_RDTSC */
  381. /* return value: space length delta */
  382. static long send_pulse_irdeo(unsigned long length)
  383. {
  384. long rawbits, ret;
  385. int i;
  386. unsigned char output;
  387. unsigned char chunk, shifted;
  388. /* how many bits have to be sent ? */
  389. rawbits = length * 1152 / 10000;
  390. if (duty_cycle > 50)
  391. chunk = 3;
  392. else
  393. chunk = 1;
  394. for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
  395. shifted = chunk << (i * 3);
  396. shifted >>= 1;
  397. output &= (~shifted);
  398. i++;
  399. if (i == 3) {
  400. soutp(UART_TX, output);
  401. while (!(sinp(UART_LSR) & UART_LSR_THRE))
  402. ;
  403. output = 0x7f;
  404. i = 0;
  405. }
  406. }
  407. if (i != 0) {
  408. soutp(UART_TX, output);
  409. while (!(sinp(UART_LSR) & UART_LSR_TEMT))
  410. ;
  411. }
  412. if (i == 0)
  413. ret = (-rawbits) * 10000 / 1152;
  414. else
  415. ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
  416. return ret;
  417. }
  418. #ifdef USE_RDTSC
  419. /* Version that uses Pentium rdtsc instruction to measure clocks */
  420. /*
  421. * This version does sub-microsecond timing using rdtsc instruction,
  422. * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
  423. * Implicitly i586 architecture... - Steve
  424. */
  425. static long send_pulse_homebrew_softcarrier(unsigned long length)
  426. {
  427. int flag;
  428. unsigned long target, start, now;
  429. /* Get going quick as we can */
  430. rdtscl(start);
  431. on();
  432. /* Convert length from microseconds to clocks */
  433. length *= conv_us_to_clocks;
  434. /* And loop till time is up - flipping at right intervals */
  435. now = start;
  436. target = pulse_width;
  437. flag = 1;
  438. /*
  439. * FIXME: This looks like a hard busy wait, without even an occasional,
  440. * polite, cpu_relax() call. There's got to be a better way?
  441. *
  442. * The i2c code has the result of a lot of bit-banging work, I wonder if
  443. * there's something there which could be helpful here.
  444. */
  445. while ((now - start) < length) {
  446. /* Delay till flip time */
  447. do {
  448. rdtscl(now);
  449. } while ((now - start) < target);
  450. /* flip */
  451. if (flag) {
  452. rdtscl(now);
  453. off();
  454. target += space_width;
  455. } else {
  456. rdtscl(now); on();
  457. target += pulse_width;
  458. }
  459. flag = !flag;
  460. }
  461. rdtscl(now);
  462. return ((now - start) - length) / conv_us_to_clocks;
  463. }
  464. #else /* ! USE_RDTSC */
  465. /* Version using udelay() */
  466. /*
  467. * here we use fixed point arithmetic, with 8
  468. * fractional bits. that gets us within 0.1% or so of the right average
  469. * frequency, albeit with some jitter in pulse length - Steve
  470. */
  471. /* To match 8 fractional bits used for pulse/space length */
  472. static long send_pulse_homebrew_softcarrier(unsigned long length)
  473. {
  474. int flag;
  475. unsigned long actual, target, d;
  476. length <<= 8;
  477. actual = 0; target = 0; flag = 0;
  478. while (actual < length) {
  479. if (flag) {
  480. off();
  481. target += space_width;
  482. } else {
  483. on();
  484. target += pulse_width;
  485. }
  486. d = (target - actual -
  487. LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
  488. /*
  489. * Note - we've checked in ioctl that the pulse/space
  490. * widths are big enough so that d is > 0
  491. */
  492. udelay(d);
  493. actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
  494. flag = !flag;
  495. }
  496. return (actual-length) >> 8;
  497. }
  498. #endif /* USE_RDTSC */
  499. static long send_pulse_homebrew(unsigned long length)
  500. {
  501. if (length <= 0)
  502. return 0;
  503. if (softcarrier)
  504. return send_pulse_homebrew_softcarrier(length);
  505. else {
  506. on();
  507. safe_udelay(length);
  508. return 0;
  509. }
  510. }
  511. static void send_space_irdeo(long length)
  512. {
  513. if (length <= 0)
  514. return;
  515. safe_udelay(length);
  516. }
  517. static void send_space_homebrew(long length)
  518. {
  519. off();
  520. if (length <= 0)
  521. return;
  522. safe_udelay(length);
  523. }
  524. static void rbwrite(int l)
  525. {
  526. if (lirc_buffer_full(&rbuf)) {
  527. /* no new signals will be accepted */
  528. dprintk("Buffer overrun\n");
  529. return;
  530. }
  531. lirc_buffer_write(&rbuf, (void *)&l);
  532. }
  533. static void frbwrite(int l)
  534. {
  535. /* simple noise filter */
  536. static int pulse, space;
  537. static unsigned int ptr;
  538. if (ptr > 0 && (l & PULSE_BIT)) {
  539. pulse += l & PULSE_MASK;
  540. if (pulse > 250) {
  541. rbwrite(space);
  542. rbwrite(pulse | PULSE_BIT);
  543. ptr = 0;
  544. pulse = 0;
  545. }
  546. return;
  547. }
  548. if (!(l & PULSE_BIT)) {
  549. if (ptr == 0) {
  550. if (l > 20000) {
  551. space = l;
  552. ptr++;
  553. return;
  554. }
  555. } else {
  556. if (l > 20000) {
  557. space += pulse;
  558. if (space > PULSE_MASK)
  559. space = PULSE_MASK;
  560. space += l;
  561. if (space > PULSE_MASK)
  562. space = PULSE_MASK;
  563. pulse = 0;
  564. return;
  565. }
  566. rbwrite(space);
  567. rbwrite(pulse | PULSE_BIT);
  568. ptr = 0;
  569. pulse = 0;
  570. }
  571. }
  572. rbwrite(l);
  573. }
  574. static irqreturn_t irq_handler(int i, void *blah)
  575. {
  576. struct timeval tv;
  577. int counter, dcd;
  578. u8 status;
  579. long deltv;
  580. int data;
  581. static int last_dcd = -1;
  582. if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
  583. /* not our interrupt */
  584. return IRQ_NONE;
  585. }
  586. counter = 0;
  587. do {
  588. counter++;
  589. status = sinp(UART_MSR);
  590. if (counter > RS_ISR_PASS_LIMIT) {
  591. printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: "
  592. "We're caught!\n");
  593. break;
  594. }
  595. if ((status & hardware[type].signal_pin_change)
  596. && sense != -1) {
  597. /* get current time */
  598. do_gettimeofday(&tv);
  599. /* New mode, written by Trent Piepho
  600. <xyzzy@u.washington.edu>. */
  601. /*
  602. * The old format was not very portable.
  603. * We now use an int to pass pulses
  604. * and spaces to user space.
  605. *
  606. * If PULSE_BIT is set a pulse has been
  607. * received, otherwise a space has been
  608. * received. The driver needs to know if your
  609. * receiver is active high or active low, or
  610. * the space/pulse sense could be
  611. * inverted. The bits denoted by PULSE_MASK are
  612. * the length in microseconds. Lengths greater
  613. * than or equal to 16 seconds are clamped to
  614. * PULSE_MASK. All other bits are unused.
  615. * This is a much simpler interface for user
  616. * programs, as well as eliminating "out of
  617. * phase" errors with space/pulse
  618. * autodetection.
  619. */
  620. /* calc time since last interrupt in microseconds */
  621. dcd = (status & hardware[type].signal_pin) ? 1 : 0;
  622. if (dcd == last_dcd) {
  623. printk(KERN_WARNING LIRC_DRIVER_NAME
  624. ": ignoring spike: %d %d %lx %lx %lx %lx\n",
  625. dcd, sense,
  626. tv.tv_sec, lasttv.tv_sec,
  627. tv.tv_usec, lasttv.tv_usec);
  628. continue;
  629. }
  630. deltv = tv.tv_sec-lasttv.tv_sec;
  631. if (tv.tv_sec < lasttv.tv_sec ||
  632. (tv.tv_sec == lasttv.tv_sec &&
  633. tv.tv_usec < lasttv.tv_usec)) {
  634. printk(KERN_WARNING LIRC_DRIVER_NAME
  635. ": AIEEEE: your clock just jumped "
  636. "backwards\n");
  637. printk(KERN_WARNING LIRC_DRIVER_NAME
  638. ": %d %d %lx %lx %lx %lx\n",
  639. dcd, sense,
  640. tv.tv_sec, lasttv.tv_sec,
  641. tv.tv_usec, lasttv.tv_usec);
  642. data = PULSE_MASK;
  643. } else if (deltv > 15) {
  644. data = PULSE_MASK; /* really long time */
  645. if (!(dcd^sense)) {
  646. /* sanity check */
  647. printk(KERN_WARNING LIRC_DRIVER_NAME
  648. ": AIEEEE: "
  649. "%d %d %lx %lx %lx %lx\n",
  650. dcd, sense,
  651. tv.tv_sec, lasttv.tv_sec,
  652. tv.tv_usec, lasttv.tv_usec);
  653. /*
  654. * detecting pulse while this
  655. * MUST be a space!
  656. */
  657. sense = sense ? 0 : 1;
  658. }
  659. } else
  660. data = (int) (deltv*1000000 +
  661. tv.tv_usec -
  662. lasttv.tv_usec);
  663. frbwrite(dcd^sense ? data : (data|PULSE_BIT));
  664. lasttv = tv;
  665. last_dcd = dcd;
  666. wake_up_interruptible(&rbuf.wait_poll);
  667. }
  668. } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
  669. return IRQ_HANDLED;
  670. }
  671. static int hardware_init_port(void)
  672. {
  673. u8 scratch, scratch2, scratch3;
  674. /*
  675. * This is a simple port existence test, borrowed from the autoconfig
  676. * function in drivers/serial/8250.c
  677. */
  678. scratch = sinp(UART_IER);
  679. soutp(UART_IER, 0);
  680. #ifdef __i386__
  681. outb(0xff, 0x080);
  682. #endif
  683. scratch2 = sinp(UART_IER) & 0x0f;
  684. soutp(UART_IER, 0x0f);
  685. #ifdef __i386__
  686. outb(0x00, 0x080);
  687. #endif
  688. scratch3 = sinp(UART_IER) & 0x0f;
  689. soutp(UART_IER, scratch);
  690. if (scratch2 != 0 || scratch3 != 0x0f) {
  691. /* we fail, there's nothing here */
  692. printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test "
  693. "failed, cannot continue\n");
  694. return -EINVAL;
  695. }
  696. /* Set DLAB 0. */
  697. soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
  698. /* First of all, disable all interrupts */
  699. soutp(UART_IER, sinp(UART_IER) &
  700. (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
  701. /* Clear registers. */
  702. sinp(UART_LSR);
  703. sinp(UART_RX);
  704. sinp(UART_IIR);
  705. sinp(UART_MSR);
  706. #ifdef CONFIG_LIRC_SERIAL_NSLU2
  707. if (type == LIRC_NSLU2) {
  708. /* Setup NSLU2 UART */
  709. /* Enable UART */
  710. soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
  711. /* Disable Receiver data Time out interrupt */
  712. soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
  713. /* set out2 = interrupt unmask; off() doesn't set MCR
  714. on NSLU2 */
  715. soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
  716. }
  717. #endif
  718. /* Set line for power source */
  719. off();
  720. /* Clear registers again to be sure. */
  721. sinp(UART_LSR);
  722. sinp(UART_RX);
  723. sinp(UART_IIR);
  724. sinp(UART_MSR);
  725. switch (type) {
  726. case LIRC_IRDEO:
  727. case LIRC_IRDEO_REMOTE:
  728. /* setup port to 7N1 @ 115200 Baud */
  729. /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
  730. /* Set DLAB 1. */
  731. soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
  732. /* Set divisor to 1 => 115200 Baud */
  733. soutp(UART_DLM, 0);
  734. soutp(UART_DLL, 1);
  735. /* Set DLAB 0 + 7N1 */
  736. soutp(UART_LCR, UART_LCR_WLEN7);
  737. /* THR interrupt already disabled at this point */
  738. break;
  739. default:
  740. break;
  741. }
  742. return 0;
  743. }
  744. static int __devinit lirc_serial_probe(struct platform_device *dev)
  745. {
  746. int i, nlow, nhigh, result;
  747. result = request_irq(irq, irq_handler,
  748. IRQF_DISABLED | (share_irq ? IRQF_SHARED : 0),
  749. LIRC_DRIVER_NAME, (void *)&hardware);
  750. if (result < 0) {
  751. if (result == -EBUSY)
  752. printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n",
  753. irq);
  754. else if (result == -EINVAL)
  755. printk(KERN_ERR LIRC_DRIVER_NAME
  756. ": Bad irq number or handler\n");
  757. return result;
  758. }
  759. /* Reserve io region. */
  760. /*
  761. * Future MMAP-Developers: Attention!
  762. * For memory mapped I/O you *might* need to use ioremap() first,
  763. * for the NSLU2 it's done in boot code.
  764. */
  765. if (((iommap != 0)
  766. && (request_mem_region(iommap, 8 << ioshift,
  767. LIRC_DRIVER_NAME) == NULL))
  768. || ((iommap == 0)
  769. && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
  770. printk(KERN_ERR LIRC_DRIVER_NAME
  771. ": port %04x already in use\n", io);
  772. printk(KERN_WARNING LIRC_DRIVER_NAME
  773. ": use 'setserial /dev/ttySX uart none'\n");
  774. printk(KERN_WARNING LIRC_DRIVER_NAME
  775. ": or compile the serial port driver as module and\n");
  776. printk(KERN_WARNING LIRC_DRIVER_NAME
  777. ": make sure this module is loaded first\n");
  778. result = -EBUSY;
  779. goto exit_free_irq;
  780. }
  781. if (hardware_init_port() < 0) {
  782. result = -EINVAL;
  783. goto exit_release_region;
  784. }
  785. /* Initialize pulse/space widths */
  786. init_timing_params(duty_cycle, freq);
  787. /* If pin is high, then this must be an active low receiver. */
  788. if (sense == -1) {
  789. /* wait 1/2 sec for the power supply */
  790. msleep(500);
  791. /*
  792. * probe 9 times every 0.04s, collect "votes" for
  793. * active high/low
  794. */
  795. nlow = 0;
  796. nhigh = 0;
  797. for (i = 0; i < 9; i++) {
  798. if (sinp(UART_MSR) & hardware[type].signal_pin)
  799. nlow++;
  800. else
  801. nhigh++;
  802. msleep(40);
  803. }
  804. sense = (nlow >= nhigh ? 1 : 0);
  805. printk(KERN_INFO LIRC_DRIVER_NAME ": auto-detected active "
  806. "%s receiver\n", sense ? "low" : "high");
  807. } else
  808. printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active "
  809. "%s receiver\n", sense ? "low" : "high");
  810. dprintk("Interrupt %d, port %04x obtained\n", irq, io);
  811. return 0;
  812. exit_release_region:
  813. if (iommap != 0)
  814. release_mem_region(iommap, 8 << ioshift);
  815. else
  816. release_region(io, 8);
  817. exit_free_irq:
  818. free_irq(irq, (void *)&hardware);
  819. return result;
  820. }
  821. static int __devexit lirc_serial_remove(struct platform_device *dev)
  822. {
  823. free_irq(irq, (void *)&hardware);
  824. if (iommap != 0)
  825. release_mem_region(iommap, 8 << ioshift);
  826. else
  827. release_region(io, 8);
  828. return 0;
  829. }
  830. static int set_use_inc(void *data)
  831. {
  832. unsigned long flags;
  833. /* initialize timestamp */
  834. do_gettimeofday(&lasttv);
  835. spin_lock_irqsave(&hardware[type].lock, flags);
  836. /* Set DLAB 0. */
  837. soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
  838. soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
  839. spin_unlock_irqrestore(&hardware[type].lock, flags);
  840. return 0;
  841. }
  842. static void set_use_dec(void *data)
  843. { unsigned long flags;
  844. spin_lock_irqsave(&hardware[type].lock, flags);
  845. /* Set DLAB 0. */
  846. soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
  847. /* First of all, disable all interrupts */
  848. soutp(UART_IER, sinp(UART_IER) &
  849. (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
  850. spin_unlock_irqrestore(&hardware[type].lock, flags);
  851. }
  852. static ssize_t lirc_write(struct file *file, const char *buf,
  853. size_t n, loff_t *ppos)
  854. {
  855. int i, count;
  856. unsigned long flags;
  857. long delta = 0;
  858. int *wbuf;
  859. if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
  860. return -EBADF;
  861. count = n / sizeof(int);
  862. if (n % sizeof(int) || count % 2 == 0)
  863. return -EINVAL;
  864. wbuf = memdup_user(buf, n);
  865. if (IS_ERR(wbuf))
  866. return PTR_ERR(wbuf);
  867. spin_lock_irqsave(&hardware[type].lock, flags);
  868. if (type == LIRC_IRDEO) {
  869. /* DTR, RTS down */
  870. on();
  871. }
  872. for (i = 0; i < count; i++) {
  873. if (i%2)
  874. hardware[type].send_space(wbuf[i] - delta);
  875. else
  876. delta = hardware[type].send_pulse(wbuf[i]);
  877. }
  878. off();
  879. spin_unlock_irqrestore(&hardware[type].lock, flags);
  880. kfree(wbuf);
  881. return n;
  882. }
  883. static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
  884. {
  885. int result;
  886. __u32 value;
  887. switch (cmd) {
  888. case LIRC_GET_SEND_MODE:
  889. if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
  890. return -ENOIOCTLCMD;
  891. result = put_user(LIRC_SEND2MODE
  892. (hardware[type].features&LIRC_CAN_SEND_MASK),
  893. (__u32 *) arg);
  894. if (result)
  895. return result;
  896. break;
  897. case LIRC_SET_SEND_MODE:
  898. if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
  899. return -ENOIOCTLCMD;
  900. result = get_user(value, (__u32 *) arg);
  901. if (result)
  902. return result;
  903. /* only LIRC_MODE_PULSE supported */
  904. if (value != LIRC_MODE_PULSE)
  905. return -ENOSYS;
  906. break;
  907. case LIRC_GET_LENGTH:
  908. return -ENOSYS;
  909. break;
  910. case LIRC_SET_SEND_DUTY_CYCLE:
  911. dprintk("SET_SEND_DUTY_CYCLE\n");
  912. if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
  913. return -ENOIOCTLCMD;
  914. result = get_user(value, (__u32 *) arg);
  915. if (result)
  916. return result;
  917. if (value <= 0 || value > 100)
  918. return -EINVAL;
  919. return init_timing_params(value, freq);
  920. break;
  921. case LIRC_SET_SEND_CARRIER:
  922. dprintk("SET_SEND_CARRIER\n");
  923. if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
  924. return -ENOIOCTLCMD;
  925. result = get_user(value, (__u32 *) arg);
  926. if (result)
  927. return result;
  928. if (value > 500000 || value < 20000)
  929. return -EINVAL;
  930. return init_timing_params(duty_cycle, value);
  931. break;
  932. default:
  933. return lirc_dev_fop_ioctl(filep, cmd, arg);
  934. }
  935. return 0;
  936. }
  937. static const struct file_operations lirc_fops = {
  938. .owner = THIS_MODULE,
  939. .write = lirc_write,
  940. .unlocked_ioctl = lirc_ioctl,
  941. #ifdef CONFIG_COMPAT
  942. .compat_ioctl = lirc_ioctl,
  943. #endif
  944. .read = lirc_dev_fop_read,
  945. .poll = lirc_dev_fop_poll,
  946. .open = lirc_dev_fop_open,
  947. .release = lirc_dev_fop_close,
  948. .llseek = no_llseek,
  949. };
  950. static struct lirc_driver driver = {
  951. .name = LIRC_DRIVER_NAME,
  952. .minor = -1,
  953. .code_length = 1,
  954. .sample_rate = 0,
  955. .data = NULL,
  956. .add_to_buf = NULL,
  957. .rbuf = &rbuf,
  958. .set_use_inc = set_use_inc,
  959. .set_use_dec = set_use_dec,
  960. .fops = &lirc_fops,
  961. .dev = NULL,
  962. .owner = THIS_MODULE,
  963. };
  964. static struct platform_device *lirc_serial_dev;
  965. static int lirc_serial_suspend(struct platform_device *dev,
  966. pm_message_t state)
  967. {
  968. /* Set DLAB 0. */
  969. soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
  970. /* Disable all interrupts */
  971. soutp(UART_IER, sinp(UART_IER) &
  972. (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
  973. /* Clear registers. */
  974. sinp(UART_LSR);
  975. sinp(UART_RX);
  976. sinp(UART_IIR);
  977. sinp(UART_MSR);
  978. return 0;
  979. }
  980. /* twisty maze... need a forward-declaration here... */
  981. static void lirc_serial_exit(void);
  982. static int lirc_serial_resume(struct platform_device *dev)
  983. {
  984. unsigned long flags;
  985. if (hardware_init_port() < 0)
  986. return -EINVAL;
  987. spin_lock_irqsave(&hardware[type].lock, flags);
  988. /* Enable Interrupt */
  989. do_gettimeofday(&lasttv);
  990. soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
  991. off();
  992. lirc_buffer_clear(&rbuf);
  993. spin_unlock_irqrestore(&hardware[type].lock, flags);
  994. return 0;
  995. }
  996. static struct platform_driver lirc_serial_driver = {
  997. .probe = lirc_serial_probe,
  998. .remove = __devexit_p(lirc_serial_remove),
  999. .suspend = lirc_serial_suspend,
  1000. .resume = lirc_serial_resume,
  1001. .driver = {
  1002. .name = "lirc_serial",
  1003. .owner = THIS_MODULE,
  1004. },
  1005. };
  1006. static int __init lirc_serial_init(void)
  1007. {
  1008. int result;
  1009. /* Init read buffer. */
  1010. result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
  1011. if (result < 0)
  1012. return -ENOMEM;
  1013. result = platform_driver_register(&lirc_serial_driver);
  1014. if (result) {
  1015. printk("lirc register returned %d\n", result);
  1016. goto exit_buffer_free;
  1017. }
  1018. lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
  1019. if (!lirc_serial_dev) {
  1020. result = -ENOMEM;
  1021. goto exit_driver_unregister;
  1022. }
  1023. result = platform_device_add(lirc_serial_dev);
  1024. if (result)
  1025. goto exit_device_put;
  1026. return 0;
  1027. exit_device_put:
  1028. platform_device_put(lirc_serial_dev);
  1029. exit_driver_unregister:
  1030. platform_driver_unregister(&lirc_serial_driver);
  1031. exit_buffer_free:
  1032. lirc_buffer_free(&rbuf);
  1033. return result;
  1034. }
  1035. static void lirc_serial_exit(void)
  1036. {
  1037. platform_device_unregister(lirc_serial_dev);
  1038. platform_driver_unregister(&lirc_serial_driver);
  1039. lirc_buffer_free(&rbuf);
  1040. }
  1041. static int __init lirc_serial_init_module(void)
  1042. {
  1043. int result;
  1044. switch (type) {
  1045. case LIRC_HOMEBREW:
  1046. case LIRC_IRDEO:
  1047. case LIRC_IRDEO_REMOTE:
  1048. case LIRC_ANIMAX:
  1049. case LIRC_IGOR:
  1050. /* if nothing specified, use ttyS0/com1 and irq 4 */
  1051. io = io ? io : 0x3f8;
  1052. irq = irq ? irq : 4;
  1053. break;
  1054. #ifdef CONFIG_LIRC_SERIAL_NSLU2
  1055. case LIRC_NSLU2:
  1056. io = io ? io : IRQ_IXP4XX_UART2;
  1057. irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET);
  1058. iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS;
  1059. ioshift = ioshift ? ioshift : 2;
  1060. break;
  1061. #endif
  1062. default:
  1063. return -EINVAL;
  1064. }
  1065. if (!softcarrier) {
  1066. switch (type) {
  1067. case LIRC_HOMEBREW:
  1068. case LIRC_IGOR:
  1069. #ifdef CONFIG_LIRC_SERIAL_NSLU2
  1070. case LIRC_NSLU2:
  1071. #endif
  1072. hardware[type].features &=
  1073. ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
  1074. LIRC_CAN_SET_SEND_CARRIER);
  1075. break;
  1076. }
  1077. }
  1078. result = lirc_serial_init();
  1079. if (result)
  1080. return result;
  1081. driver.features = hardware[type].features;
  1082. driver.dev = &lirc_serial_dev->dev;
  1083. driver.minor = lirc_register_driver(&driver);
  1084. if (driver.minor < 0) {
  1085. printk(KERN_ERR LIRC_DRIVER_NAME
  1086. ": register_chrdev failed!\n");
  1087. lirc_serial_exit();
  1088. return -EIO;
  1089. }
  1090. return 0;
  1091. }
  1092. static void __exit lirc_serial_exit_module(void)
  1093. {
  1094. lirc_unregister_driver(driver.minor);
  1095. lirc_serial_exit();
  1096. dprintk("cleaned up module\n");
  1097. }
  1098. module_init(lirc_serial_init_module);
  1099. module_exit(lirc_serial_exit_module);
  1100. MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
  1101. MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
  1102. "Christoph Bartelmus, Andrei Tanas");
  1103. MODULE_LICENSE("GPL");
  1104. module_param(type, int, S_IRUGO);
  1105. MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
  1106. " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
  1107. " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
  1108. module_param(io, int, S_IRUGO);
  1109. MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
  1110. /* some architectures (e.g. intel xscale) have memory mapped registers */
  1111. module_param(iommap, bool, S_IRUGO);
  1112. MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
  1113. " (0 = no memory mapped io)");
  1114. /*
  1115. * some architectures (e.g. intel xscale) align the 8bit serial registers
  1116. * on 32bit word boundaries.
  1117. * See linux-kernel/serial/8250.c serial_in()/out()
  1118. */
  1119. module_param(ioshift, int, S_IRUGO);
  1120. MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
  1121. module_param(irq, int, S_IRUGO);
  1122. MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
  1123. module_param(share_irq, bool, S_IRUGO);
  1124. MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
  1125. module_param(sense, bool, S_IRUGO);
  1126. MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
  1127. " (0 = active high, 1 = active low )");
  1128. #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
  1129. module_param(txsense, bool, S_IRUGO);
  1130. MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
  1131. " (0 = active high, 1 = active low )");
  1132. #endif
  1133. module_param(softcarrier, bool, S_IRUGO);
  1134. MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
  1135. module_param(debug, bool, S_IRUGO | S_IWUSR);
  1136. MODULE_PARM_DESC(debug, "Enable debugging messages");