/drivers/staging/ath6kl/include/common/AR6002/addrs.h

https://bitbucket.org/slukk/jb-tsm-kernel-4.2 · C Header · 90 lines · 38 code · 15 blank · 37 comment · 3 complexity · 9df0a6d6be86cd9bdadcaf2e9713062d MD5 · raw file

  1. //------------------------------------------------------------------------------
  2. // Copyright (c) 2004-2010 Atheros Corporation. All rights reserved.
  3. //
  4. //
  5. // Permission to use, copy, modify, and/or distribute this software for any
  6. // purpose with or without fee is hereby granted, provided that the above
  7. // copyright notice and this permission notice appear in all copies.
  8. //
  9. // THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. // WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. // MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. // ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. // WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. // ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. // OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. //
  17. //
  18. //
  19. // Author(s): ="Atheros"
  20. //------------------------------------------------------------------------------
  21. #ifndef __ADDRS_H__
  22. #define __ADDRS_H__
  23. /*
  24. * Special AR6002 Addresses that may be needed by special
  25. * applications (e.g. ART) on the Host as well as Target.
  26. */
  27. #if defined(AR6002_REV2)
  28. #define AR6K_RAM_START 0x00500000
  29. #define TARG_RAM_OFFSET(vaddr) ((u32)(vaddr) & 0xfffff)
  30. #define TARG_RAM_SZ (184*1024)
  31. #define TARG_ROM_SZ (80*1024)
  32. #endif
  33. #if defined(AR6002_REV4) || defined(AR6003)
  34. #define AR6K_RAM_START 0x00540000
  35. #define TARG_RAM_OFFSET(vaddr) (((u32)(vaddr) & 0xfffff) - 0x40000)
  36. #define TARG_RAM_SZ (256*1024)
  37. #define TARG_ROM_SZ (256*1024)
  38. #endif
  39. #define AR6002_BOARD_DATA_SZ 768
  40. #define AR6002_BOARD_EXT_DATA_SZ 0
  41. #define AR6003_BOARD_DATA_SZ 1024
  42. #define AR6003_BOARD_EXT_DATA_SZ 768
  43. #define AR6K_RAM_ADDR(byte_offset) (AR6K_RAM_START+(byte_offset))
  44. #define TARG_RAM_ADDRS(byte_offset) AR6K_RAM_ADDR(byte_offset)
  45. #define AR6K_ROM_START 0x004e0000
  46. #define TARG_ROM_OFFSET(vaddr) (((u32)(vaddr) & 0x1fffff) - 0xe0000)
  47. #define AR6K_ROM_ADDR(byte_offset) (AR6K_ROM_START+(byte_offset))
  48. #define TARG_ROM_ADDRS(byte_offset) AR6K_ROM_ADDR(byte_offset)
  49. /*
  50. * At this ROM address is a pointer to the start of the ROM DataSet Index.
  51. * If there are no ROM DataSets, there's a 0 at this address.
  52. */
  53. #define ROM_DATASET_INDEX_ADDR (TARG_ROM_ADDRS(TARG_ROM_SZ)-8)
  54. #define ROM_MBIST_CKSUM_ADDR (TARG_ROM_ADDRS(TARG_ROM_SZ)-4)
  55. /*
  56. * The API A_BOARD_DATA_ADDR() is the proper way to get a read pointer to
  57. * board data.
  58. */
  59. /* Size of Board Data, in bytes */
  60. #if defined(AR6002_REV4) || defined(AR6003)
  61. #define BOARD_DATA_SZ AR6003_BOARD_DATA_SZ
  62. #else
  63. #define BOARD_DATA_SZ AR6002_BOARD_DATA_SZ
  64. #endif
  65. /*
  66. * Constants used by ASM code to access fields of host_interest_s,
  67. * which is at a fixed location in RAM.
  68. */
  69. #if defined(AR6002_REV4) || defined(AR6003)
  70. #define HOST_INTEREST_FLASH_IS_PRESENT_ADDR (AR6K_RAM_START + 0x60c)
  71. #else
  72. #define HOST_INTEREST_FLASH_IS_PRESENT_ADDR (AR6K_RAM_START + 0x40c)
  73. #endif
  74. #define FLASH_IS_PRESENT_TARGADDR HOST_INTEREST_FLASH_IS_PRESENT_ADDR
  75. #endif /* __ADDRS_H__ */