/drivers/staging/ath6kl/hif/common/hif_sdio_common.h
C Header | 87 lines | 42 code | 12 blank | 33 comment | 1 complexity | 3bc60d06afe62cb5a01658f18fe73242 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
1//------------------------------------------------------------------------------
2// Copyright (c) 2009-2010 Atheros Corporation. All rights reserved.
3//
4//
5// Permission to use, copy, modify, and/or distribute this software for any
6// purpose with or without fee is hereby granted, provided that the above
7// copyright notice and this permission notice appear in all copies.
8//
9// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16//
17//
18//------------------------------------------------------------------------------
19//==============================================================================
20// common header file for HIF modules designed for SDIO
21//
22// Author(s): ="Atheros"
23//==============================================================================
24
25#ifndef HIF_SDIO_COMMON_H_
26#define HIF_SDIO_COMMON_H_
27
28 /* SDIO manufacturer ID and Codes */
29#define MANUFACTURER_ID_AR6002_BASE 0x200
30#define MANUFACTURER_ID_AR6003_BASE 0x300
31#define MANUFACTURER_ID_AR6K_BASE_MASK 0xFF00
32#define FUNCTION_CLASS 0x0
33#define MANUFACTURER_CODE 0x271 /* Atheros */
34
35 /* Mailbox address in SDIO address space */
36#define HIF_MBOX_BASE_ADDR 0x800
37#define HIF_MBOX_WIDTH 0x800
38#define HIF_MBOX_START_ADDR(mbox) \
39 ( HIF_MBOX_BASE_ADDR + mbox * HIF_MBOX_WIDTH)
40
41#define HIF_MBOX_END_ADDR(mbox) \
42 (HIF_MBOX_START_ADDR(mbox) + HIF_MBOX_WIDTH - 1)
43
44 /* extended MBOX address for larger MBOX writes to MBOX 0*/
45#define HIF_MBOX0_EXTENDED_BASE_ADDR 0x2800
46#define HIF_MBOX0_EXTENDED_WIDTH_AR6002 (6*1024)
47#define HIF_MBOX0_EXTENDED_WIDTH_AR6003 (18*1024)
48
49 /* version 1 of the chip has only a 12K extended mbox range */
50#define HIF_MBOX0_EXTENDED_BASE_ADDR_AR6003_V1 0x4000
51#define HIF_MBOX0_EXTENDED_WIDTH_AR6003_V1 (12*1024)
52
53 /* GMBOX addresses */
54#define HIF_GMBOX_BASE_ADDR 0x7000
55#define HIF_GMBOX_WIDTH 0x4000
56
57 /* for SDIO we recommend a 128-byte block size */
58#define HIF_DEFAULT_IO_BLOCK_SIZE 128
59
60 /* set extended MBOX window information for SDIO interconnects */
61static INLINE void SetExtendedMboxWindowInfo(u16 Manfid, struct hif_device_mbox_info *pInfo)
62{
63 switch (Manfid & MANUFACTURER_ID_AR6K_BASE_MASK) {
64 case MANUFACTURER_ID_AR6002_BASE :
65 /* MBOX 0 has an extended range */
66 pInfo->MboxProp[0].ExtendedAddress = HIF_MBOX0_EXTENDED_BASE_ADDR;
67 pInfo->MboxProp[0].ExtendedSize = HIF_MBOX0_EXTENDED_WIDTH_AR6002;
68 break;
69 case MANUFACTURER_ID_AR6003_BASE :
70 /* MBOX 0 has an extended range */
71 pInfo->MboxProp[0].ExtendedAddress = HIF_MBOX0_EXTENDED_BASE_ADDR_AR6003_V1;
72 pInfo->MboxProp[0].ExtendedSize = HIF_MBOX0_EXTENDED_WIDTH_AR6003_V1;
73 pInfo->GMboxAddress = HIF_GMBOX_BASE_ADDR;
74 pInfo->GMboxSize = HIF_GMBOX_WIDTH;
75 break;
76 default:
77 A_ASSERT(false);
78 break;
79 }
80}
81
82/* special CCCR (func 0) registers */
83
84#define CCCR_SDIO_IRQ_MODE_REG 0xF0 /* interrupt mode register */
85#define SDIO_IRQ_MODE_ASYNC_4BIT_IRQ (1 << 0) /* mode to enable special 4-bit interrupt assertion without clock*/
86
87#endif /*HIF_SDIO_COMMON_H_*/