/drivers/net/wireless/bcm4329/include/siutils.h

https://bitbucket.org/slukk/jb-tsm-kernel-4.2 · C Header · 235 lines · 156 code · 53 blank · 26 comment · 2 complexity · 0fc27f2a77436b1c675877af1cc55ca6 MD5 · raw file

  1. /*
  2. * Misc utility routines for accessing the SOC Interconnects
  3. * of Broadcom HNBU chips.
  4. *
  5. * Copyright (C) 1999-2010, Broadcom Corporation
  6. *
  7. * Unless you and Broadcom execute a separate written software license
  8. * agreement governing use of this software, this software is licensed to you
  9. * under the terms of the GNU General Public License version 2 (the "GPL"),
  10. * available at http://www.broadcom.com/licenses/GPLv2.php, with the
  11. * following added to such license:
  12. *
  13. * As a special exception, the copyright holders of this software give you
  14. * permission to link this software with independent modules, and to copy and
  15. * distribute the resulting executable under terms of your choice, provided that
  16. * you also meet, for each linked independent module, the terms and conditions of
  17. * the license of that module. An independent module is a module which is not
  18. * derived from this software. The special exception does not apply to any
  19. * modifications of the software.
  20. *
  21. * Notwithstanding the above, under no circumstances may you combine this
  22. * software in any way with any other Broadcom software provided under a license
  23. * other than the GPL, without Broadcom's express prior written consent.
  24. *
  25. * $Id: siutils.h,v 13.197.4.2.4.3.8.16 2010/06/23 21:36:05 Exp $
  26. */
  27. #ifndef _siutils_h_
  28. #define _siutils_h_
  29. struct si_pub {
  30. uint socitype;
  31. uint bustype;
  32. uint buscoretype;
  33. uint buscorerev;
  34. uint buscoreidx;
  35. int ccrev;
  36. uint32 cccaps;
  37. int pmurev;
  38. uint32 pmucaps;
  39. uint boardtype;
  40. uint boardvendor;
  41. uint boardflags;
  42. uint chip;
  43. uint chiprev;
  44. uint chippkg;
  45. uint32 chipst;
  46. bool issim;
  47. uint socirev;
  48. bool pci_pr32414;
  49. };
  50. #if defined(WLC_HIGH) && !defined(WLC_LOW)
  51. typedef struct si_pub si_t;
  52. #else
  53. typedef const struct si_pub si_t;
  54. #endif
  55. #define SI_OSH NULL
  56. #define XTAL 0x1
  57. #define PLL 0x2
  58. #define CLK_FAST 0
  59. #define CLK_DYNAMIC 2
  60. #define GPIO_DRV_PRIORITY 0
  61. #define GPIO_APP_PRIORITY 1
  62. #define GPIO_HI_PRIORITY 2
  63. #define GPIO_PULLUP 0
  64. #define GPIO_PULLDN 1
  65. #define GPIO_REGEVT 0
  66. #define GPIO_REGEVT_INTMSK 1
  67. #define GPIO_REGEVT_INTPOL 2
  68. #define SI_DEVPATH_BUFSZ 16
  69. #define SI_DOATTACH 1
  70. #define SI_PCIDOWN 2
  71. #define SI_PCIUP 3
  72. #define ISSIM_ENAB(sih) 0
  73. #if defined(BCMPMUCTL)
  74. #define PMUCTL_ENAB(sih) (BCMPMUCTL)
  75. #else
  76. #define PMUCTL_ENAB(sih) ((sih)->cccaps & CC_CAP_PMU)
  77. #endif
  78. #if defined(BCMPMUCTL) && BCMPMUCTL
  79. #define CCCTL_ENAB(sih) (0)
  80. #define CCPLL_ENAB(sih) (0)
  81. #else
  82. #define CCCTL_ENAB(sih) ((sih)->cccaps & CC_CAP_PWR_CTL)
  83. #define CCPLL_ENAB(sih) ((sih)->cccaps & CC_CAP_PLL_MASK)
  84. #endif
  85. typedef void (*gpio_handler_t)(uint32 stat, void *arg);
  86. extern si_t *si_attach(uint pcidev, osl_t *osh, void *regs, uint bustype,
  87. void *sdh, char **vars, uint *varsz);
  88. extern si_t *si_kattach(osl_t *osh);
  89. extern void si_detach(si_t *sih);
  90. extern bool si_pci_war16165(si_t *sih);
  91. extern uint si_corelist(si_t *sih, uint coreid[]);
  92. extern uint si_coreid(si_t *sih);
  93. extern uint si_flag(si_t *sih);
  94. extern uint si_intflag(si_t *sih);
  95. extern uint si_coreidx(si_t *sih);
  96. extern uint si_coreunit(si_t *sih);
  97. extern uint si_corevendor(si_t *sih);
  98. extern uint si_corerev(si_t *sih);
  99. extern void *si_osh(si_t *sih);
  100. extern void si_setosh(si_t *sih, osl_t *osh);
  101. extern uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val);
  102. extern void *si_coreregs(si_t *sih);
  103. extern void si_write_wrapperreg(si_t *sih, uint32 offset, uint32 val);
  104. extern uint32 si_core_cflags(si_t *sih, uint32 mask, uint32 val);
  105. extern void si_core_cflags_wo(si_t *sih, uint32 mask, uint32 val);
  106. extern uint32 si_core_sflags(si_t *sih, uint32 mask, uint32 val);
  107. extern bool si_iscoreup(si_t *sih);
  108. extern uint si_findcoreidx(si_t *sih, uint coreid, uint coreunit);
  109. extern void *si_setcoreidx(si_t *sih, uint coreidx);
  110. extern void *si_setcore(si_t *sih, uint coreid, uint coreunit);
  111. extern void *si_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val);
  112. extern void si_restore_core(si_t *sih, uint coreid, uint intr_val);
  113. extern int si_numaddrspaces(si_t *sih);
  114. extern uint32 si_addrspace(si_t *sih, uint asidx);
  115. extern uint32 si_addrspacesize(si_t *sih, uint asidx);
  116. extern int si_corebist(si_t *sih);
  117. extern void si_core_reset(si_t *sih, uint32 bits, uint32 resetbits);
  118. extern void si_core_tofixup(si_t *sih);
  119. extern void si_core_disable(si_t *sih, uint32 bits);
  120. extern uint32 si_clock_rate(uint32 pll_type, uint32 n, uint32 m);
  121. extern uint32 si_clock(si_t *sih);
  122. extern void si_clock_pmu_spuravoid(si_t *sih, bool spuravoid);
  123. extern uint32 si_alp_clock(si_t *sih);
  124. extern uint32 si_ilp_clock(si_t *sih);
  125. extern void si_pci_setup(si_t *sih, uint coremask);
  126. extern void si_pcmcia_init(si_t *sih);
  127. extern void si_setint(si_t *sih, int siflag);
  128. extern bool si_backplane64(si_t *sih);
  129. extern void si_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn,
  130. void *intrsenabled_fn, void *intr_arg);
  131. extern void si_deregister_intr_callback(si_t *sih);
  132. extern void si_clkctl_init(si_t *sih);
  133. extern uint16 si_clkctl_fast_pwrup_delay(si_t *sih);
  134. extern bool si_clkctl_cc(si_t *sih, uint mode);
  135. extern int si_clkctl_xtal(si_t *sih, uint what, bool on);
  136. extern uint32 si_gpiotimerval(si_t *sih, uint32 mask, uint32 val);
  137. extern bool si_backplane64(si_t *sih);
  138. extern void si_btcgpiowar(si_t *sih);
  139. extern bool si_deviceremoved(si_t *sih);
  140. extern uint32 si_socram_size(si_t *sih);
  141. extern void si_watchdog(si_t *sih, uint ticks);
  142. extern void si_watchdog_ms(si_t *sih, uint32 ms);
  143. extern void *si_gpiosetcore(si_t *sih);
  144. extern uint32 si_gpiocontrol(si_t *sih, uint32 mask, uint32 val, uint8 priority);
  145. extern uint32 si_gpioouten(si_t *sih, uint32 mask, uint32 val, uint8 priority);
  146. extern uint32 si_gpioout(si_t *sih, uint32 mask, uint32 val, uint8 priority);
  147. extern uint32 si_gpioin(si_t *sih);
  148. extern uint32 si_gpiointpolarity(si_t *sih, uint32 mask, uint32 val, uint8 priority);
  149. extern uint32 si_gpiointmask(si_t *sih, uint32 mask, uint32 val, uint8 priority);
  150. extern uint32 si_gpioled(si_t *sih, uint32 mask, uint32 val);
  151. extern uint32 si_gpioreserve(si_t *sih, uint32 gpio_num, uint8 priority);
  152. extern uint32 si_gpiorelease(si_t *sih, uint32 gpio_num, uint8 priority);
  153. extern uint32 si_gpiopull(si_t *sih, bool updown, uint32 mask, uint32 val);
  154. extern uint32 si_gpioevent(si_t *sih, uint regtype, uint32 mask, uint32 val);
  155. extern uint32 si_gpio_int_enable(si_t *sih, bool enable);
  156. extern void *si_gpio_handler_register(si_t *sih, uint32 e, bool lev, gpio_handler_t cb, void *arg);
  157. extern void si_gpio_handler_unregister(si_t *sih, void* gpioh);
  158. extern void si_gpio_handler_process(si_t *sih);
  159. extern bool si_pci_pmecap(si_t *sih);
  160. struct osl_info;
  161. extern bool si_pci_fastpmecap(struct osl_info *osh);
  162. extern bool si_pci_pmeclr(si_t *sih);
  163. extern void si_pci_pmeen(si_t *sih);
  164. extern uint si_pcie_readreg(void *sih, uint addrtype, uint offset);
  165. extern void si_sdio_init(si_t *sih);
  166. extern uint16 si_d11_devid(si_t *sih);
  167. extern int si_corepciid(si_t *sih, uint func, uint16 *pcivendor, uint16 *pcidevice,
  168. uint8 *pciclass, uint8 *pcisubclass, uint8 *pciprogif, uint8 *pciheader);
  169. #define si_eci_init(sih) (0)
  170. #define si_eci_notify_bt(sih, type, val, interrupt) (0)
  171. extern int si_devpath(si_t *sih, char *path, int size);
  172. extern char *si_getdevpathvar(si_t *sih, const char *name);
  173. extern int si_getdevpathintvar(si_t *sih, const char *name);
  174. extern uint8 si_pcieclkreq(si_t *sih, uint32 mask, uint32 val);
  175. extern void si_war42780_clkreq(si_t *sih, bool clkreq);
  176. extern void si_pci_sleep(si_t *sih);
  177. extern void si_pci_down(si_t *sih);
  178. extern void si_pci_up(si_t *sih);
  179. extern void si_pcie_war_ovr_disable(si_t *sih);
  180. extern void si_pcie_extendL1timer(si_t *sih, bool extend);
  181. extern int si_pci_fixcfg(si_t *sih);
  182. #endif