/drivers/net/wireless/bcm4329/include/sbconfig.h
C Header | 276 lines | 198 code | 53 blank | 25 comment | 0 complexity | 3cd59490a8279564c19556222c81436a MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
1/*
2 * Broadcom SiliconBackplane hardware register definitions.
3 *
4 * Copyright (C) 1999-2010, Broadcom Corporation
5 *
6 * Unless you and Broadcom execute a separate written software license
7 * agreement governing use of this software, this software is licensed to you
8 * under the terms of the GNU General Public License version 2 (the "GPL"),
9 * available at http://www.broadcom.com/licenses/GPLv2.php, with the
10 * following added to such license:
11 *
12 * As a special exception, the copyright holders of this software give you
13 * permission to link this software with independent modules, and to copy and
14 * distribute the resulting executable under terms of your choice, provided that
15 * you also meet, for each linked independent module, the terms and conditions of
16 * the license of that module. An independent module is a module which is not
17 * derived from this software. The special exception does not apply to any
18 * modifications of the software.
19 *
20 * Notwithstanding the above, under no circumstances may you combine this
21 * software in any way with any other Broadcom software provided under a license
22 * other than the GPL, without Broadcom's express prior written consent.
23 *
24 * $Id: sbconfig.h,v 13.67.30.1 2008/05/07 20:17:27 Exp $
25 */
26
27
28#ifndef _SBCONFIG_H
29#define _SBCONFIG_H
30
31
32#ifndef PAD
33#define _PADLINE(line) pad ## line
34#define _XSTR(line) _PADLINE(line)
35#define PAD _XSTR(__LINE__)
36#endif
37
38
39#define SB_BUS_SIZE 0x10000
40#define SB_BUS_BASE(b) (SI_ENUM_BASE + (b) * SB_BUS_SIZE)
41#define SB_BUS_MAXCORES (SB_BUS_SIZE / SI_CORE_SIZE)
42
43
44#define SBCONFIGOFF 0xf00
45#define SBCONFIGSIZE 256
46
47#define SBIPSFLAG 0x08
48#define SBTPSFLAG 0x18
49#define SBTMERRLOGA 0x48
50#define SBTMERRLOG 0x50
51#define SBADMATCH3 0x60
52#define SBADMATCH2 0x68
53#define SBADMATCH1 0x70
54#define SBIMSTATE 0x90
55#define SBINTVEC 0x94
56#define SBTMSTATELOW 0x98
57#define SBTMSTATEHIGH 0x9c
58#define SBBWA0 0xa0
59#define SBIMCONFIGLOW 0xa8
60#define SBIMCONFIGHIGH 0xac
61#define SBADMATCH0 0xb0
62#define SBTMCONFIGLOW 0xb8
63#define SBTMCONFIGHIGH 0xbc
64#define SBBCONFIG 0xc0
65#define SBBSTATE 0xc8
66#define SBACTCNFG 0xd8
67#define SBFLAGST 0xe8
68#define SBIDLOW 0xf8
69#define SBIDHIGH 0xfc
70
71
72
73#define SBIMERRLOGA 0xea8
74#define SBIMERRLOG 0xeb0
75#define SBTMPORTCONNID0 0xed8
76#define SBTMPORTLOCK0 0xef8
77
78#ifndef _LANGUAGE_ASSEMBLY
79
80typedef volatile struct _sbconfig {
81 uint32 PAD[2];
82 uint32 sbipsflag;
83 uint32 PAD[3];
84 uint32 sbtpsflag;
85 uint32 PAD[11];
86 uint32 sbtmerrloga;
87 uint32 PAD;
88 uint32 sbtmerrlog;
89 uint32 PAD[3];
90 uint32 sbadmatch3;
91 uint32 PAD;
92 uint32 sbadmatch2;
93 uint32 PAD;
94 uint32 sbadmatch1;
95 uint32 PAD[7];
96 uint32 sbimstate;
97 uint32 sbintvec;
98 uint32 sbtmstatelow;
99 uint32 sbtmstatehigh;
100 uint32 sbbwa0;
101 uint32 PAD;
102 uint32 sbimconfiglow;
103 uint32 sbimconfighigh;
104 uint32 sbadmatch0;
105 uint32 PAD;
106 uint32 sbtmconfiglow;
107 uint32 sbtmconfighigh;
108 uint32 sbbconfig;
109 uint32 PAD;
110 uint32 sbbstate;
111 uint32 PAD[3];
112 uint32 sbactcnfg;
113 uint32 PAD[3];
114 uint32 sbflagst;
115 uint32 PAD[3];
116 uint32 sbidlow;
117 uint32 sbidhigh;
118} sbconfig_t;
119
120#endif
121
122
123#define SBIPS_INT1_MASK 0x3f
124#define SBIPS_INT1_SHIFT 0
125#define SBIPS_INT2_MASK 0x3f00
126#define SBIPS_INT2_SHIFT 8
127#define SBIPS_INT3_MASK 0x3f0000
128#define SBIPS_INT3_SHIFT 16
129#define SBIPS_INT4_MASK 0x3f000000
130#define SBIPS_INT4_SHIFT 24
131
132
133#define SBTPS_NUM0_MASK 0x3f
134#define SBTPS_F0EN0 0x40
135
136
137#define SBTMEL_CM 0x00000007
138#define SBTMEL_CI 0x0000ff00
139#define SBTMEL_EC 0x0f000000
140#define SBTMEL_ME 0x80000000
141
142
143#define SBIM_PC 0xf
144#define SBIM_AP_MASK 0x30
145#define SBIM_AP_BOTH 0x00
146#define SBIM_AP_TS 0x10
147#define SBIM_AP_TK 0x20
148#define SBIM_AP_RSV 0x30
149#define SBIM_IBE 0x20000
150#define SBIM_TO 0x40000
151#define SBIM_BY 0x01800000
152#define SBIM_RJ 0x02000000
153
154
155#define SBTML_RESET 0x0001
156#define SBTML_REJ_MASK 0x0006
157#define SBTML_REJ 0x0002
158#define SBTML_TMPREJ 0x0004
159
160#define SBTML_SICF_SHIFT 16
161
162
163#define SBTMH_SERR 0x0001
164#define SBTMH_INT 0x0002
165#define SBTMH_BUSY 0x0004
166#define SBTMH_TO 0x0020
167
168#define SBTMH_SISF_SHIFT 16
169
170
171#define SBBWA_TAB0_MASK 0xffff
172#define SBBWA_TAB1_MASK 0xffff
173#define SBBWA_TAB1_SHIFT 16
174
175
176#define SBIMCL_STO_MASK 0x7
177#define SBIMCL_RTO_MASK 0x70
178#define SBIMCL_RTO_SHIFT 4
179#define SBIMCL_CID_MASK 0xff0000
180#define SBIMCL_CID_SHIFT 16
181
182
183#define SBIMCH_IEM_MASK 0xc
184#define SBIMCH_TEM_MASK 0x30
185#define SBIMCH_TEM_SHIFT 4
186#define SBIMCH_BEM_MASK 0xc0
187#define SBIMCH_BEM_SHIFT 6
188
189
190#define SBAM_TYPE_MASK 0x3
191#define SBAM_AD64 0x4
192#define SBAM_ADINT0_MASK 0xf8
193#define SBAM_ADINT0_SHIFT 3
194#define SBAM_ADINT1_MASK 0x1f8
195#define SBAM_ADINT1_SHIFT 3
196#define SBAM_ADINT2_MASK 0x1f8
197#define SBAM_ADINT2_SHIFT 3
198#define SBAM_ADEN 0x400
199#define SBAM_ADNEG 0x800
200#define SBAM_BASE0_MASK 0xffffff00
201#define SBAM_BASE0_SHIFT 8
202#define SBAM_BASE1_MASK 0xfffff000
203#define SBAM_BASE1_SHIFT 12
204#define SBAM_BASE2_MASK 0xffff0000
205#define SBAM_BASE2_SHIFT 16
206
207
208#define SBTMCL_CD_MASK 0xff
209#define SBTMCL_CO_MASK 0xf800
210#define SBTMCL_CO_SHIFT 11
211#define SBTMCL_IF_MASK 0xfc0000
212#define SBTMCL_IF_SHIFT 18
213#define SBTMCL_IM_MASK 0x3000000
214#define SBTMCL_IM_SHIFT 24
215
216
217#define SBTMCH_BM_MASK 0x3
218#define SBTMCH_RM_MASK 0x3
219#define SBTMCH_RM_SHIFT 2
220#define SBTMCH_SM_MASK 0x30
221#define SBTMCH_SM_SHIFT 4
222#define SBTMCH_EM_MASK 0x300
223#define SBTMCH_EM_SHIFT 8
224#define SBTMCH_IM_MASK 0xc00
225#define SBTMCH_IM_SHIFT 10
226
227
228#define SBBC_LAT_MASK 0x3
229#define SBBC_MAX0_MASK 0xf0000
230#define SBBC_MAX0_SHIFT 16
231#define SBBC_MAX1_MASK 0xf00000
232#define SBBC_MAX1_SHIFT 20
233
234
235#define SBBS_SRD 0x1
236#define SBBS_HRD 0x2
237
238
239#define SBIDL_CS_MASK 0x3
240#define SBIDL_AR_MASK 0x38
241#define SBIDL_AR_SHIFT 3
242#define SBIDL_SYNCH 0x40
243#define SBIDL_INIT 0x80
244#define SBIDL_MINLAT_MASK 0xf00
245#define SBIDL_MINLAT_SHIFT 8
246#define SBIDL_MAXLAT 0xf000
247#define SBIDL_MAXLAT_SHIFT 12
248#define SBIDL_FIRST 0x10000
249#define SBIDL_CW_MASK 0xc0000
250#define SBIDL_CW_SHIFT 18
251#define SBIDL_TP_MASK 0xf00000
252#define SBIDL_TP_SHIFT 20
253#define SBIDL_IP_MASK 0xf000000
254#define SBIDL_IP_SHIFT 24
255#define SBIDL_RV_MASK 0xf0000000
256#define SBIDL_RV_SHIFT 28
257#define SBIDL_RV_2_2 0x00000000
258#define SBIDL_RV_2_3 0x10000000
259
260
261#define SBIDH_RC_MASK 0x000f
262#define SBIDH_RCE_MASK 0x7000
263#define SBIDH_RCE_SHIFT 8
264#define SBCOREREV(sbidh) \
265 ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK))
266#define SBIDH_CC_MASK 0x8ff0
267#define SBIDH_CC_SHIFT 4
268#define SBIDH_VC_MASK 0xffff0000
269#define SBIDH_VC_SHIFT 16
270
271#define SB_COMMIT 0xfd8
272
273
274#define SB_VEND_BCM 0x4243
275
276#endif