/contrib/bind9/lib/isc/sparc64/include/isc/atomic.h

  1/*
  2 * Copyright (C) 2005, 2007  Internet Systems Consortium, Inc. ("ISC")
  3 *
  4 * Permission to use, copy, modify, and/or distribute this software for any
  5 * purpose with or without fee is hereby granted, provided that the above
  6 * copyright notice and this permission notice appear in all copies.
  7 *
  8 * THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH
  9 * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
 10 * AND FITNESS.  IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT,
 11 * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
 12 * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
 13 * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
 14 * PERFORMANCE OF THIS SOFTWARE.
 15 */
 16
 17/* $Id: atomic.h,v 1.5 2007/06/19 23:47:18 tbox Exp $ */
 18
 19/*
 20 * This code was written based on FreeBSD's kernel source whose copyright
 21 * follows:
 22 */
 23
 24/*-
 25 * Copyright (c) 1998 Doug Rabson.
 26 * Copyright (c) 2001 Jake Burkholder.
 27 * All rights reserved.
 28 *
 29 * Redistribution and use in source and binary forms, with or without
 30 * modification, are permitted provided that the following conditions
 31 * are met:
 32 * 1. Redistributions of source code must retain the above copyright
 33 *    notice, this list of conditions and the following disclaimer.
 34 * 2. Redistributions in binary form must reproduce the above copyright
 35 *    notice, this list of conditions and the following disclaimer in the
 36 *    documentation and/or other materials provided with the distribution.
 37 *
 38 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 39 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 40 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 41 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 42 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 43 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 44 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 45 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 46 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 47 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 48 * SUCH DAMAGE.
 49 *
 50 *	from: FreeBSD: src/sys/i386/include/atomic.h,v 1.20 2001/02/11
 51 * $FreeBSD$
 52 */
 53
 54#ifndef ISC_ATOMIC_H
 55#define ISC_ATOMIC_H 1
 56
 57#include <isc/platform.h>
 58#include <isc/types.h>
 59
 60#define	ASI_P	0x80		/* Primary Address Space Identifier */
 61
 62#ifdef ISC_PLATFORM_USEGCCASM
 63
 64/*
 65 * This routine atomically increments the value stored in 'p' by 'val', and
 66 * returns the previous value.
 67 */
 68static inline isc_int32_t
 69isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) {
 70	isc_int32_t prev, swapped;
 71
 72	for (prev = *(volatile isc_int32_t *)p; ; prev = swapped) {
 73		swapped = prev + val;
 74		__asm__ volatile(
 75			"casa [%2] %3, %4, %0"
 76			: "+r"(swapped), "=m"(*p)
 77			: "r"(p), "n"(ASI_P), "r"(prev), "m"(*p));
 78		if (swapped == prev)
 79			break;
 80	}
 81
 82	return (prev);
 83}
 84
 85/*
 86 * This routine atomically stores the value 'val' in 'p'.
 87 */
 88static inline void
 89isc_atomic_store(isc_int32_t *p, isc_int32_t val) {
 90	isc_int32_t prev, swapped;
 91
 92	for (prev = *(volatile isc_int32_t *)p; ; prev = swapped) {
 93		swapped = val;
 94		__asm__ volatile(
 95			"casa [%2] %3, %4, %0"
 96			: "+r"(swapped), "=m"(*p)
 97			: "r"(p), "n"(ASI_P), "r"(prev), "m"(*p));
 98		if (swapped == prev)
 99			break;
100	}
101}
102
103/*
104 * This routine atomically replaces the value in 'p' with 'val', if the
105 * original value is equal to 'cmpval'.  The original value is returned in any
106 * case.
107 */
108static inline isc_int32_t
109isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) {
110	isc_int32_t temp = val;
111
112	__asm__ volatile(
113		"casa [%2] %3, %4, %0"
114		: "+r"(temp), "=m"(*p)
115		: "r"(p), "n"(ASI_P), "r"(cmpval), "m"(*p));
116
117	return (temp);
118}
119
120#else  /* ISC_PLATFORM_USEGCCASM */
121
122#error "unsupported compiler.  disable atomic ops by --disable-atomic"
123
124#endif /* ISC_PLATFORM_USEGCCASM */
125
126#endif /* ISC_ATOMIC_H */