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/drivers/net/hamradio/yam.c

https://bitbucket.org/ndreys/linux-sunxi
C | 1219 lines | 915 code | 183 blank | 121 comment | 141 complexity | d165811171be43fc45f600f0c99a17c6 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
   1/*****************************************************************************/
   2
   3/*
   4 *    yam.c  -- YAM radio modem driver.
   5 *
   6 *      Copyright (C) 1998 Frederic Rible F1OAT (frible@teaser.fr)
   7 *      Adapted from baycom.c driver written by Thomas Sailer (sailer@ife.ee.ethz.ch)
   8 *
   9 *      This program is free software; you can redistribute it and/or modify
  10 *      it under the terms of the GNU General Public License as published by
  11 *      the Free Software Foundation; either version 2 of the License, or
  12 *      (at your option) any later version.
  13 *
  14 *      This program is distributed in the hope that it will be useful,
  15 *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 *      GNU General Public License for more details.
  18 *
  19 *      You should have received a copy of the GNU General Public License
  20 *      along with this program; if not, write to the Free Software
  21 *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22 *
  23 *  Please note that the GPL allows you to use the driver, NOT the radio.
  24 *  In order to use the radio, you need a license from the communications
  25 *  authority of your country.
  26 *
  27 *
  28 *  History:
  29 *   0.0 F1OAT 06.06.98  Begin of work with baycom.c source code V 0.3
  30 *   0.1 F1OAT 07.06.98  Add timer polling routine for channel arbitration
  31 *   0.2 F6FBB 08.06.98  Added delay after FPGA programming
  32 *   0.3 F6FBB 29.07.98  Delayed PTT implementation for dupmode=2
  33 *   0.4 F6FBB 30.07.98  Added TxTail, Slottime and Persistence
  34 *   0.5 F6FBB 01.08.98  Shared IRQs, /proc/net and network statistics
  35 *   0.6 F6FBB 25.08.98  Added 1200Bds format
  36 *   0.7 F6FBB 12.09.98  Added to the kernel configuration
  37 *   0.8 F6FBB 14.10.98  Fixed slottime/persistence timing bug
  38 *       OK1ZIA 2.09.01  Fixed "kfree_skb on hard IRQ" 
  39 *                       using dev_kfree_skb_any(). (important in 2.4 kernel)
  40 *   
  41 */
  42
  43/*****************************************************************************/
  44
  45#include <linux/module.h>
  46#include <linux/types.h>
  47#include <linux/net.h>
  48#include <linux/in.h>
  49#include <linux/if.h>
  50#include <linux/slab.h>
  51#include <linux/errno.h>
  52#include <linux/bitops.h>
  53#include <linux/random.h>
  54#include <asm/io.h>
  55#include <asm/system.h>
  56#include <linux/interrupt.h>
  57#include <linux/ioport.h>
  58#include <linux/firmware.h>
  59#include <linux/platform_device.h>
  60
  61#include <linux/netdevice.h>
  62#include <linux/if_arp.h>
  63#include <linux/etherdevice.h>
  64#include <linux/skbuff.h>
  65#include <net/ax25.h>
  66
  67#include <linux/kernel.h>
  68#include <linux/proc_fs.h>
  69#include <linux/seq_file.h>
  70#include <net/net_namespace.h>
  71
  72#include <asm/uaccess.h>
  73#include <linux/init.h>
  74
  75#include <linux/yam.h>
  76
  77/* --------------------------------------------------------------------- */
  78
  79static const char yam_drvname[] = "yam";
  80static const char yam_drvinfo[] __initdata = KERN_INFO \
  81	"YAM driver version 0.8 by F1OAT/F6FBB\n";
  82
  83/* --------------------------------------------------------------------- */
  84
  85#define FIRMWARE_9600	"yam/9600.bin"
  86#define FIRMWARE_1200	"yam/1200.bin"
  87
  88#define YAM_9600	1
  89#define YAM_1200	2
  90
  91#define NR_PORTS	4
  92#define YAM_MAGIC	0xF10A7654
  93
  94/* Transmitter states */
  95
  96#define TX_OFF		0
  97#define TX_HEAD		1
  98#define TX_DATA		2
  99#define TX_CRC1		3
 100#define TX_CRC2		4
 101#define TX_TAIL		5
 102
 103#define YAM_MAX_FRAME	1024
 104
 105#define DEFAULT_BITRATE	9600			/* bps */
 106#define DEFAULT_HOLDD	10			/* sec */
 107#define DEFAULT_TXD	300			/* ms */
 108#define DEFAULT_TXTAIL	10			/* ms */
 109#define DEFAULT_SLOT	100			/* ms */
 110#define DEFAULT_PERS	64			/* 0->255 */
 111
 112struct yam_port {
 113	int magic;
 114	int bitrate;
 115	int baudrate;
 116	int iobase;
 117	int irq;
 118	int dupmode;
 119
 120	struct net_device *dev;
 121
 122	int nb_rxint;
 123	int nb_mdint;
 124
 125	/* Parameters section */
 126
 127	int txd;				/* tx delay */
 128	int holdd;				/* duplex ptt delay */
 129	int txtail;				/* txtail delay */
 130	int slot;				/* slottime */
 131	int pers;				/* persistence */
 132
 133	/* Tx section */
 134
 135	int tx_state;
 136	int tx_count;
 137	int slotcnt;
 138	unsigned char tx_buf[YAM_MAX_FRAME];
 139	int tx_len;
 140	int tx_crcl, tx_crch;
 141	struct sk_buff_head send_queue;		/* Packets awaiting transmission */
 142
 143	/* Rx section */
 144
 145	int dcd;
 146	unsigned char rx_buf[YAM_MAX_FRAME];
 147	int rx_len;
 148	int rx_crcl, rx_crch;
 149};
 150
 151struct yam_mcs {
 152	unsigned char bits[YAM_FPGA_SIZE];
 153	int bitrate;
 154	struct yam_mcs *next;
 155};
 156
 157static struct net_device *yam_devs[NR_PORTS];
 158
 159static struct yam_mcs *yam_data;
 160
 161static DEFINE_TIMER(yam_timer, NULL, 0, 0);
 162
 163/* --------------------------------------------------------------------- */
 164
 165#define RBR(iobase)	(iobase+0)
 166#define THR(iobase)	(iobase+0)
 167#define IER(iobase)	(iobase+1)
 168#define IIR(iobase)	(iobase+2)
 169#define FCR(iobase)	(iobase+2)
 170#define LCR(iobase)	(iobase+3)
 171#define MCR(iobase)	(iobase+4)
 172#define LSR(iobase)	(iobase+5)
 173#define MSR(iobase)	(iobase+6)
 174#define SCR(iobase)	(iobase+7)
 175#define DLL(iobase)	(iobase+0)
 176#define DLM(iobase)	(iobase+1)
 177
 178#define YAM_EXTENT	8
 179
 180/* Interrupt Identification Register Bit Masks */
 181#define IIR_NOPEND	1
 182#define IIR_MSR		0
 183#define IIR_TX		2
 184#define IIR_RX		4
 185#define IIR_LSR		6
 186#define IIR_TIMEOUT	12			/* Fifo mode only */
 187
 188#define IIR_MASK	0x0F
 189
 190/* Interrupt Enable Register Bit Masks */
 191#define IER_RX		1			/* enable rx interrupt */
 192#define IER_TX		2			/* enable tx interrupt */
 193#define IER_LSR		4			/* enable line status interrupts */
 194#define IER_MSR		8			/* enable modem status interrupts */
 195
 196/* Modem Control Register Bit Masks */
 197#define MCR_DTR		0x01			/* DTR output */
 198#define MCR_RTS		0x02			/* RTS output */
 199#define MCR_OUT1	0x04			/* OUT1 output (not accessible in RS232) */
 200#define MCR_OUT2	0x08			/* Master Interrupt enable (must be set on PCs) */
 201#define MCR_LOOP	0x10			/* Loopback enable */
 202
 203/* Modem Status Register Bit Masks */
 204#define MSR_DCTS	0x01			/* Delta CTS input */
 205#define MSR_DDSR	0x02			/* Delta DSR */
 206#define MSR_DRIN	0x04			/* Delta RI */
 207#define MSR_DDCD	0x08			/* Delta DCD */
 208#define MSR_CTS		0x10			/* CTS input */
 209#define MSR_DSR		0x20			/* DSR input */
 210#define MSR_RING	0x40			/* RI  input */
 211#define MSR_DCD		0x80			/* DCD input */
 212
 213/* line status register bit mask */
 214#define LSR_RXC		0x01
 215#define LSR_OE		0x02
 216#define LSR_PE		0x04
 217#define LSR_FE		0x08
 218#define LSR_BREAK	0x10
 219#define LSR_THRE	0x20
 220#define LSR_TSRE	0x40
 221
 222/* Line Control Register Bit Masks */
 223#define LCR_DLAB	0x80
 224#define LCR_BREAK	0x40
 225#define LCR_PZERO	0x28
 226#define LCR_PEVEN	0x18
 227#define LCR_PODD	0x08
 228#define LCR_STOP1	0x00
 229#define LCR_STOP2	0x04
 230#define LCR_BIT5	0x00
 231#define LCR_BIT6	0x02
 232#define LCR_BIT7	0x01
 233#define LCR_BIT8	0x03
 234
 235/* YAM Modem <-> UART Port mapping */
 236
 237#define TX_RDY		MSR_DCTS		/* transmitter ready to send */
 238#define RX_DCD		MSR_DCD			/* carrier detect */
 239#define RX_FLAG		MSR_RING		/* hdlc flag received */
 240#define FPGA_DONE	MSR_DSR			/* FPGA is configured */
 241#define PTT_ON		(MCR_RTS|MCR_OUT2)	/* activate PTT */
 242#define PTT_OFF		(MCR_DTR|MCR_OUT2)	/* release PTT */
 243
 244#define ENABLE_RXINT	IER_RX			/* enable uart rx interrupt during rx */
 245#define ENABLE_TXINT	IER_MSR			/* enable uart ms interrupt during tx */
 246#define ENABLE_RTXINT	(IER_RX|IER_MSR)	/* full duplex operations */
 247
 248
 249/*************************************************************************
 250* CRC Tables
 251************************************************************************/
 252
 253static const unsigned char chktabl[256] =
 254{0x00, 0x89, 0x12, 0x9b, 0x24, 0xad, 0x36, 0xbf, 0x48, 0xc1, 0x5a, 0xd3, 0x6c, 0xe5, 0x7e,
 255 0xf7, 0x81, 0x08, 0x93, 0x1a, 0xa5, 0x2c, 0xb7, 0x3e, 0xc9, 0x40, 0xdb, 0x52, 0xed, 0x64,
 256 0xff, 0x76, 0x02, 0x8b, 0x10, 0x99, 0x26, 0xaf, 0x34, 0xbd, 0x4a, 0xc3, 0x58, 0xd1, 0x6e,
 257 0xe7, 0x7c, 0xf5, 0x83, 0x0a, 0x91, 0x18, 0xa7, 0x2e, 0xb5, 0x3c, 0xcb, 0x42, 0xd9, 0x50,
 258 0xef, 0x66, 0xfd, 0x74, 0x04, 0x8d, 0x16, 0x9f, 0x20, 0xa9, 0x32, 0xbb, 0x4c, 0xc5, 0x5e,
 259 0xd7, 0x68, 0xe1, 0x7a, 0xf3, 0x85, 0x0c, 0x97, 0x1e, 0xa1, 0x28, 0xb3, 0x3a, 0xcd, 0x44,
 260 0xdf, 0x56, 0xe9, 0x60, 0xfb, 0x72, 0x06, 0x8f, 0x14, 0x9d, 0x22, 0xab, 0x30, 0xb9, 0x4e,
 261 0xc7, 0x5c, 0xd5, 0x6a, 0xe3, 0x78, 0xf1, 0x87, 0x0e, 0x95, 0x1c, 0xa3, 0x2a, 0xb1, 0x38,
 262 0xcf, 0x46, 0xdd, 0x54, 0xeb, 0x62, 0xf9, 0x70, 0x08, 0x81, 0x1a, 0x93, 0x2c, 0xa5, 0x3e,
 263 0xb7, 0x40, 0xc9, 0x52, 0xdb, 0x64, 0xed, 0x76, 0xff, 0x89, 0x00, 0x9b, 0x12, 0xad, 0x24,
 264 0xbf, 0x36, 0xc1, 0x48, 0xd3, 0x5a, 0xe5, 0x6c, 0xf7, 0x7e, 0x0a, 0x83, 0x18, 0x91, 0x2e,
 265 0xa7, 0x3c, 0xb5, 0x42, 0xcb, 0x50, 0xd9, 0x66, 0xef, 0x74, 0xfd, 0x8b, 0x02, 0x99, 0x10,
 266 0xaf, 0x26, 0xbd, 0x34, 0xc3, 0x4a, 0xd1, 0x58, 0xe7, 0x6e, 0xf5, 0x7c, 0x0c, 0x85, 0x1e,
 267 0x97, 0x28, 0xa1, 0x3a, 0xb3, 0x44, 0xcd, 0x56, 0xdf, 0x60, 0xe9, 0x72, 0xfb, 0x8d, 0x04,
 268 0x9f, 0x16, 0xa9, 0x20, 0xbb, 0x32, 0xc5, 0x4c, 0xd7, 0x5e, 0xe1, 0x68, 0xf3, 0x7a, 0x0e,
 269 0x87, 0x1c, 0x95, 0x2a, 0xa3, 0x38, 0xb1, 0x46, 0xcf, 0x54, 0xdd, 0x62, 0xeb, 0x70, 0xf9,
 270 0x8f, 0x06, 0x9d, 0x14, 0xab, 0x22, 0xb9, 0x30, 0xc7, 0x4e, 0xd5, 0x5c, 0xe3, 0x6a, 0xf1,
 271 0x78};
 272static const unsigned char chktabh[256] =
 273{0x00, 0x11, 0x23, 0x32, 0x46, 0x57, 0x65, 0x74, 0x8c, 0x9d, 0xaf, 0xbe, 0xca, 0xdb, 0xe9,
 274 0xf8, 0x10, 0x01, 0x33, 0x22, 0x56, 0x47, 0x75, 0x64, 0x9c, 0x8d, 0xbf, 0xae, 0xda, 0xcb,
 275 0xf9, 0xe8, 0x21, 0x30, 0x02, 0x13, 0x67, 0x76, 0x44, 0x55, 0xad, 0xbc, 0x8e, 0x9f, 0xeb,
 276 0xfa, 0xc8, 0xd9, 0x31, 0x20, 0x12, 0x03, 0x77, 0x66, 0x54, 0x45, 0xbd, 0xac, 0x9e, 0x8f,
 277 0xfb, 0xea, 0xd8, 0xc9, 0x42, 0x53, 0x61, 0x70, 0x04, 0x15, 0x27, 0x36, 0xce, 0xdf, 0xed,
 278 0xfc, 0x88, 0x99, 0xab, 0xba, 0x52, 0x43, 0x71, 0x60, 0x14, 0x05, 0x37, 0x26, 0xde, 0xcf,
 279 0xfd, 0xec, 0x98, 0x89, 0xbb, 0xaa, 0x63, 0x72, 0x40, 0x51, 0x25, 0x34, 0x06, 0x17, 0xef,
 280 0xfe, 0xcc, 0xdd, 0xa9, 0xb8, 0x8a, 0x9b, 0x73, 0x62, 0x50, 0x41, 0x35, 0x24, 0x16, 0x07,
 281 0xff, 0xee, 0xdc, 0xcd, 0xb9, 0xa8, 0x9a, 0x8b, 0x84, 0x95, 0xa7, 0xb6, 0xc2, 0xd3, 0xe1,
 282 0xf0, 0x08, 0x19, 0x2b, 0x3a, 0x4e, 0x5f, 0x6d, 0x7c, 0x94, 0x85, 0xb7, 0xa6, 0xd2, 0xc3,
 283 0xf1, 0xe0, 0x18, 0x09, 0x3b, 0x2a, 0x5e, 0x4f, 0x7d, 0x6c, 0xa5, 0xb4, 0x86, 0x97, 0xe3,
 284 0xf2, 0xc0, 0xd1, 0x29, 0x38, 0x0a, 0x1b, 0x6f, 0x7e, 0x4c, 0x5d, 0xb5, 0xa4, 0x96, 0x87,
 285 0xf3, 0xe2, 0xd0, 0xc1, 0x39, 0x28, 0x1a, 0x0b, 0x7f, 0x6e, 0x5c, 0x4d, 0xc6, 0xd7, 0xe5,
 286 0xf4, 0x80, 0x91, 0xa3, 0xb2, 0x4a, 0x5b, 0x69, 0x78, 0x0c, 0x1d, 0x2f, 0x3e, 0xd6, 0xc7,
 287 0xf5, 0xe4, 0x90, 0x81, 0xb3, 0xa2, 0x5a, 0x4b, 0x79, 0x68, 0x1c, 0x0d, 0x3f, 0x2e, 0xe7,
 288 0xf6, 0xc4, 0xd5, 0xa1, 0xb0, 0x82, 0x93, 0x6b, 0x7a, 0x48, 0x59, 0x2d, 0x3c, 0x0e, 0x1f,
 289 0xf7, 0xe6, 0xd4, 0xc5, 0xb1, 0xa0, 0x92, 0x83, 0x7b, 0x6a, 0x58, 0x49, 0x3d, 0x2c, 0x1e,
 290 0x0f};
 291
 292/*************************************************************************
 293* FPGA functions
 294************************************************************************/
 295
 296static void delay(int ms)
 297{
 298	unsigned long timeout = jiffies + ((ms * HZ) / 1000);
 299	while (time_before(jiffies, timeout))
 300		cpu_relax();
 301}
 302
 303/*
 304 * reset FPGA
 305 */
 306
 307static void fpga_reset(int iobase)
 308{
 309	outb(0, IER(iobase));
 310	outb(LCR_DLAB | LCR_BIT5, LCR(iobase));
 311	outb(1, DLL(iobase));
 312	outb(0, DLM(iobase));
 313
 314	outb(LCR_BIT5, LCR(iobase));
 315	inb(LSR(iobase));
 316	inb(MSR(iobase));
 317	/* turn off FPGA supply voltage */
 318	outb(MCR_OUT1 | MCR_OUT2, MCR(iobase));
 319	delay(100);
 320	/* turn on FPGA supply voltage again */
 321	outb(MCR_DTR | MCR_RTS | MCR_OUT1 | MCR_OUT2, MCR(iobase));
 322	delay(100);
 323}
 324
 325/*
 326 * send one byte to FPGA
 327 */
 328
 329static int fpga_write(int iobase, unsigned char wrd)
 330{
 331	unsigned char bit;
 332	int k;
 333	unsigned long timeout = jiffies + HZ / 10;
 334
 335	for (k = 0; k < 8; k++) {
 336		bit = (wrd & 0x80) ? (MCR_RTS | MCR_DTR) : MCR_DTR;
 337		outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase));
 338		wrd <<= 1;
 339		outb(0xfc, THR(iobase));
 340		while ((inb(LSR(iobase)) & LSR_TSRE) == 0)
 341			if (time_after(jiffies, timeout))
 342				return -1;
 343	}
 344
 345	return 0;
 346}
 347
 348/*
 349 * predef should be 0 for loading user defined mcs
 350 * predef should be YAM_1200 for loading predef 1200 mcs
 351 * predef should be YAM_9600 for loading predef 9600 mcs
 352 */
 353static unsigned char *add_mcs(unsigned char *bits, int bitrate,
 354			      unsigned int predef)
 355{
 356	const char *fw_name[2] = {FIRMWARE_9600, FIRMWARE_1200};
 357	const struct firmware *fw;
 358	struct platform_device *pdev;
 359	struct yam_mcs *p;
 360	int err;
 361
 362	switch (predef) {
 363	case 0:
 364		fw = NULL;
 365		break;
 366	case YAM_1200:
 367	case YAM_9600:
 368		predef--;
 369		pdev = platform_device_register_simple("yam", 0, NULL, 0);
 370		if (IS_ERR(pdev)) {
 371			printk(KERN_ERR "yam: Failed to register firmware\n");
 372			return NULL;
 373		}
 374		err = request_firmware(&fw, fw_name[predef], &pdev->dev);
 375		platform_device_unregister(pdev);
 376		if (err) {
 377			printk(KERN_ERR "Failed to load firmware \"%s\"\n",
 378			       fw_name[predef]);
 379			return NULL;
 380		}
 381		if (fw->size != YAM_FPGA_SIZE) {
 382			printk(KERN_ERR "Bogus length %zu in firmware \"%s\"\n",
 383			       fw->size, fw_name[predef]);
 384			release_firmware(fw);
 385			return NULL;
 386		}
 387		bits = (unsigned char *)fw->data;
 388		break;
 389	default:
 390		printk(KERN_ERR "yam: Invalid predef number %u\n", predef);
 391		return NULL;
 392	}
 393
 394	/* If it already exists, replace the bit data */
 395	p = yam_data;
 396	while (p) {
 397		if (p->bitrate == bitrate) {
 398			memcpy(p->bits, bits, YAM_FPGA_SIZE);
 399			goto out;
 400		}
 401		p = p->next;
 402	}
 403
 404	/* Allocate a new mcs */
 405	if ((p = kmalloc(sizeof(struct yam_mcs), GFP_KERNEL)) == NULL) {
 406		printk(KERN_WARNING "YAM: no memory to allocate mcs\n");
 407		release_firmware(fw);
 408		return NULL;
 409	}
 410	memcpy(p->bits, bits, YAM_FPGA_SIZE);
 411	p->bitrate = bitrate;
 412	p->next = yam_data;
 413	yam_data = p;
 414 out:
 415	release_firmware(fw);
 416	return p->bits;
 417}
 418
 419static unsigned char *get_mcs(int bitrate)
 420{
 421	struct yam_mcs *p;
 422
 423	p = yam_data;
 424	while (p) {
 425		if (p->bitrate == bitrate)
 426			return p->bits;
 427		p = p->next;
 428	}
 429
 430	/* Load predefined mcs data */
 431	switch (bitrate) {
 432	case 1200:
 433		/* setting predef as YAM_1200 for loading predef 1200 mcs */
 434		return add_mcs(NULL, bitrate, YAM_1200);
 435	default:
 436		/* setting predef as YAM_9600 for loading predef 9600 mcs */
 437		return add_mcs(NULL, bitrate, YAM_9600);
 438	}
 439}
 440
 441/*
 442 * download bitstream to FPGA
 443 * data is contained in bits[] array in yam1200.h resp. yam9600.h
 444 */
 445
 446static int fpga_download(int iobase, int bitrate)
 447{
 448	int i, rc;
 449	unsigned char *pbits;
 450
 451	pbits = get_mcs(bitrate);
 452	if (pbits == NULL)
 453		return -1;
 454
 455	fpga_reset(iobase);
 456	for (i = 0; i < YAM_FPGA_SIZE; i++) {
 457		if (fpga_write(iobase, pbits[i])) {
 458			printk(KERN_ERR "yam: error in write cycle\n");
 459			return -1;			/* write... */
 460		}
 461	}
 462
 463	fpga_write(iobase, 0xFF);
 464	rc = inb(MSR(iobase));		/* check DONE signal */
 465
 466	/* Needed for some hardwares */
 467	delay(50);
 468
 469	return (rc & MSR_DSR) ? 0 : -1;
 470}
 471
 472
 473/************************************************************************
 474* Serial port init 
 475************************************************************************/
 476
 477static void yam_set_uart(struct net_device *dev)
 478{
 479	struct yam_port *yp = netdev_priv(dev);
 480	int divisor = 115200 / yp->baudrate;
 481
 482	outb(0, IER(dev->base_addr));
 483	outb(LCR_DLAB | LCR_BIT8, LCR(dev->base_addr));
 484	outb(divisor, DLL(dev->base_addr));
 485	outb(0, DLM(dev->base_addr));
 486	outb(LCR_BIT8, LCR(dev->base_addr));
 487	outb(PTT_OFF, MCR(dev->base_addr));
 488	outb(0x00, FCR(dev->base_addr));
 489
 490	/* Flush pending irq */
 491
 492	inb(RBR(dev->base_addr));
 493	inb(MSR(dev->base_addr));
 494
 495	/* Enable rx irq */
 496
 497	outb(ENABLE_RTXINT, IER(dev->base_addr));
 498}
 499
 500
 501/* --------------------------------------------------------------------- */
 502
 503enum uart {
 504	c_uart_unknown, c_uart_8250,
 505	c_uart_16450, c_uart_16550, c_uart_16550A
 506};
 507
 508static const char *uart_str[] =
 509{"unknown", "8250", "16450", "16550", "16550A"};
 510
 511static enum uart yam_check_uart(unsigned int iobase)
 512{
 513	unsigned char b1, b2, b3;
 514	enum uart u;
 515	enum uart uart_tab[] =
 516	{c_uart_16450, c_uart_unknown, c_uart_16550, c_uart_16550A};
 517
 518	b1 = inb(MCR(iobase));
 519	outb(b1 | 0x10, MCR(iobase));	/* loopback mode */
 520	b2 = inb(MSR(iobase));
 521	outb(0x1a, MCR(iobase));
 522	b3 = inb(MSR(iobase)) & 0xf0;
 523	outb(b1, MCR(iobase));		/* restore old values */
 524	outb(b2, MSR(iobase));
 525	if (b3 != 0x90)
 526		return c_uart_unknown;
 527	inb(RBR(iobase));
 528	inb(RBR(iobase));
 529	outb(0x01, FCR(iobase));	/* enable FIFOs */
 530	u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
 531	if (u == c_uart_16450) {
 532		outb(0x5a, SCR(iobase));
 533		b1 = inb(SCR(iobase));
 534		outb(0xa5, SCR(iobase));
 535		b2 = inb(SCR(iobase));
 536		if ((b1 != 0x5a) || (b2 != 0xa5))
 537			u = c_uart_8250;
 538	}
 539	return u;
 540}
 541
 542/******************************************************************************
 543* Rx Section
 544******************************************************************************/
 545static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp)
 546{
 547	if (yp->dcd && yp->rx_len >= 3 && yp->rx_len < YAM_MAX_FRAME) {
 548		int pkt_len = yp->rx_len - 2 + 1;	/* -CRC + kiss */
 549		struct sk_buff *skb;
 550
 551		if ((yp->rx_crch & yp->rx_crcl) != 0xFF) {
 552			/* Bad crc */
 553		} else {
 554			if (!(skb = dev_alloc_skb(pkt_len))) {
 555				printk(KERN_WARNING "%s: memory squeeze, dropping packet\n", dev->name);
 556				++dev->stats.rx_dropped;
 557			} else {
 558				unsigned char *cp;
 559				cp = skb_put(skb, pkt_len);
 560				*cp++ = 0;		/* KISS kludge */
 561				memcpy(cp, yp->rx_buf, pkt_len - 1);
 562				skb->protocol = ax25_type_trans(skb, dev);
 563				netif_rx(skb);
 564				++dev->stats.rx_packets;
 565			}
 566		}
 567	}
 568	yp->rx_len = 0;
 569	yp->rx_crcl = 0x21;
 570	yp->rx_crch = 0xf3;
 571}
 572
 573static inline void yam_rx_byte(struct net_device *dev, struct yam_port *yp, unsigned char rxb)
 574{
 575	if (yp->rx_len < YAM_MAX_FRAME) {
 576		unsigned char c = yp->rx_crcl;
 577		yp->rx_crcl = (chktabl[c] ^ yp->rx_crch);
 578		yp->rx_crch = (chktabh[c] ^ rxb);
 579		yp->rx_buf[yp->rx_len++] = rxb;
 580	}
 581}
 582
 583/********************************************************************************
 584* TX Section
 585********************************************************************************/
 586
 587static void ptt_on(struct net_device *dev)
 588{
 589	outb(PTT_ON, MCR(dev->base_addr));
 590}
 591
 592static void ptt_off(struct net_device *dev)
 593{
 594	outb(PTT_OFF, MCR(dev->base_addr));
 595}
 596
 597static netdev_tx_t yam_send_packet(struct sk_buff *skb,
 598					 struct net_device *dev)
 599{
 600	struct yam_port *yp = netdev_priv(dev);
 601
 602	skb_queue_tail(&yp->send_queue, skb);
 603	dev->trans_start = jiffies;
 604	return NETDEV_TX_OK;
 605}
 606
 607static void yam_start_tx(struct net_device *dev, struct yam_port *yp)
 608{
 609	if ((yp->tx_state == TX_TAIL) || (yp->txd == 0))
 610		yp->tx_count = 1;
 611	else
 612		yp->tx_count = (yp->bitrate * yp->txd) / 8000;
 613	yp->tx_state = TX_HEAD;
 614	ptt_on(dev);
 615}
 616
 617static void yam_arbitrate(struct net_device *dev)
 618{
 619	struct yam_port *yp = netdev_priv(dev);
 620
 621	if (yp->magic != YAM_MAGIC || yp->tx_state != TX_OFF ||
 622	    skb_queue_empty(&yp->send_queue))
 623		return;
 624	/* tx_state is TX_OFF and there is data to send */
 625
 626	if (yp->dupmode) {
 627		/* Full duplex mode, don't wait */
 628		yam_start_tx(dev, yp);
 629		return;
 630	}
 631	if (yp->dcd) {
 632		/* DCD on, wait slotime ... */
 633		yp->slotcnt = yp->slot / 10;
 634		return;
 635	}
 636	/* Is slottime passed ? */
 637	if ((--yp->slotcnt) > 0)
 638		return;
 639
 640	yp->slotcnt = yp->slot / 10;
 641
 642	/* is random > persist ? */
 643	if ((random32() % 256) > yp->pers)
 644		return;
 645
 646	yam_start_tx(dev, yp);
 647}
 648
 649static void yam_dotimer(unsigned long dummy)
 650{
 651	int i;
 652
 653	for (i = 0; i < NR_PORTS; i++) {
 654		struct net_device *dev = yam_devs[i];
 655		if (dev && netif_running(dev))
 656			yam_arbitrate(dev);
 657	}
 658	yam_timer.expires = jiffies + HZ / 100;
 659	add_timer(&yam_timer);
 660}
 661
 662static void yam_tx_byte(struct net_device *dev, struct yam_port *yp)
 663{
 664	struct sk_buff *skb;
 665	unsigned char b, temp;
 666
 667	switch (yp->tx_state) {
 668	case TX_OFF:
 669		break;
 670	case TX_HEAD:
 671		if (--yp->tx_count <= 0) {
 672			if (!(skb = skb_dequeue(&yp->send_queue))) {
 673				ptt_off(dev);
 674				yp->tx_state = TX_OFF;
 675				break;
 676			}
 677			yp->tx_state = TX_DATA;
 678			if (skb->data[0] != 0) {
 679/*                              do_kiss_params(s, skb->data, skb->len); */
 680				dev_kfree_skb_any(skb);
 681				break;
 682			}
 683			yp->tx_len = skb->len - 1;	/* strip KISS byte */
 684			if (yp->tx_len >= YAM_MAX_FRAME || yp->tx_len < 2) {
 685        			dev_kfree_skb_any(skb);
 686				break;
 687			}
 688			skb_copy_from_linear_data_offset(skb, 1,
 689							 yp->tx_buf,
 690							 yp->tx_len);
 691			dev_kfree_skb_any(skb);
 692			yp->tx_count = 0;
 693			yp->tx_crcl = 0x21;
 694			yp->tx_crch = 0xf3;
 695			yp->tx_state = TX_DATA;
 696		}
 697		break;
 698	case TX_DATA:
 699		b = yp->tx_buf[yp->tx_count++];
 700		outb(b, THR(dev->base_addr));
 701		temp = yp->tx_crcl;
 702		yp->tx_crcl = chktabl[temp] ^ yp->tx_crch;
 703		yp->tx_crch = chktabh[temp] ^ b;
 704		if (yp->tx_count >= yp->tx_len) {
 705			yp->tx_state = TX_CRC1;
 706		}
 707		break;
 708	case TX_CRC1:
 709		yp->tx_crch = chktabl[yp->tx_crcl] ^ yp->tx_crch;
 710		yp->tx_crcl = chktabh[yp->tx_crcl] ^ chktabl[yp->tx_crch] ^ 0xff;
 711		outb(yp->tx_crcl, THR(dev->base_addr));
 712		yp->tx_state = TX_CRC2;
 713		break;
 714	case TX_CRC2:
 715		outb(chktabh[yp->tx_crch] ^ 0xFF, THR(dev->base_addr));
 716		if (skb_queue_empty(&yp->send_queue)) {
 717			yp->tx_count = (yp->bitrate * yp->txtail) / 8000;
 718			if (yp->dupmode == 2)
 719				yp->tx_count += (yp->bitrate * yp->holdd) / 8;
 720			if (yp->tx_count == 0)
 721				yp->tx_count = 1;
 722			yp->tx_state = TX_TAIL;
 723		} else {
 724			yp->tx_count = 1;
 725			yp->tx_state = TX_HEAD;
 726		}
 727		++dev->stats.tx_packets;
 728		break;
 729	case TX_TAIL:
 730		if (--yp->tx_count <= 0) {
 731			yp->tx_state = TX_OFF;
 732			ptt_off(dev);
 733		}
 734		break;
 735	}
 736}
 737
 738/***********************************************************************************
 739* ISR routine
 740************************************************************************************/
 741
 742static irqreturn_t yam_interrupt(int irq, void *dev_id)
 743{
 744	struct net_device *dev;
 745	struct yam_port *yp;
 746	unsigned char iir;
 747	int counter = 100;
 748	int i;
 749	int handled = 0;
 750
 751	for (i = 0; i < NR_PORTS; i++) {
 752		dev = yam_devs[i];
 753		yp = netdev_priv(dev);
 754
 755		if (!netif_running(dev))
 756			continue;
 757
 758		while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) {
 759			unsigned char msr = inb(MSR(dev->base_addr));
 760			unsigned char lsr = inb(LSR(dev->base_addr));
 761			unsigned char rxb;
 762
 763			handled = 1;
 764
 765			if (lsr & LSR_OE)
 766				++dev->stats.rx_fifo_errors;
 767
 768			yp->dcd = (msr & RX_DCD) ? 1 : 0;
 769
 770			if (--counter <= 0) {
 771				printk(KERN_ERR "%s: too many irq iir=%d\n",
 772						dev->name, iir);
 773				goto out;
 774			}
 775			if (msr & TX_RDY) {
 776				++yp->nb_mdint;
 777				yam_tx_byte(dev, yp);
 778			}
 779			if (lsr & LSR_RXC) {
 780				++yp->nb_rxint;
 781				rxb = inb(RBR(dev->base_addr));
 782				if (msr & RX_FLAG)
 783					yam_rx_flag(dev, yp);
 784				else
 785					yam_rx_byte(dev, yp, rxb);
 786			}
 787		}
 788	}
 789out:
 790	return IRQ_RETVAL(handled);
 791}
 792
 793#ifdef CONFIG_PROC_FS
 794
 795static void *yam_seq_start(struct seq_file *seq, loff_t *pos)
 796{
 797	return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
 798}
 799
 800static void *yam_seq_next(struct seq_file *seq, void *v, loff_t *pos)
 801{
 802	++*pos;
 803	return (*pos < NR_PORTS) ? yam_devs[*pos] : NULL;
 804}
 805
 806static void yam_seq_stop(struct seq_file *seq, void *v)
 807{
 808}
 809
 810static int yam_seq_show(struct seq_file *seq, void *v)
 811{
 812	struct net_device *dev = v;
 813	const struct yam_port *yp = netdev_priv(dev);
 814
 815	seq_printf(seq, "Device %s\n", dev->name);
 816	seq_printf(seq, "  Up       %d\n", netif_running(dev));
 817	seq_printf(seq, "  Speed    %u\n", yp->bitrate);
 818	seq_printf(seq, "  IoBase   0x%x\n", yp->iobase);
 819	seq_printf(seq, "  BaudRate %u\n", yp->baudrate);
 820	seq_printf(seq, "  IRQ      %u\n", yp->irq);
 821	seq_printf(seq, "  TxState  %u\n", yp->tx_state);
 822	seq_printf(seq, "  Duplex   %u\n", yp->dupmode);
 823	seq_printf(seq, "  HoldDly  %u\n", yp->holdd);
 824	seq_printf(seq, "  TxDelay  %u\n", yp->txd);
 825	seq_printf(seq, "  TxTail   %u\n", yp->txtail);
 826	seq_printf(seq, "  SlotTime %u\n", yp->slot);
 827	seq_printf(seq, "  Persist  %u\n", yp->pers);
 828	seq_printf(seq, "  TxFrames %lu\n", dev->stats.tx_packets);
 829	seq_printf(seq, "  RxFrames %lu\n", dev->stats.rx_packets);
 830	seq_printf(seq, "  TxInt    %u\n", yp->nb_mdint);
 831	seq_printf(seq, "  RxInt    %u\n", yp->nb_rxint);
 832	seq_printf(seq, "  RxOver   %lu\n", dev->stats.rx_fifo_errors);
 833	seq_printf(seq, "\n");
 834	return 0;
 835}
 836
 837static const struct seq_operations yam_seqops = {
 838	.start = yam_seq_start,
 839	.next = yam_seq_next,
 840	.stop = yam_seq_stop,
 841	.show = yam_seq_show,
 842};
 843
 844static int yam_info_open(struct inode *inode, struct file *file)
 845{
 846	return seq_open(file, &yam_seqops);
 847}
 848
 849static const struct file_operations yam_info_fops = {
 850	.owner = THIS_MODULE,
 851	.open = yam_info_open,
 852	.read = seq_read,
 853	.llseek = seq_lseek,
 854	.release = seq_release,
 855};
 856
 857#endif
 858
 859
 860/* --------------------------------------------------------------------- */
 861
 862static int yam_open(struct net_device *dev)
 863{
 864	struct yam_port *yp = netdev_priv(dev);
 865	enum uart u;
 866	int i;
 867	int ret=0;
 868
 869	printk(KERN_INFO "Trying %s at iobase 0x%lx irq %u\n", dev->name, dev->base_addr, dev->irq);
 870
 871	if (!dev || !yp->bitrate)
 872		return -ENXIO;
 873	if (!dev->base_addr || dev->base_addr > 0x1000 - YAM_EXTENT ||
 874		dev->irq < 2 || dev->irq > 15) {
 875		return -ENXIO;
 876	}
 877	if (!request_region(dev->base_addr, YAM_EXTENT, dev->name))
 878	{
 879		printk(KERN_ERR "%s: cannot 0x%lx busy\n", dev->name, dev->base_addr);
 880		return -EACCES;
 881	}
 882	if ((u = yam_check_uart(dev->base_addr)) == c_uart_unknown) {
 883		printk(KERN_ERR "%s: cannot find uart type\n", dev->name);
 884		ret = -EIO;
 885		goto out_release_base;
 886	}
 887	if (fpga_download(dev->base_addr, yp->bitrate)) {
 888		printk(KERN_ERR "%s: cannot init FPGA\n", dev->name);
 889		ret = -EIO;
 890		goto out_release_base;
 891	}
 892	outb(0, IER(dev->base_addr));
 893	if (request_irq(dev->irq, yam_interrupt, IRQF_DISABLED | IRQF_SHARED, dev->name, dev)) {
 894		printk(KERN_ERR "%s: irq %d busy\n", dev->name, dev->irq);
 895		ret = -EBUSY;
 896		goto out_release_base;
 897	}
 898
 899	yam_set_uart(dev);
 900
 901	netif_start_queue(dev);
 902	
 903	yp->slotcnt = yp->slot / 10;
 904
 905	/* Reset overruns for all ports - FPGA programming makes overruns */
 906	for (i = 0; i < NR_PORTS; i++) {
 907		struct net_device *yam_dev = yam_devs[i];
 908
 909		inb(LSR(yam_dev->base_addr));
 910		yam_dev->stats.rx_fifo_errors = 0;
 911	}
 912
 913	printk(KERN_INFO "%s at iobase 0x%lx irq %u uart %s\n", dev->name, dev->base_addr, dev->irq,
 914		   uart_str[u]);
 915	return 0;
 916
 917out_release_base:
 918	release_region(dev->base_addr, YAM_EXTENT);
 919	return ret;
 920}
 921
 922/* --------------------------------------------------------------------- */
 923
 924static int yam_close(struct net_device *dev)
 925{
 926	struct sk_buff *skb;
 927	struct yam_port *yp = netdev_priv(dev);
 928
 929	if (!dev)
 930		return -EINVAL;
 931
 932	/*
 933	 * disable interrupts
 934	 */
 935	outb(0, IER(dev->base_addr));
 936	outb(1, MCR(dev->base_addr));
 937	/* Remove IRQ handler if last */
 938	free_irq(dev->irq,dev);
 939	release_region(dev->base_addr, YAM_EXTENT);
 940	netif_stop_queue(dev);
 941	while ((skb = skb_dequeue(&yp->send_queue)))
 942		dev_kfree_skb(skb);
 943
 944	printk(KERN_INFO "%s: close yam at iobase 0x%lx irq %u\n",
 945		   yam_drvname, dev->base_addr, dev->irq);
 946	return 0;
 947}
 948
 949/* --------------------------------------------------------------------- */
 950
 951static int yam_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
 952{
 953	struct yam_port *yp = netdev_priv(dev);
 954	struct yamdrv_ioctl_cfg yi;
 955	struct yamdrv_ioctl_mcs *ym;
 956	int ioctl_cmd;
 957
 958	if (copy_from_user(&ioctl_cmd, ifr->ifr_data, sizeof(int)))
 959		 return -EFAULT;
 960
 961	if (yp->magic != YAM_MAGIC)
 962		return -EINVAL;
 963
 964	if (!capable(CAP_NET_ADMIN))
 965		return -EPERM;
 966
 967	if (cmd != SIOCDEVPRIVATE)
 968		return -EINVAL;
 969
 970	switch (ioctl_cmd) {
 971
 972	case SIOCYAMRESERVED:
 973		return -EINVAL;			/* unused */
 974
 975	case SIOCYAMSMCS:
 976		if (netif_running(dev))
 977			return -EINVAL;		/* Cannot change this parameter when up */
 978		if ((ym = kmalloc(sizeof(struct yamdrv_ioctl_mcs), GFP_KERNEL)) == NULL)
 979			return -ENOBUFS;
 980		ym->bitrate = 9600;
 981		if (copy_from_user(ym, ifr->ifr_data, sizeof(struct yamdrv_ioctl_mcs))) {
 982			kfree(ym);
 983			return -EFAULT;
 984		}
 985		if (ym->bitrate > YAM_MAXBITRATE) {
 986			kfree(ym);
 987			return -EINVAL;
 988		}
 989		/* setting predef as 0 for loading userdefined mcs data */
 990		add_mcs(ym->bits, ym->bitrate, 0);
 991		kfree(ym);
 992		break;
 993
 994	case SIOCYAMSCFG:
 995		if (!capable(CAP_SYS_RAWIO))
 996			return -EPERM;
 997		if (copy_from_user(&yi, ifr->ifr_data, sizeof(struct yamdrv_ioctl_cfg)))
 998			 return -EFAULT;
 999
1000		if ((yi.cfg.mask & YAM_IOBASE) && netif_running(dev))
1001			return -EINVAL;		/* Cannot change this parameter when up */
1002		if ((yi.cfg.mask & YAM_IRQ) && netif_running(dev))
1003			return -EINVAL;		/* Cannot change this parameter when up */
1004		if ((yi.cfg.mask & YAM_BITRATE) && netif_running(dev))
1005			return -EINVAL;		/* Cannot change this parameter when up */
1006		if ((yi.cfg.mask & YAM_BAUDRATE) && netif_running(dev))
1007			return -EINVAL;		/* Cannot change this parameter when up */
1008
1009		if (yi.cfg.mask & YAM_IOBASE) {
1010			yp->iobase = yi.cfg.iobase;
1011			dev->base_addr = yi.cfg.iobase;
1012		}
1013		if (yi.cfg.mask & YAM_IRQ) {
1014			if (yi.cfg.irq > 15)
1015				return -EINVAL;
1016			yp->irq = yi.cfg.irq;
1017			dev->irq = yi.cfg.irq;
1018		}
1019		if (yi.cfg.mask & YAM_BITRATE) {
1020			if (yi.cfg.bitrate > YAM_MAXBITRATE)
1021				return -EINVAL;
1022			yp->bitrate = yi.cfg.bitrate;
1023		}
1024		if (yi.cfg.mask & YAM_BAUDRATE) {
1025			if (yi.cfg.baudrate > YAM_MAXBAUDRATE)
1026				return -EINVAL;
1027			yp->baudrate = yi.cfg.baudrate;
1028		}
1029		if (yi.cfg.mask & YAM_MODE) {
1030			if (yi.cfg.mode > YAM_MAXMODE)
1031				return -EINVAL;
1032			yp->dupmode = yi.cfg.mode;
1033		}
1034		if (yi.cfg.mask & YAM_HOLDDLY) {
1035			if (yi.cfg.holddly > YAM_MAXHOLDDLY)
1036				return -EINVAL;
1037			yp->holdd = yi.cfg.holddly;
1038		}
1039		if (yi.cfg.mask & YAM_TXDELAY) {
1040			if (yi.cfg.txdelay > YAM_MAXTXDELAY)
1041				return -EINVAL;
1042			yp->txd = yi.cfg.txdelay;
1043		}
1044		if (yi.cfg.mask & YAM_TXTAIL) {
1045			if (yi.cfg.txtail > YAM_MAXTXTAIL)
1046				return -EINVAL;
1047			yp->txtail = yi.cfg.txtail;
1048		}
1049		if (yi.cfg.mask & YAM_PERSIST) {
1050			if (yi.cfg.persist > YAM_MAXPERSIST)
1051				return -EINVAL;
1052			yp->pers = yi.cfg.persist;
1053		}
1054		if (yi.cfg.mask & YAM_SLOTTIME) {
1055			if (yi.cfg.slottime > YAM_MAXSLOTTIME)
1056				return -EINVAL;
1057			yp->slot = yi.cfg.slottime;
1058			yp->slotcnt = yp->slot / 10;
1059		}
1060		break;
1061
1062	case SIOCYAMGCFG:
1063		yi.cfg.mask = 0xffffffff;
1064		yi.cfg.iobase = yp->iobase;
1065		yi.cfg.irq = yp->irq;
1066		yi.cfg.bitrate = yp->bitrate;
1067		yi.cfg.baudrate = yp->baudrate;
1068		yi.cfg.mode = yp->dupmode;
1069		yi.cfg.txdelay = yp->txd;
1070		yi.cfg.holddly = yp->holdd;
1071		yi.cfg.txtail = yp->txtail;
1072		yi.cfg.persist = yp->pers;
1073		yi.cfg.slottime = yp->slot;
1074		if (copy_to_user(ifr->ifr_data, &yi, sizeof(struct yamdrv_ioctl_cfg)))
1075			 return -EFAULT;
1076		break;
1077
1078	default:
1079		return -EINVAL;
1080
1081	}
1082
1083	return 0;
1084}
1085
1086/* --------------------------------------------------------------------- */
1087
1088static int yam_set_mac_address(struct net_device *dev, void *addr)
1089{
1090	struct sockaddr *sa = (struct sockaddr *) addr;
1091
1092	/* addr is an AX.25 shifted ASCII mac address */
1093	memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
1094	return 0;
1095}
1096
1097/* --------------------------------------------------------------------- */
1098
1099static const struct net_device_ops yam_netdev_ops = {
1100	.ndo_open	     = yam_open,
1101	.ndo_stop	     = yam_close,
1102	.ndo_start_xmit      = yam_send_packet,
1103	.ndo_do_ioctl 	     = yam_ioctl,
1104	.ndo_set_mac_address = yam_set_mac_address,
1105};
1106
1107static void yam_setup(struct net_device *dev)
1108{
1109	struct yam_port *yp = netdev_priv(dev);
1110
1111	yp->magic = YAM_MAGIC;
1112	yp->bitrate = DEFAULT_BITRATE;
1113	yp->baudrate = DEFAULT_BITRATE * 2;
1114	yp->iobase = 0;
1115	yp->irq = 0;
1116	yp->dupmode = 0;
1117	yp->holdd = DEFAULT_HOLDD;
1118	yp->txd = DEFAULT_TXD;
1119	yp->txtail = DEFAULT_TXTAIL;
1120	yp->slot = DEFAULT_SLOT;
1121	yp->pers = DEFAULT_PERS;
1122	yp->dev = dev;
1123
1124	dev->base_addr = yp->iobase;
1125	dev->irq = yp->irq;
1126
1127	skb_queue_head_init(&yp->send_queue);
1128
1129	dev->netdev_ops = &yam_netdev_ops;
1130	dev->header_ops = &ax25_header_ops;
1131
1132	dev->type = ARPHRD_AX25;
1133	dev->hard_header_len = AX25_MAX_HEADER_LEN;
1134	dev->mtu = AX25_MTU;
1135	dev->addr_len = AX25_ADDR_LEN;
1136	memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
1137	memcpy(dev->dev_addr, &ax25_defaddr, AX25_ADDR_LEN);
1138}
1139
1140static int __init yam_init_driver(void)
1141{
1142	struct net_device *dev;
1143	int i, err;
1144	char name[IFNAMSIZ];
1145
1146	printk(yam_drvinfo);
1147
1148	for (i = 0; i < NR_PORTS; i++) {
1149		sprintf(name, "yam%d", i);
1150		
1151		dev = alloc_netdev(sizeof(struct yam_port), name,
1152				   yam_setup);
1153		if (!dev) {
1154			pr_err("yam: cannot allocate net device\n");
1155			err = -ENOMEM;
1156			goto error;
1157		}
1158		
1159		err = register_netdev(dev);
1160		if (err) {
1161			printk(KERN_WARNING "yam: cannot register net device %s\n", dev->name);
1162			goto error;
1163		}
1164		yam_devs[i] = dev;
1165
1166	}
1167
1168	yam_timer.function = yam_dotimer;
1169	yam_timer.expires = jiffies + HZ / 100;
1170	add_timer(&yam_timer);
1171
1172	proc_net_fops_create(&init_net, "yam", S_IRUGO, &yam_info_fops);
1173	return 0;
1174 error:
1175	while (--i >= 0) {
1176		unregister_netdev(yam_devs[i]);
1177		free_netdev(yam_devs[i]);
1178	}
1179	return err;
1180}
1181
1182/* --------------------------------------------------------------------- */
1183
1184static void __exit yam_cleanup_driver(void)
1185{
1186	struct yam_mcs *p;
1187	int i;
1188
1189	del_timer(&yam_timer);
1190	for (i = 0; i < NR_PORTS; i++) {
1191		struct net_device *dev = yam_devs[i];
1192		if (dev) {
1193			unregister_netdev(dev);
1194			free_netdev(dev);
1195		}
1196	}
1197
1198	while (yam_data) {
1199		p = yam_data;
1200		yam_data = yam_data->next;
1201		kfree(p);
1202	}
1203
1204	proc_net_remove(&init_net, "yam");
1205}
1206
1207/* --------------------------------------------------------------------- */
1208
1209MODULE_AUTHOR("Frederic Rible F1OAT frible@teaser.fr");
1210MODULE_DESCRIPTION("Yam amateur radio modem driver");
1211MODULE_LICENSE("GPL");
1212MODULE_FIRMWARE(FIRMWARE_1200);
1213MODULE_FIRMWARE(FIRMWARE_9600);
1214
1215module_init(yam_init_driver);
1216module_exit(yam_cleanup_driver);
1217
1218/* --------------------------------------------------------------------- */
1219