/drivers/media/video/mx3_camera.c
C | 1328 lines | 956 code | 232 blank | 140 comment | 131 complexity | e773f3a887482bac6e404bdfa948165f MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
1/* 2 * V4L2 Driver for i.MX3x camera host 3 * 4 * Copyright (C) 2008 5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12#include <linux/init.h> 13#include <linux/module.h> 14#include <linux/version.h> 15#include <linux/videodev2.h> 16#include <linux/platform_device.h> 17#include <linux/clk.h> 18#include <linux/vmalloc.h> 19#include <linux/interrupt.h> 20#include <linux/sched.h> 21 22#include <media/v4l2-common.h> 23#include <media/v4l2-dev.h> 24#include <media/videobuf2-dma-contig.h> 25#include <media/soc_camera.h> 26#include <media/soc_mediabus.h> 27 28#include <mach/ipu.h> 29#include <mach/mx3_camera.h> 30#include <mach/dma.h> 31 32#define MX3_CAM_DRV_NAME "mx3-camera" 33 34/* CMOS Sensor Interface Registers */ 35#define CSI_REG_START 0x60 36 37#define CSI_SENS_CONF (0x60 - CSI_REG_START) 38#define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START) 39#define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START) 40#define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START) 41#define CSI_TST_CTRL (0x70 - CSI_REG_START) 42#define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START) 43#define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START) 44#define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START) 45#define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START) 46#define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START) 47 48#define CSI_SENS_CONF_VSYNC_POL_SHIFT 0 49#define CSI_SENS_CONF_HSYNC_POL_SHIFT 1 50#define CSI_SENS_CONF_DATA_POL_SHIFT 2 51#define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3 52#define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4 53#define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7 54#define CSI_SENS_CONF_DATA_FMT_SHIFT 8 55#define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10 56#define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15 57#define CSI_SENS_CONF_DIVRATIO_SHIFT 16 58 59#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT) 60#define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT) 61#define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT) 62 63#define MAX_VIDEO_MEM 16 64 65enum csi_buffer_state { 66 CSI_BUF_NEEDS_INIT, 67 CSI_BUF_PREPARED, 68}; 69 70struct mx3_camera_buffer { 71 /* common v4l buffer stuff -- must be first */ 72 struct vb2_buffer vb; 73 enum csi_buffer_state state; 74 struct list_head queue; 75 76 /* One descriptot per scatterlist (per frame) */ 77 struct dma_async_tx_descriptor *txd; 78 79 /* We have to "build" a scatterlist ourselves - one element per frame */ 80 struct scatterlist sg; 81}; 82 83/** 84 * struct mx3_camera_dev - i.MX3x camera (CSI) object 85 * @dev: camera device, to which the coherent buffer is attached 86 * @icd: currently attached camera sensor 87 * @clk: pointer to clock 88 * @base: remapped register base address 89 * @pdata: platform data 90 * @platform_flags: platform flags 91 * @mclk: master clock frequency in Hz 92 * @capture: list of capture videobuffers 93 * @lock: protects video buffer lists 94 * @active: active video buffer 95 * @idmac_channel: array of pointers to IPU DMAC DMA channels 96 * @soc_host: embedded soc_host object 97 */ 98struct mx3_camera_dev { 99 /* 100 * i.MX3x is only supposed to handle one camera on its Camera Sensor 101 * Interface. If anyone ever builds hardware to enable more than one 102 * camera _simultaneously_, they will have to modify this driver too 103 */ 104 struct soc_camera_device *icd; 105 struct clk *clk; 106 107 void __iomem *base; 108 109 struct mx3_camera_pdata *pdata; 110 111 unsigned long platform_flags; 112 unsigned long mclk; 113 114 struct list_head capture; 115 spinlock_t lock; /* Protects video buffer lists */ 116 struct mx3_camera_buffer *active; 117 struct vb2_alloc_ctx *alloc_ctx; 118 enum v4l2_field field; 119 int sequence; 120 121 /* IDMAC / dmaengine interface */ 122 struct idmac_channel *idmac_channel[1]; /* We need one channel */ 123 124 struct soc_camera_host soc_host; 125}; 126 127struct dma_chan_request { 128 struct mx3_camera_dev *mx3_cam; 129 enum ipu_channel id; 130}; 131 132static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg) 133{ 134 return __raw_readl(mx3->base + reg); 135} 136 137static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg) 138{ 139 __raw_writel(value, mx3->base + reg); 140} 141 142static struct mx3_camera_buffer *to_mx3_vb(struct vb2_buffer *vb) 143{ 144 return container_of(vb, struct mx3_camera_buffer, vb); 145} 146 147/* Called from the IPU IDMAC ISR */ 148static void mx3_cam_dma_done(void *arg) 149{ 150 struct idmac_tx_desc *desc = to_tx_desc(arg); 151 struct dma_chan *chan = desc->txd.chan; 152 struct idmac_channel *ichannel = to_idmac_chan(chan); 153 struct mx3_camera_dev *mx3_cam = ichannel->client; 154 155 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n", 156 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0); 157 158 spin_lock(&mx3_cam->lock); 159 if (mx3_cam->active) { 160 struct vb2_buffer *vb = &mx3_cam->active->vb; 161 struct mx3_camera_buffer *buf = to_mx3_vb(vb); 162 163 list_del_init(&buf->queue); 164 do_gettimeofday(&vb->v4l2_buf.timestamp); 165 vb->v4l2_buf.field = mx3_cam->field; 166 vb->v4l2_buf.sequence = mx3_cam->sequence++; 167 vb2_buffer_done(vb, VB2_BUF_STATE_DONE); 168 } 169 170 if (list_empty(&mx3_cam->capture)) { 171 mx3_cam->active = NULL; 172 spin_unlock(&mx3_cam->lock); 173 174 /* 175 * stop capture - without further buffers IPU_CHA_BUF0_RDY will 176 * not get updated 177 */ 178 return; 179 } 180 181 mx3_cam->active = list_entry(mx3_cam->capture.next, 182 struct mx3_camera_buffer, queue); 183 spin_unlock(&mx3_cam->lock); 184} 185 186/* 187 * Videobuf operations 188 */ 189 190/* 191 * Calculate the __buffer__ (not data) size and number of buffers. 192 */ 193static int mx3_videobuf_setup(struct vb2_queue *vq, 194 unsigned int *count, unsigned int *num_planes, 195 unsigned long sizes[], void *alloc_ctxs[]) 196{ 197 struct soc_camera_device *icd = soc_camera_from_vb2q(vq); 198 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 199 struct mx3_camera_dev *mx3_cam = ici->priv; 200 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, 201 icd->current_fmt->host_fmt); 202 203 if (bytes_per_line < 0) 204 return bytes_per_line; 205 206 if (!mx3_cam->idmac_channel[0]) 207 return -EINVAL; 208 209 *num_planes = 1; 210 211 mx3_cam->sequence = 0; 212 sizes[0] = bytes_per_line * icd->user_height; 213 alloc_ctxs[0] = mx3_cam->alloc_ctx; 214 215 if (!*count) 216 *count = 32; 217 218 if (sizes[0] * *count > MAX_VIDEO_MEM * 1024 * 1024) 219 *count = MAX_VIDEO_MEM * 1024 * 1024 / sizes[0]; 220 221 return 0; 222} 223 224static int mx3_videobuf_prepare(struct vb2_buffer *vb) 225{ 226 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); 227 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 228 struct mx3_camera_dev *mx3_cam = ici->priv; 229 struct idmac_channel *ichan = mx3_cam->idmac_channel[0]; 230 struct scatterlist *sg; 231 struct mx3_camera_buffer *buf; 232 size_t new_size; 233 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, 234 icd->current_fmt->host_fmt); 235 236 if (bytes_per_line < 0) 237 return bytes_per_line; 238 239 buf = to_mx3_vb(vb); 240 sg = &buf->sg; 241 242 new_size = bytes_per_line * icd->user_height; 243 244 if (vb2_plane_size(vb, 0) < new_size) { 245 dev_err(icd->dev.parent, "Buffer too small (%lu < %zu)\n", 246 vb2_plane_size(vb, 0), new_size); 247 return -ENOBUFS; 248 } 249 250 if (buf->state == CSI_BUF_NEEDS_INIT) { 251 sg_dma_address(sg) = vb2_dma_contig_plane_paddr(vb, 0); 252 sg_dma_len(sg) = new_size; 253 254 buf->txd = ichan->dma_chan.device->device_prep_slave_sg( 255 &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE, 256 DMA_PREP_INTERRUPT); 257 if (!buf->txd) 258 return -EIO; 259 260 buf->txd->callback_param = buf->txd; 261 buf->txd->callback = mx3_cam_dma_done; 262 263 buf->state = CSI_BUF_PREPARED; 264 } 265 266 vb2_set_plane_payload(vb, 0, new_size); 267 268 return 0; 269} 270 271static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc) 272{ 273 /* Add more formats as need arises and test possibilities appear... */ 274 switch (fourcc) { 275 case V4L2_PIX_FMT_RGB24: 276 return IPU_PIX_FMT_RGB24; 277 case V4L2_PIX_FMT_UYVY: 278 case V4L2_PIX_FMT_RGB565: 279 default: 280 return IPU_PIX_FMT_GENERIC; 281 } 282} 283 284static void mx3_videobuf_queue(struct vb2_buffer *vb) 285{ 286 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); 287 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 288 struct mx3_camera_dev *mx3_cam = ici->priv; 289 struct mx3_camera_buffer *buf = to_mx3_vb(vb); 290 struct dma_async_tx_descriptor *txd = buf->txd; 291 struct idmac_channel *ichan = to_idmac_chan(txd->chan); 292 struct idmac_video_param *video = &ichan->params.video; 293 dma_cookie_t cookie; 294 u32 fourcc = icd->current_fmt->host_fmt->fourcc; 295 unsigned long flags; 296 297 /* This is the configuration of one sg-element */ 298 video->out_pixel_fmt = fourcc_to_ipu_pix(fourcc); 299 300 if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) { 301 /* 302 * If the IPU DMA channel is configured to transport 303 * generic 8-bit data, we have to set up correctly the 304 * geometry parameters upon the current pixel format. 305 * So, since the DMA horizontal parameters are expressed 306 * in bytes not pixels, convert these in the right unit. 307 */ 308 int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, 309 icd->current_fmt->host_fmt); 310 BUG_ON(bytes_per_line <= 0); 311 312 video->out_width = bytes_per_line; 313 video->out_height = icd->user_height; 314 video->out_stride = bytes_per_line; 315 } else { 316 /* 317 * For IPU known formats the pixel unit will be managed 318 * successfully by the IPU code 319 */ 320 video->out_width = icd->user_width; 321 video->out_height = icd->user_height; 322 video->out_stride = icd->user_width; 323 } 324 325#ifdef DEBUG 326 /* helps to see what DMA actually has written */ 327 if (vb2_plane_vaddr(vb, 0)) 328 memset(vb2_plane_vaddr(vb, 0), 0xaa, vb2_get_plane_payload(vb, 0)); 329#endif 330 331 spin_lock_irqsave(&mx3_cam->lock, flags); 332 list_add_tail(&buf->queue, &mx3_cam->capture); 333 334 if (!mx3_cam->active) 335 mx3_cam->active = buf; 336 337 spin_unlock_irq(&mx3_cam->lock); 338 339 cookie = txd->tx_submit(txd); 340 dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n", 341 cookie, sg_dma_address(&buf->sg)); 342 343 if (cookie >= 0) 344 return; 345 346 spin_lock_irq(&mx3_cam->lock); 347 348 /* Submit error */ 349 list_del_init(&buf->queue); 350 351 if (mx3_cam->active == buf) 352 mx3_cam->active = NULL; 353 354 spin_unlock_irqrestore(&mx3_cam->lock, flags); 355 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR); 356} 357 358static void mx3_videobuf_release(struct vb2_buffer *vb) 359{ 360 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue); 361 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 362 struct mx3_camera_dev *mx3_cam = ici->priv; 363 struct mx3_camera_buffer *buf = to_mx3_vb(vb); 364 struct dma_async_tx_descriptor *txd = buf->txd; 365 unsigned long flags; 366 367 dev_dbg(icd->dev.parent, 368 "Release%s DMA 0x%08x, queue %sempty\n", 369 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg), 370 list_empty(&buf->queue) ? "" : "not "); 371 372 spin_lock_irqsave(&mx3_cam->lock, flags); 373 374 if (mx3_cam->active == buf) 375 mx3_cam->active = NULL; 376 377 /* Doesn't hurt also if the list is empty */ 378 list_del_init(&buf->queue); 379 buf->state = CSI_BUF_NEEDS_INIT; 380 381 if (txd) { 382 buf->txd = NULL; 383 if (mx3_cam->idmac_channel[0]) 384 async_tx_ack(txd); 385 } 386 387 spin_unlock_irqrestore(&mx3_cam->lock, flags); 388} 389 390static int mx3_videobuf_init(struct vb2_buffer *vb) 391{ 392 struct mx3_camera_buffer *buf = to_mx3_vb(vb); 393 /* This is for locking debugging only */ 394 INIT_LIST_HEAD(&buf->queue); 395 sg_init_table(&buf->sg, 1); 396 397 buf->state = CSI_BUF_NEEDS_INIT; 398 buf->txd = NULL; 399 400 return 0; 401} 402 403static int mx3_stop_streaming(struct vb2_queue *q) 404{ 405 struct soc_camera_device *icd = soc_camera_from_vb2q(q); 406 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 407 struct mx3_camera_dev *mx3_cam = ici->priv; 408 struct idmac_channel *ichan = mx3_cam->idmac_channel[0]; 409 struct dma_chan *chan; 410 struct mx3_camera_buffer *buf, *tmp; 411 unsigned long flags; 412 413 if (ichan) { 414 chan = &ichan->dma_chan; 415 chan->device->device_control(chan, DMA_TERMINATE_ALL, 0); 416 } 417 418 spin_lock_irqsave(&mx3_cam->lock, flags); 419 420 mx3_cam->active = NULL; 421 422 list_for_each_entry_safe(buf, tmp, &mx3_cam->capture, queue) { 423 buf->state = CSI_BUF_NEEDS_INIT; 424 list_del_init(&buf->queue); 425 } 426 427 spin_unlock_irqrestore(&mx3_cam->lock, flags); 428 429 return 0; 430} 431 432static struct vb2_ops mx3_videobuf_ops = { 433 .queue_setup = mx3_videobuf_setup, 434 .buf_prepare = mx3_videobuf_prepare, 435 .buf_queue = mx3_videobuf_queue, 436 .buf_cleanup = mx3_videobuf_release, 437 .buf_init = mx3_videobuf_init, 438 .wait_prepare = soc_camera_unlock, 439 .wait_finish = soc_camera_lock, 440 .stop_streaming = mx3_stop_streaming, 441}; 442 443static int mx3_camera_init_videobuf(struct vb2_queue *q, 444 struct soc_camera_device *icd) 445{ 446 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 447 q->io_modes = VB2_MMAP | VB2_USERPTR; 448 q->drv_priv = icd; 449 q->ops = &mx3_videobuf_ops; 450 q->mem_ops = &vb2_dma_contig_memops; 451 q->buf_struct_size = sizeof(struct mx3_camera_buffer); 452 453 return vb2_queue_init(q); 454} 455 456/* First part of ipu_csi_init_interface() */ 457static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam, 458 struct soc_camera_device *icd) 459{ 460 u32 conf; 461 long rate; 462 463 /* Set default size: ipu_csi_set_window_size() */ 464 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE); 465 /* ...and position to 0:0: ipu_csi_set_window_pos() */ 466 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000; 467 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL); 468 469 /* We use only gated clock synchronisation mode so far */ 470 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT; 471 472 /* Set generic data, platform-biggest bus-width */ 473 conf |= CSI_SENS_CONF_DATA_FMT_BAYER; 474 475 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15) 476 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 477 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10) 478 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 479 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8) 480 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 481 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/ 482 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 483 484 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC) 485 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT; 486 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC) 487 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT; 488 if (mx3_cam->platform_flags & MX3_CAMERA_DP) 489 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT; 490 if (mx3_cam->platform_flags & MX3_CAMERA_PCP) 491 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT; 492 if (mx3_cam->platform_flags & MX3_CAMERA_HSP) 493 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT; 494 if (mx3_cam->platform_flags & MX3_CAMERA_VSP) 495 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT; 496 497 /* ipu_csi_init_interface() */ 498 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF); 499 500 clk_enable(mx3_cam->clk); 501 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk); 502 dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate); 503 if (rate) 504 clk_set_rate(mx3_cam->clk, rate); 505} 506 507/* Called with .video_lock held */ 508static int mx3_camera_add_device(struct soc_camera_device *icd) 509{ 510 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 511 struct mx3_camera_dev *mx3_cam = ici->priv; 512 513 if (mx3_cam->icd) 514 return -EBUSY; 515 516 mx3_camera_activate(mx3_cam, icd); 517 518 mx3_cam->icd = icd; 519 520 dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n", 521 icd->devnum); 522 523 return 0; 524} 525 526/* Called with .video_lock held */ 527static void mx3_camera_remove_device(struct soc_camera_device *icd) 528{ 529 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 530 struct mx3_camera_dev *mx3_cam = ici->priv; 531 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0]; 532 533 BUG_ON(icd != mx3_cam->icd); 534 535 if (*ichan) { 536 dma_release_channel(&(*ichan)->dma_chan); 537 *ichan = NULL; 538 } 539 540 clk_disable(mx3_cam->clk); 541 542 mx3_cam->icd = NULL; 543 544 dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n", 545 icd->devnum); 546} 547 548static int test_platform_param(struct mx3_camera_dev *mx3_cam, 549 unsigned char buswidth, unsigned long *flags) 550{ 551 /* 552 * Platform specified synchronization and pixel clock polarities are 553 * only a recommendation and are only used during probing. MX3x 554 * camera interface only works in master mode, i.e., uses HSYNC and 555 * VSYNC signals from the sensor 556 */ 557 *flags = SOCAM_MASTER | 558 SOCAM_HSYNC_ACTIVE_HIGH | 559 SOCAM_HSYNC_ACTIVE_LOW | 560 SOCAM_VSYNC_ACTIVE_HIGH | 561 SOCAM_VSYNC_ACTIVE_LOW | 562 SOCAM_PCLK_SAMPLE_RISING | 563 SOCAM_PCLK_SAMPLE_FALLING | 564 SOCAM_DATA_ACTIVE_HIGH | 565 SOCAM_DATA_ACTIVE_LOW; 566 567 /* 568 * If requested data width is supported by the platform, use it or any 569 * possible lower value - i.MX31 is smart enough to schift bits 570 */ 571 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15) 572 *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 | 573 SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4; 574 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10) 575 *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 | 576 SOCAM_DATAWIDTH_4; 577 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8) 578 *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4; 579 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4) 580 *flags |= SOCAM_DATAWIDTH_4; 581 582 switch (buswidth) { 583 case 15: 584 if (!(*flags & SOCAM_DATAWIDTH_15)) 585 return -EINVAL; 586 break; 587 case 10: 588 if (!(*flags & SOCAM_DATAWIDTH_10)) 589 return -EINVAL; 590 break; 591 case 8: 592 if (!(*flags & SOCAM_DATAWIDTH_8)) 593 return -EINVAL; 594 break; 595 case 4: 596 if (!(*flags & SOCAM_DATAWIDTH_4)) 597 return -EINVAL; 598 break; 599 default: 600 dev_warn(mx3_cam->soc_host.v4l2_dev.dev, 601 "Unsupported bus width %d\n", buswidth); 602 return -EINVAL; 603 } 604 605 return 0; 606} 607 608static int mx3_camera_try_bus_param(struct soc_camera_device *icd, 609 const unsigned int depth) 610{ 611 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 612 struct mx3_camera_dev *mx3_cam = ici->priv; 613 unsigned long bus_flags, camera_flags; 614 int ret = test_platform_param(mx3_cam, depth, &bus_flags); 615 616 dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret); 617 618 if (ret < 0) 619 return ret; 620 621 camera_flags = icd->ops->query_bus_param(icd); 622 623 ret = soc_camera_bus_param_compatible(camera_flags, bus_flags); 624 if (ret < 0) 625 dev_warn(icd->dev.parent, 626 "Flags incompatible: camera %lx, host %lx\n", 627 camera_flags, bus_flags); 628 629 return ret; 630} 631 632static bool chan_filter(struct dma_chan *chan, void *arg) 633{ 634 struct dma_chan_request *rq = arg; 635 struct mx3_camera_pdata *pdata; 636 637 if (!imx_dma_is_ipu(chan)) 638 return false; 639 640 if (!rq) 641 return false; 642 643 pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data; 644 645 return rq->id == chan->chan_id && 646 pdata->dma_dev == chan->device->dev; 647} 648 649static const struct soc_mbus_pixelfmt mx3_camera_formats[] = { 650 { 651 .fourcc = V4L2_PIX_FMT_SBGGR8, 652 .name = "Bayer BGGR (sRGB) 8 bit", 653 .bits_per_sample = 8, 654 .packing = SOC_MBUS_PACKING_NONE, 655 .order = SOC_MBUS_ORDER_LE, 656 }, { 657 .fourcc = V4L2_PIX_FMT_GREY, 658 .name = "Monochrome 8 bit", 659 .bits_per_sample = 8, 660 .packing = SOC_MBUS_PACKING_NONE, 661 .order = SOC_MBUS_ORDER_LE, 662 }, 663}; 664 665/* This will be corrected as we get more formats */ 666static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt) 667{ 668 return fmt->packing == SOC_MBUS_PACKING_NONE || 669 (fmt->bits_per_sample == 8 && 670 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) || 671 (fmt->bits_per_sample > 8 && 672 fmt->packing == SOC_MBUS_PACKING_EXTEND16); 673} 674 675static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int idx, 676 struct soc_camera_format_xlate *xlate) 677{ 678 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 679 struct device *dev = icd->dev.parent; 680 int formats = 0, ret; 681 enum v4l2_mbus_pixelcode code; 682 const struct soc_mbus_pixelfmt *fmt; 683 684 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code); 685 if (ret < 0) 686 /* No more formats */ 687 return 0; 688 689 fmt = soc_mbus_get_fmtdesc(code); 690 if (!fmt) { 691 dev_warn(icd->dev.parent, 692 "Unsupported format code #%u: %d\n", idx, code); 693 return 0; 694 } 695 696 /* This also checks support for the requested bits-per-sample */ 697 ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample); 698 if (ret < 0) 699 return 0; 700 701 switch (code) { 702 case V4L2_MBUS_FMT_SBGGR10_1X10: 703 formats++; 704 if (xlate) { 705 xlate->host_fmt = &mx3_camera_formats[0]; 706 xlate->code = code; 707 xlate++; 708 dev_dbg(dev, "Providing format %s using code %d\n", 709 mx3_camera_formats[0].name, code); 710 } 711 break; 712 case V4L2_MBUS_FMT_Y10_1X10: 713 formats++; 714 if (xlate) { 715 xlate->host_fmt = &mx3_camera_formats[1]; 716 xlate->code = code; 717 xlate++; 718 dev_dbg(dev, "Providing format %s using code %d\n", 719 mx3_camera_formats[1].name, code); 720 } 721 break; 722 default: 723 if (!mx3_camera_packing_supported(fmt)) 724 return 0; 725 } 726 727 /* Generic pass-through */ 728 formats++; 729 if (xlate) { 730 xlate->host_fmt = fmt; 731 xlate->code = code; 732 dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n", 733 (fmt->fourcc >> (0*8)) & 0xFF, 734 (fmt->fourcc >> (1*8)) & 0xFF, 735 (fmt->fourcc >> (2*8)) & 0xFF, 736 (fmt->fourcc >> (3*8)) & 0xFF); 737 xlate++; 738 } 739 740 return formats; 741} 742 743static void configure_geometry(struct mx3_camera_dev *mx3_cam, 744 unsigned int width, unsigned int height, 745 const struct soc_mbus_pixelfmt *fmt) 746{ 747 u32 ctrl, width_field, height_field; 748 749 if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) { 750 /* 751 * As the CSI will be configured to output BAYER, here 752 * the width parameter count the number of samples to 753 * capture to complete the whole image width. 754 */ 755 unsigned int num, den; 756 int ret = soc_mbus_samples_per_pixel(fmt, &num, &den); 757 BUG_ON(ret < 0); 758 width = width * num / den; 759 } 760 761 /* Setup frame size - this cannot be changed on-the-fly... */ 762 width_field = width - 1; 763 height_field = height - 1; 764 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE); 765 766 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1); 767 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2); 768 769 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE); 770 771 /* ...and position */ 772 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000; 773 /* Sensor does the cropping */ 774 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL); 775} 776 777static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam) 778{ 779 dma_cap_mask_t mask; 780 struct dma_chan *chan; 781 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0]; 782 /* We have to use IDMAC_IC_7 for Bayer / generic data */ 783 struct dma_chan_request rq = {.mx3_cam = mx3_cam, 784 .id = IDMAC_IC_7}; 785 786 dma_cap_zero(mask); 787 dma_cap_set(DMA_SLAVE, mask); 788 dma_cap_set(DMA_PRIVATE, mask); 789 chan = dma_request_channel(mask, chan_filter, &rq); 790 if (!chan) 791 return -EBUSY; 792 793 *ichan = to_idmac_chan(chan); 794 (*ichan)->client = mx3_cam; 795 796 return 0; 797} 798 799/* 800 * FIXME: learn to use stride != width, then we can keep stride properly aligned 801 * and support arbitrary (even) widths. 802 */ 803static inline void stride_align(__u32 *width) 804{ 805 if (ALIGN(*width, 8) < 4096) 806 *width = ALIGN(*width, 8); 807 else 808 *width = *width & ~7; 809} 810 811/* 812 * As long as we don't implement host-side cropping and scaling, we can use 813 * default g_crop and cropcap from soc_camera.c 814 */ 815static int mx3_camera_set_crop(struct soc_camera_device *icd, 816 struct v4l2_crop *a) 817{ 818 struct v4l2_rect *rect = &a->c; 819 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 820 struct mx3_camera_dev *mx3_cam = ici->priv; 821 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 822 struct v4l2_mbus_framefmt mf; 823 int ret; 824 825 soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096); 826 soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096); 827 828 ret = v4l2_subdev_call(sd, video, s_crop, a); 829 if (ret < 0) 830 return ret; 831 832 /* The capture device might have changed its output sizes */ 833 ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf); 834 if (ret < 0) 835 return ret; 836 837 if (mf.code != icd->current_fmt->code) 838 return -EINVAL; 839 840 if (mf.width & 7) { 841 /* Ouch! We can only handle 8-byte aligned width... */ 842 stride_align(&mf.width); 843 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); 844 if (ret < 0) 845 return ret; 846 } 847 848 if (mf.width != icd->user_width || mf.height != icd->user_height) 849 configure_geometry(mx3_cam, mf.width, mf.height, 850 icd->current_fmt->host_fmt); 851 852 dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n", 853 mf.width, mf.height); 854 855 icd->user_width = mf.width; 856 icd->user_height = mf.height; 857 858 return ret; 859} 860 861static int mx3_camera_set_fmt(struct soc_camera_device *icd, 862 struct v4l2_format *f) 863{ 864 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 865 struct mx3_camera_dev *mx3_cam = ici->priv; 866 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 867 const struct soc_camera_format_xlate *xlate; 868 struct v4l2_pix_format *pix = &f->fmt.pix; 869 struct v4l2_mbus_framefmt mf; 870 int ret; 871 872 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); 873 if (!xlate) { 874 dev_warn(icd->dev.parent, "Format %x not found\n", 875 pix->pixelformat); 876 return -EINVAL; 877 } 878 879 stride_align(&pix->width); 880 dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height); 881 882 /* 883 * Might have to perform a complete interface initialisation like in 884 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider 885 * mxc_v4l2_s_fmt() 886 */ 887 888 configure_geometry(mx3_cam, pix->width, pix->height, xlate->host_fmt); 889 890 mf.width = pix->width; 891 mf.height = pix->height; 892 mf.field = pix->field; 893 mf.colorspace = pix->colorspace; 894 mf.code = xlate->code; 895 896 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); 897 if (ret < 0) 898 return ret; 899 900 if (mf.code != xlate->code) 901 return -EINVAL; 902 903 if (!mx3_cam->idmac_channel[0]) { 904 ret = acquire_dma_channel(mx3_cam); 905 if (ret < 0) 906 return ret; 907 } 908 909 pix->width = mf.width; 910 pix->height = mf.height; 911 pix->field = mf.field; 912 mx3_cam->field = mf.field; 913 pix->colorspace = mf.colorspace; 914 icd->current_fmt = xlate; 915 916 pix->bytesperline = soc_mbus_bytes_per_line(pix->width, 917 xlate->host_fmt); 918 if (pix->bytesperline < 0) 919 return pix->bytesperline; 920 pix->sizeimage = pix->height * pix->bytesperline; 921 922 dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height); 923 924 return ret; 925} 926 927static int mx3_camera_try_fmt(struct soc_camera_device *icd, 928 struct v4l2_format *f) 929{ 930 struct v4l2_subdev *sd = soc_camera_to_subdev(icd); 931 const struct soc_camera_format_xlate *xlate; 932 struct v4l2_pix_format *pix = &f->fmt.pix; 933 struct v4l2_mbus_framefmt mf; 934 __u32 pixfmt = pix->pixelformat; 935 int ret; 936 937 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); 938 if (pixfmt && !xlate) { 939 dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt); 940 return -EINVAL; 941 } 942 943 /* limit to MX3 hardware capabilities */ 944 if (pix->height > 4096) 945 pix->height = 4096; 946 if (pix->width > 4096) 947 pix->width = 4096; 948 949 pix->bytesperline = soc_mbus_bytes_per_line(pix->width, 950 xlate->host_fmt); 951 if (pix->bytesperline < 0) 952 return pix->bytesperline; 953 pix->sizeimage = pix->height * pix->bytesperline; 954 955 /* limit to sensor capabilities */ 956 mf.width = pix->width; 957 mf.height = pix->height; 958 mf.field = pix->field; 959 mf.colorspace = pix->colorspace; 960 mf.code = xlate->code; 961 962 ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf); 963 if (ret < 0) 964 return ret; 965 966 pix->width = mf.width; 967 pix->height = mf.height; 968 pix->colorspace = mf.colorspace; 969 970 switch (mf.field) { 971 case V4L2_FIELD_ANY: 972 pix->field = V4L2_FIELD_NONE; 973 break; 974 case V4L2_FIELD_NONE: 975 break; 976 default: 977 dev_err(icd->dev.parent, "Field type %d unsupported.\n", 978 mf.field); 979 ret = -EINVAL; 980 } 981 982 return ret; 983} 984 985static int mx3_camera_reqbufs(struct soc_camera_device *icd, 986 struct v4l2_requestbuffers *p) 987{ 988 return 0; 989} 990 991static unsigned int mx3_camera_poll(struct file *file, poll_table *pt) 992{ 993 struct soc_camera_device *icd = file->private_data; 994 995 return vb2_poll(&icd->vb2_vidq, file, pt); 996} 997 998static int mx3_camera_querycap(struct soc_camera_host *ici, 999 struct v4l2_capability *cap) 1000{ 1001 /* cap->name is set by the firendly caller:-> */ 1002 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card)); 1003 cap->version = KERNEL_VERSION(0, 2, 2); 1004 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; 1005 1006 return 0; 1007} 1008 1009static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt) 1010{ 1011 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); 1012 struct mx3_camera_dev *mx3_cam = ici->priv; 1013 unsigned long bus_flags, camera_flags, common_flags; 1014 u32 dw, sens_conf; 1015 const struct soc_mbus_pixelfmt *fmt; 1016 int buswidth; 1017 int ret; 1018 const struct soc_camera_format_xlate *xlate; 1019 struct device *dev = icd->dev.parent; 1020 1021 fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code); 1022 if (!fmt) 1023 return -EINVAL; 1024 1025 buswidth = fmt->bits_per_sample; 1026 ret = test_platform_param(mx3_cam, buswidth, &bus_flags); 1027 1028 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); 1029 if (!xlate) { 1030 dev_warn(dev, "Format %x not found\n", pixfmt); 1031 return -EINVAL; 1032 } 1033 1034 dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret); 1035 1036 if (ret < 0) 1037 return ret; 1038 1039 camera_flags = icd->ops->query_bus_param(icd); 1040 1041 common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags); 1042 dev_dbg(dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n", 1043 camera_flags, bus_flags, common_flags); 1044 if (!common_flags) { 1045 dev_dbg(dev, "no common flags"); 1046 return -EINVAL; 1047 } 1048 1049 /* Make choices, based on platform preferences */ 1050 if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) && 1051 (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) { 1052 if (mx3_cam->platform_flags & MX3_CAMERA_HSP) 1053 common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH; 1054 else 1055 common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW; 1056 } 1057 1058 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) && 1059 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) { 1060 if (mx3_cam->platform_flags & MX3_CAMERA_VSP) 1061 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH; 1062 else 1063 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW; 1064 } 1065 1066 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) && 1067 (common_flags & SOCAM_DATA_ACTIVE_LOW)) { 1068 if (mx3_cam->platform_flags & MX3_CAMERA_DP) 1069 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH; 1070 else 1071 common_flags &= ~SOCAM_DATA_ACTIVE_LOW; 1072 } 1073 1074 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) && 1075 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) { 1076 if (mx3_cam->platform_flags & MX3_CAMERA_PCP) 1077 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING; 1078 else 1079 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING; 1080 } 1081 1082 /* 1083 * Make the camera work in widest common mode, we'll take care of 1084 * the rest 1085 */ 1086 if (common_flags & SOCAM_DATAWIDTH_15) 1087 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) | 1088 SOCAM_DATAWIDTH_15; 1089 else if (common_flags & SOCAM_DATAWIDTH_10) 1090 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) | 1091 SOCAM_DATAWIDTH_10; 1092 else if (common_flags & SOCAM_DATAWIDTH_8) 1093 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) | 1094 SOCAM_DATAWIDTH_8; 1095 else 1096 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) | 1097 SOCAM_DATAWIDTH_4; 1098 1099 ret = icd->ops->set_bus_param(icd, common_flags); 1100 if (ret < 0) { 1101 dev_dbg(dev, "camera set_bus_param(%lx) returned %d\n", 1102 common_flags, ret); 1103 return ret; 1104 } 1105 1106 /* 1107 * So far only gated clock mode is supported. Add a line 1108 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) | 1109 * below and select the required mode when supporting other 1110 * synchronisation protocols. 1111 */ 1112 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) & 1113 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) | 1114 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) | 1115 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) | 1116 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) | 1117 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) | 1118 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT)); 1119 1120 /* TODO: Support RGB and YUV formats */ 1121 1122 /* This has been set in mx3_camera_activate(), but we clear it above */ 1123 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER; 1124 1125 if (common_flags & SOCAM_PCLK_SAMPLE_FALLING) 1126 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT; 1127 if (common_flags & SOCAM_HSYNC_ACTIVE_LOW) 1128 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT; 1129 if (common_flags & SOCAM_VSYNC_ACTIVE_LOW) 1130 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT; 1131 if (common_flags & SOCAM_DATA_ACTIVE_LOW) 1132 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT; 1133 1134 /* Just do what we're asked to do */ 1135 switch (xlate->host_fmt->bits_per_sample) { 1136 case 4: 1137 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 1138 break; 1139 case 8: 1140 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 1141 break; 1142 case 10: 1143 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 1144 break; 1145 default: 1146 /* 1147 * Actually it can only be 15 now, default is just to silence 1148 * compiler warnings 1149 */ 1150 case 15: 1151 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT; 1152 } 1153 1154 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF); 1155 1156 dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw); 1157 1158 return 0; 1159} 1160 1161static struct soc_camera_host_ops mx3_soc_camera_host_ops = { 1162 .owner = THIS_MODULE, 1163 .add = mx3_camera_add_device, 1164 .remove = mx3_camera_remove_device, 1165 .set_crop = mx3_camera_set_crop, 1166 .set_fmt = mx3_camera_set_fmt, 1167 .try_fmt = mx3_camera_try_fmt, 1168 .get_formats = mx3_camera_get_formats, 1169 .init_videobuf2 = mx3_camera_init_videobuf, 1170 .reqbufs = mx3_camera_reqbufs, 1171 .poll = mx3_camera_poll, 1172 .querycap = mx3_camera_querycap, 1173 .set_bus_param = mx3_camera_set_bus_param, 1174}; 1175 1176static int __devinit mx3_camera_probe(struct platform_device *pdev) 1177{ 1178 struct mx3_camera_dev *mx3_cam; 1179 struct resource *res; 1180 void __iomem *base; 1181 int err = 0; 1182 struct soc_camera_host *soc_host; 1183 1184 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1185 if (!res) { 1186 err = -ENODEV; 1187 goto egetres; 1188 } 1189 1190 mx3_cam = vzalloc(sizeof(*mx3_cam)); 1191 if (!mx3_cam) { 1192 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n"); 1193 err = -ENOMEM; 1194 goto ealloc; 1195 } 1196 1197 mx3_cam->clk = clk_get(&pdev->dev, NULL); 1198 if (IS_ERR(mx3_cam->clk)) { 1199 err = PTR_ERR(mx3_cam->clk); 1200 goto eclkget; 1201 } 1202 1203 mx3_cam->pdata = pdev->dev.platform_data; 1204 mx3_cam->platform_flags = mx3_cam->pdata->flags; 1205 if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 | 1206 MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 | 1207 MX3_CAMERA_DATAWIDTH_15))) { 1208 /* 1209 * Platform hasn't set available data widths. This is bad. 1210 * Warn and use a default. 1211 */ 1212 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available " 1213 "data widths, using default 8 bit\n"); 1214 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8; 1215 } 1216 1217 mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000; 1218 if (!mx3_cam->mclk) { 1219 dev_warn(&pdev->dev, 1220 "mclk_10khz == 0! Please, fix your platform data. " 1221 "Using default 20MHz\n"); 1222 mx3_cam->mclk = 20000000; 1223 } 1224 1225 /* list of video-buffers */ 1226 INIT_LIST_HEAD(&mx3_cam->capture); 1227 spin_lock_init(&mx3_cam->lock); 1228 1229 base = ioremap(res->start, resource_size(res)); 1230 if (!base) { 1231 pr_err("Couldn't map %x@%x\n", resource_size(res), res->start); 1232 err = -ENOMEM; 1233 goto eioremap; 1234 } 1235 1236 mx3_cam->base = base; 1237 1238 soc_host = &mx3_cam->soc_host; 1239 soc_host->drv_name = MX3_CAM_DRV_NAME; 1240 soc_host->ops = &mx3_soc_camera_host_ops; 1241 soc_host->priv = mx3_cam; 1242 soc_host->v4l2_dev.dev = &pdev->dev; 1243 soc_host->nr = pdev->id; 1244 1245 mx3_cam->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev); 1246 if (IS_ERR(mx3_cam->alloc_ctx)) { 1247 err = PTR_ERR(mx3_cam->alloc_ctx); 1248 goto eallocctx; 1249 } 1250 1251 err = soc_camera_host_register(soc_host); 1252 if (err) 1253 goto ecamhostreg; 1254 1255 /* IDMAC interface */ 1256 dmaengine_get(); 1257 1258 return 0; 1259 1260ecamhostreg: 1261 vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx); 1262eallocctx: 1263 iounmap(base); 1264eioremap: 1265 clk_put(mx3_cam->clk); 1266eclkget: 1267 vfree(mx3_cam); 1268ealloc: 1269egetres: 1270 return err; 1271} 1272 1273static int __devexit mx3_camera_remove(struct platform_device *pdev) 1274{ 1275 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); 1276 struct mx3_camera_dev *mx3_cam = container_of(soc_host, 1277 struct mx3_camera_dev, soc_host); 1278 1279 clk_put(mx3_cam->clk); 1280 1281 soc_camera_host_unregister(soc_host); 1282 1283 iounmap(mx3_cam->base); 1284 1285 /* 1286 * The channel has either not been allocated, 1287 * or should have been released 1288 */ 1289 if (WARN_ON(mx3_cam->idmac_channel[0])) 1290 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan); 1291 1292 vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx); 1293 1294 vfree(mx3_cam); 1295 1296 dmaengine_put(); 1297 1298 dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n"); 1299 1300 return 0; 1301} 1302 1303static struct platform_driver mx3_camera_driver = { 1304 .driver = { 1305 .name = MX3_CAM_DRV_NAME, 1306 }, 1307 .probe = mx3_camera_probe, 1308 .remove = __devexit_p(mx3_camera_remove), 1309}; 1310 1311 1312static int __init mx3_camera_init(void) 1313{ 1314 return platform_driver_register(&mx3_camera_driver); 1315} 1316 1317static void __exit mx3_camera_exit(void) 1318{ 1319 platform_driver_unregister(&mx3_camera_driver); 1320} 1321 1322module_init(mx3_camera_init); 1323module_exit(mx3_camera_exit); 1324 1325MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver"); 1326MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>"); 1327MODULE_LICENSE("GPL v2"); 1328MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);