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/drivers/input/touchscreen/ctp_platform_ops.h

https://bitbucket.org/ndreys/linux-sunxi
C Header | 122 lines | 88 code | 11 blank | 23 comment | 0 complexity | 990578300b9fb6bc1baff57439c36e0e MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1/*
  2* This program is free software; you can redistribute it and/or modify
  3* it under the terms of the GNU General Public License as published by
  4* the Free Software Foundation; either version 2 of the License, or
  5* (at your option) any later version.
  6*
  7* This program is distributed in the hope that it will be useful,
  8* but WITHOUT ANY WARRANTY; without even the implied warranty of
  9* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 10* GNU General Public License for more details.
 11*
 12* You should have received a copy of the GNU General Public License
 13* along with this program; if not, write to the Free Software
 14* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
 15*
 16* Copyright (c) 2009
 17*
 18* ChangeLog
 19*
 20*
 21*/
 22#ifndef _CTP_PLATFORM_OPS_H_
 23#define _CTP_PLATFORM_OPS_H_
 24#include <linux/i2c.h>
 25#include <linux/input.h>
 26#include <linux/delay.h>
 27#include <linux/interrupt.h>
 28#include <linux/errno.h>
 29#include <linux/kernel.h>
 30#include <linux/module.h>
 31#include <linux/slab.h>
 32#include <linux/init.h>
 33#include <linux/ioport.h>
 34#include <asm/irq.h>
 35#include <asm/io.h>
 36
 37#include <mach/irqs.h>
 38#include <linux/i2c.h>
 39
 40// gpio base address
 41#define PIO_BASE_ADDRESS	(0x01c20800)
 42#define PIO_RANGE_SIZE		(0x400)
 43#define GPIO_ENABLE
 44#define SYSCONFIG_GPIO_ENABLE
 45
 46#define PIO_INT_STAT_OFFSET          (0x214)
 47#define PIO_INT_CTRL_OFFSET          (0x210)
 48
 49#define PIO_PN_DAT_OFFSET(n)         ((n)*0x24 + 0x10)
 50//#define PIOI_DATA                    (0x130)
 51#define PIOH_DATA                    (0x10c)
 52#define PIOI_CFG3_OFFSET             (0x12c)
 53
 54#define PRESS_DOWN	(1)
 55#define FREE_UP		(0)
 56
 57#define IRQ_EINT0	(0)
 58#define IRQ_EINT1	(1)
 59#define IRQ_EINT2	(2)
 60#define IRQ_EINT3	(3)
 61#define IRQ_EINT4	(4)
 62#define IRQ_EINT5	(5)
 63#define IRQ_EINT6	(6)
 64#define IRQ_EINT7	(7)
 65#define IRQ_EINT8	(8)
 66#define IRQ_EINT9	(9)
 67#define IRQ_EINT10	(10)
 68#define IRQ_EINT11	(11)
 69#define IRQ_EINT12	(12)
 70#define IRQ_EINT13	(13)
 71#define IRQ_EINT14	(14)
 72#define IRQ_EINT15	(15)
 73#define IRQ_EINT16	(16)
 74#define IRQ_EINT17	(17)
 75#define IRQ_EINT18	(18)
 76#define IRQ_EINT19	(19)
 77#define IRQ_EINT20	(20)
 78#define IRQ_EINT21	(21)
 79#define IRQ_EINT22	(22)
 80#define IRQ_EINT23	(23)
 81#define IRQ_EINT24	(24)
 82#define IRQ_EINT25	(25)
 83#define IRQ_EINT26	(26)
 84#define IRQ_EINT27	(27)
 85#define IRQ_EINT28	(28)
 86#define IRQ_EINT29	(29)
 87#define IRQ_EINT30	(30)
 88#define IRQ_EINT31	(31)
 89
 90typedef enum {
 91     PIO_INT_CFG0_OFFSET = 0x200,
 92     PIO_INT_CFG1_OFFSET = 0x204,
 93     PIO_INT_CFG2_OFFSET = 0x208,
 94     PIO_INT_CFG3_OFFSET = 0x20c,
 95} int_cfg_offset;
 96
 97typedef enum{
 98	POSITIVE_EDGE = 0x0,
 99	NEGATIVE_EDGE = 0x1,
100	HIGH_LEVEL = 0x2,
101	LOW_LEVEL = 0x3,
102	DOUBLE_EDGE = 0x4
103} ext_int_mode;
104
105struct ctp_platform_ops{
106	int         irq;
107	bool        pendown;
108	int	(*get_pendown_state)(void);
109	void        (*clear_penirq)(void);
110	int         (*set_irq_mode)(char *major_key , char *subkey, ext_int_mode int_mode);
111	int         (*set_gpio_mode)(void);
112	int         (*judge_int_occur)(void);
113	int         (*init_platform_resource)(void);
114	void        (*free_platform_resource)(void);
115	int         (*fetch_sysconfig_para)(void);
116	void        (*ts_reset)(void);
117	void        (*ts_wakeup)(void);
118	int (*ts_detect)(struct i2c_client *client, struct i2c_board_info *info);
119};
120
121#endif /*_CTP_PLATFORM_OPS_H_*/
122