/drivers/input/touchscreen/ctp_platform_ops.h

https://bitbucket.org/ndreys/linux-sunxi · C Header · 122 lines · 88 code · 11 blank · 23 comment · 0 complexity · 990578300b9fb6bc1baff57439c36e0e MD5 · raw file

  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License as published by
  4. * the Free Software Foundation; either version 2 of the License, or
  5. * (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  15. *
  16. * Copyright (c) 2009
  17. *
  18. * ChangeLog
  19. *
  20. *
  21. */
  22. #ifndef _CTP_PLATFORM_OPS_H_
  23. #define _CTP_PLATFORM_OPS_H_
  24. #include <linux/i2c.h>
  25. #include <linux/input.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/errno.h>
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/slab.h>
  32. #include <linux/init.h>
  33. #include <linux/ioport.h>
  34. #include <asm/irq.h>
  35. #include <asm/io.h>
  36. #include <mach/irqs.h>
  37. #include <linux/i2c.h>
  38. // gpio base address
  39. #define PIO_BASE_ADDRESS (0x01c20800)
  40. #define PIO_RANGE_SIZE (0x400)
  41. #define GPIO_ENABLE
  42. #define SYSCONFIG_GPIO_ENABLE
  43. #define PIO_INT_STAT_OFFSET (0x214)
  44. #define PIO_INT_CTRL_OFFSET (0x210)
  45. #define PIO_PN_DAT_OFFSET(n) ((n)*0x24 + 0x10)
  46. //#define PIOI_DATA (0x130)
  47. #define PIOH_DATA (0x10c)
  48. #define PIOI_CFG3_OFFSET (0x12c)
  49. #define PRESS_DOWN (1)
  50. #define FREE_UP (0)
  51. #define IRQ_EINT0 (0)
  52. #define IRQ_EINT1 (1)
  53. #define IRQ_EINT2 (2)
  54. #define IRQ_EINT3 (3)
  55. #define IRQ_EINT4 (4)
  56. #define IRQ_EINT5 (5)
  57. #define IRQ_EINT6 (6)
  58. #define IRQ_EINT7 (7)
  59. #define IRQ_EINT8 (8)
  60. #define IRQ_EINT9 (9)
  61. #define IRQ_EINT10 (10)
  62. #define IRQ_EINT11 (11)
  63. #define IRQ_EINT12 (12)
  64. #define IRQ_EINT13 (13)
  65. #define IRQ_EINT14 (14)
  66. #define IRQ_EINT15 (15)
  67. #define IRQ_EINT16 (16)
  68. #define IRQ_EINT17 (17)
  69. #define IRQ_EINT18 (18)
  70. #define IRQ_EINT19 (19)
  71. #define IRQ_EINT20 (20)
  72. #define IRQ_EINT21 (21)
  73. #define IRQ_EINT22 (22)
  74. #define IRQ_EINT23 (23)
  75. #define IRQ_EINT24 (24)
  76. #define IRQ_EINT25 (25)
  77. #define IRQ_EINT26 (26)
  78. #define IRQ_EINT27 (27)
  79. #define IRQ_EINT28 (28)
  80. #define IRQ_EINT29 (29)
  81. #define IRQ_EINT30 (30)
  82. #define IRQ_EINT31 (31)
  83. typedef enum {
  84. PIO_INT_CFG0_OFFSET = 0x200,
  85. PIO_INT_CFG1_OFFSET = 0x204,
  86. PIO_INT_CFG2_OFFSET = 0x208,
  87. PIO_INT_CFG3_OFFSET = 0x20c,
  88. } int_cfg_offset;
  89. typedef enum{
  90. POSITIVE_EDGE = 0x0,
  91. NEGATIVE_EDGE = 0x1,
  92. HIGH_LEVEL = 0x2,
  93. LOW_LEVEL = 0x3,
  94. DOUBLE_EDGE = 0x4
  95. } ext_int_mode;
  96. struct ctp_platform_ops{
  97. int irq;
  98. bool pendown;
  99. int (*get_pendown_state)(void);
  100. void (*clear_penirq)(void);
  101. int (*set_irq_mode)(char *major_key , char *subkey, ext_int_mode int_mode);
  102. int (*set_gpio_mode)(void);
  103. int (*judge_int_occur)(void);
  104. int (*init_platform_resource)(void);
  105. void (*free_platform_resource)(void);
  106. int (*fetch_sysconfig_para)(void);
  107. void (*ts_reset)(void);
  108. void (*ts_wakeup)(void);
  109. int (*ts_detect)(struct i2c_client *client, struct i2c_board_info *info);
  110. };
  111. #endif /*_CTP_PLATFORM_OPS_H_*/