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/drivers/gpu/drm/via/via_3d_reg.h

https://bitbucket.org/ndreys/linux-sunxi
C++ Header | 1650 lines | 1373 code | 30 blank | 247 comment | 0 complexity | 196d56a9123a95eb46e1a52027337ccf MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0

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   1/*
   2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
   3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a
   6 * copy of this software and associated documentation files (the "Software"),
   7 * to deal in the Software without restriction, including without limitation
   8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
   9 * and/or sell copies of the Software, and to permit persons to whom the
  10 * Software is furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice (including the
  13 * next paragraph) shall be included in all copies or substantial portions
  14 * of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22 * DEALINGS IN THE SOFTWARE.
  23 */
  24
  25#ifndef VIA_3D_REG_H
  26#define VIA_3D_REG_H
  27#define HC_REG_BASE             0x0400
  28
  29#define HC_REG_TRANS_SPACE      0x0040
  30
  31#define HC_ParaN_MASK           0xffffffff
  32#define HC_Para_MASK            0x00ffffff
  33#define HC_SubA_MASK            0xff000000
  34#define HC_SubA_SHIFT           24
  35/* Transmission Setting
  36 */
  37#define HC_REG_TRANS_SET        0x003c
  38#define HC_ParaSubType_MASK     0xff000000
  39#define HC_ParaType_MASK        0x00ff0000
  40#define HC_ParaOS_MASK          0x0000ff00
  41#define HC_ParaAdr_MASK         0x000000ff
  42#define HC_ParaSubType_SHIFT    24
  43#define HC_ParaType_SHIFT       16
  44#define HC_ParaOS_SHIFT         8
  45#define HC_ParaAdr_SHIFT        0
  46
  47#define HC_ParaType_CmdVdata    0x0000
  48#define HC_ParaType_NotTex      0x0001
  49#define HC_ParaType_Tex         0x0002
  50#define HC_ParaType_Palette     0x0003
  51#define HC_ParaType_PreCR       0x0010
  52#define HC_ParaType_Auto        0x00fe
  53
  54/* Transmission Space
  55 */
  56#define HC_REG_Hpara0           0x0040
  57#define HC_REG_HpataAF          0x02fc
  58
  59/* Read
  60 */
  61#define HC_REG_HREngSt          0x0000
  62#define HC_REG_HRFIFOempty      0x0004
  63#define HC_REG_HRFIFOfull       0x0008
  64#define HC_REG_HRErr            0x000c
  65#define HC_REG_FIFOstatus       0x0010
  66/* HC_REG_HREngSt          0x0000
  67 */
  68#define HC_HDASZC_MASK          0x00010000
  69#define HC_HSGEMI_MASK          0x0000f000
  70#define HC_HLGEMISt_MASK        0x00000f00
  71#define HC_HCRSt_MASK           0x00000080
  72#define HC_HSE0St_MASK          0x00000040
  73#define HC_HSE1St_MASK          0x00000020
  74#define HC_HPESt_MASK           0x00000010
  75#define HC_HXESt_MASK           0x00000008
  76#define HC_HBESt_MASK           0x00000004
  77#define HC_HE2St_MASK           0x00000002
  78#define HC_HE3St_MASK           0x00000001
  79/* HC_REG_HRFIFOempty      0x0004
  80 */
  81#define HC_HRZDempty_MASK       0x00000010
  82#define HC_HRTXAempty_MASK      0x00000008
  83#define HC_HRTXDempty_MASK      0x00000004
  84#define HC_HWZDempty_MASK       0x00000002
  85#define HC_HWCDempty_MASK       0x00000001
  86/* HC_REG_HRFIFOfull       0x0008
  87 */
  88#define HC_HRZDfull_MASK        0x00000010
  89#define HC_HRTXAfull_MASK       0x00000008
  90#define HC_HRTXDfull_MASK       0x00000004
  91#define HC_HWZDfull_MASK        0x00000002
  92#define HC_HWCDfull_MASK        0x00000001
  93/* HC_REG_HRErr            0x000c
  94 */
  95#define HC_HAGPCMErr_MASK       0x80000000
  96#define HC_HAGPCMErrC_MASK      0x70000000
  97/* HC_REG_FIFOstatus       0x0010
  98 */
  99#define HC_HRFIFOATall_MASK     0x80000000
 100#define HC_HRFIFOATbusy_MASK    0x40000000
 101#define HC_HRATFGMDo_MASK       0x00000100
 102#define HC_HRATFGMDi_MASK       0x00000080
 103#define HC_HRATFRZD_MASK        0x00000040
 104#define HC_HRATFRTXA_MASK       0x00000020
 105#define HC_HRATFRTXD_MASK       0x00000010
 106#define HC_HRATFWZD_MASK        0x00000008
 107#define HC_HRATFWCD_MASK        0x00000004
 108#define HC_HRATTXTAG_MASK       0x00000002
 109#define HC_HRATTXCH_MASK        0x00000001
 110
 111/* AGP Command Setting
 112 */
 113#define HC_SubA_HAGPBstL        0x0060
 114#define HC_SubA_HAGPBendL       0x0061
 115#define HC_SubA_HAGPCMNT        0x0062
 116#define HC_SubA_HAGPBpL         0x0063
 117#define HC_SubA_HAGPBpH         0x0064
 118/* HC_SubA_HAGPCMNT        0x0062
 119 */
 120#define HC_HAGPCMNT_MASK        0x00800000
 121#define HC_HCmdErrClr_MASK      0x00400000
 122#define HC_HAGPBendH_MASK       0x0000ff00
 123#define HC_HAGPBstH_MASK        0x000000ff
 124#define HC_HAGPBendH_SHIFT      8
 125#define HC_HAGPBstH_SHIFT       0
 126/* HC_SubA_HAGPBpL         0x0063
 127 */
 128#define HC_HAGPBpL_MASK         0x00fffffc
 129#define HC_HAGPBpID_MASK        0x00000003
 130#define HC_HAGPBpID_PAUSE       0x00000000
 131#define HC_HAGPBpID_JUMP        0x00000001
 132#define HC_HAGPBpID_STOP        0x00000002
 133/* HC_SubA_HAGPBpH         0x0064
 134 */
 135#define HC_HAGPBpH_MASK         0x00ffffff
 136
 137/* Miscellaneous Settings
 138 */
 139#define HC_SubA_HClipTB         0x0070
 140#define HC_SubA_HClipLR         0x0071
 141#define HC_SubA_HFPClipTL       0x0072
 142#define HC_SubA_HFPClipBL       0x0073
 143#define HC_SubA_HFPClipLL       0x0074
 144#define HC_SubA_HFPClipRL       0x0075
 145#define HC_SubA_HFPClipTBH      0x0076
 146#define HC_SubA_HFPClipLRH      0x0077
 147#define HC_SubA_HLP             0x0078
 148#define HC_SubA_HLPRF           0x0079
 149#define HC_SubA_HSolidCL        0x007a
 150#define HC_SubA_HPixGC          0x007b
 151#define HC_SubA_HSPXYOS         0x007c
 152#define HC_SubA_HVertexCNT      0x007d
 153
 154#define HC_HClipT_MASK          0x00fff000
 155#define HC_HClipT_SHIFT         12
 156#define HC_HClipB_MASK          0x00000fff
 157#define HC_HClipB_SHIFT         0
 158#define HC_HClipL_MASK          0x00fff000
 159#define HC_HClipL_SHIFT         12
 160#define HC_HClipR_MASK          0x00000fff
 161#define HC_HClipR_SHIFT         0
 162#define HC_HFPClipBH_MASK       0x0000ff00
 163#define HC_HFPClipBH_SHIFT      8
 164#define HC_HFPClipTH_MASK       0x000000ff
 165#define HC_HFPClipTH_SHIFT      0
 166#define HC_HFPClipRH_MASK       0x0000ff00
 167#define HC_HFPClipRH_SHIFT      8
 168#define HC_HFPClipLH_MASK       0x000000ff
 169#define HC_HFPClipLH_SHIFT      0
 170#define HC_HSolidCH_MASK        0x000000ff
 171#define HC_HPixGC_MASK          0x00800000
 172#define HC_HSPXOS_MASK          0x00fff000
 173#define HC_HSPXOS_SHIFT         12
 174#define HC_HSPYOS_MASK          0x00000fff
 175
 176/* Command
 177 * Command A
 178 */
 179#define HC_HCmdHeader_MASK      0xfe000000	/*0xffe00000 */
 180#define HC_HE3Fire_MASK         0x00100000
 181#define HC_HPMType_MASK         0x000f0000
 182#define HC_HEFlag_MASK          0x0000e000
 183#define HC_HShading_MASK        0x00001c00
 184#define HC_HPMValidN_MASK       0x00000200
 185#define HC_HPLEND_MASK          0x00000100
 186#define HC_HVCycle_MASK         0x000000ff
 187#define HC_HVCycle_Style_MASK   0x000000c0
 188#define HC_HVCycle_ChgA_MASK    0x00000030
 189#define HC_HVCycle_ChgB_MASK    0x0000000c
 190#define HC_HVCycle_ChgC_MASK    0x00000003
 191#define HC_HPMType_Point        0x00000000
 192#define HC_HPMType_Line         0x00010000
 193#define HC_HPMType_Tri          0x00020000
 194#define HC_HPMType_TriWF        0x00040000
 195#define HC_HEFlag_NoAA          0x00000000
 196#define HC_HEFlag_ab            0x00008000
 197#define HC_HEFlag_bc            0x00004000
 198#define HC_HEFlag_ca            0x00002000
 199#define HC_HShading_Solid       0x00000000
 200#define HC_HShading_FlatA       0x00000400
 201#define HC_HShading_FlatB       0x00000800
 202#define HC_HShading_FlatC       0x00000c00
 203#define HC_HShading_Gouraud     0x00001000
 204#define HC_HVCycle_Full         0x00000000
 205#define HC_HVCycle_AFP          0x00000040
 206#define HC_HVCycle_One          0x000000c0
 207#define HC_HVCycle_NewA         0x00000000
 208#define HC_HVCycle_AA           0x00000010
 209#define HC_HVCycle_AB           0x00000020
 210#define HC_HVCycle_AC           0x00000030
 211#define HC_HVCycle_NewB         0x00000000
 212#define HC_HVCycle_BA           0x00000004
 213#define HC_HVCycle_BB           0x00000008
 214#define HC_HVCycle_BC           0x0000000c
 215#define HC_HVCycle_NewC         0x00000000
 216#define HC_HVCycle_CA           0x00000001
 217#define HC_HVCycle_CB           0x00000002
 218#define HC_HVCycle_CC           0x00000003
 219
 220/* Command B
 221 */
 222#define HC_HLPrst_MASK          0x00010000
 223#define HC_HLLastP_MASK         0x00008000
 224#define HC_HVPMSK_MASK          0x00007f80
 225#define HC_HBFace_MASK          0x00000040
 226#define HC_H2nd1VT_MASK         0x0000003f
 227#define HC_HVPMSK_X             0x00004000
 228#define HC_HVPMSK_Y             0x00002000
 229#define HC_HVPMSK_Z             0x00001000
 230#define HC_HVPMSK_W             0x00000800
 231#define HC_HVPMSK_Cd            0x00000400
 232#define HC_HVPMSK_Cs            0x00000200
 233#define HC_HVPMSK_S             0x00000100
 234#define HC_HVPMSK_T             0x00000080
 235
 236/* Enable Setting
 237 */
 238#define HC_SubA_HEnable         0x0000
 239#define HC_HenTXEnvMap_MASK     0x00200000
 240#define HC_HenVertexCNT_MASK    0x00100000
 241#define HC_HenCPUDAZ_MASK       0x00080000
 242#define HC_HenDASZWC_MASK       0x00040000
 243#define HC_HenFBCull_MASK       0x00020000
 244#define HC_HenCW_MASK           0x00010000
 245#define HC_HenAA_MASK           0x00008000
 246#define HC_HenST_MASK           0x00004000
 247#define HC_HenZT_MASK           0x00002000
 248#define HC_HenZW_MASK           0x00001000
 249#define HC_HenAT_MASK           0x00000800
 250#define HC_HenAW_MASK           0x00000400
 251#define HC_HenSP_MASK           0x00000200
 252#define HC_HenLP_MASK           0x00000100
 253#define HC_HenTXCH_MASK         0x00000080
 254#define HC_HenTXMP_MASK         0x00000040
 255#define HC_HenTXPP_MASK         0x00000020
 256#define HC_HenTXTR_MASK         0x00000010
 257#define HC_HenCS_MASK           0x00000008
 258#define HC_HenFOG_MASK          0x00000004
 259#define HC_HenABL_MASK          0x00000002
 260#define HC_HenDT_MASK           0x00000001
 261
 262/* Z Setting
 263 */
 264#define HC_SubA_HZWBBasL        0x0010
 265#define HC_SubA_HZWBBasH        0x0011
 266#define HC_SubA_HZWBType        0x0012
 267#define HC_SubA_HZBiasL         0x0013
 268#define HC_SubA_HZWBend         0x0014
 269#define HC_SubA_HZWTMD          0x0015
 270#define HC_SubA_HZWCDL          0x0016
 271#define HC_SubA_HZWCTAGnum      0x0017
 272#define HC_SubA_HZCYNum         0x0018
 273#define HC_SubA_HZWCFire        0x0019
 274/* HC_SubA_HZWBType
 275 */
 276#define HC_HZWBType_MASK        0x00800000
 277#define HC_HZBiasedWB_MASK      0x00400000
 278#define HC_HZONEasFF_MASK       0x00200000
 279#define HC_HZOONEasFF_MASK      0x00100000
 280#define HC_HZWBFM_MASK          0x00030000
 281#define HC_HZWBLoc_MASK         0x0000c000
 282#define HC_HZWBPit_MASK         0x00003fff
 283#define HC_HZWBFM_16            0x00000000
 284#define HC_HZWBFM_32            0x00020000
 285#define HC_HZWBFM_24            0x00030000
 286#define HC_HZWBLoc_Local        0x00000000
 287#define HC_HZWBLoc_SyS          0x00004000
 288/* HC_SubA_HZWBend
 289 */
 290#define HC_HZWBend_MASK         0x00ffe000
 291#define HC_HZBiasH_MASK         0x000000ff
 292#define HC_HZWBend_SHIFT        10
 293/* HC_SubA_HZWTMD
 294 */
 295#define HC_HZWTMD_MASK          0x00070000
 296#define HC_HEBEBias_MASK        0x00007f00
 297#define HC_HZNF_MASK            0x000000ff
 298#define HC_HZWTMD_NeverPass     0x00000000
 299#define HC_HZWTMD_LT            0x00010000
 300#define HC_HZWTMD_EQ            0x00020000
 301#define HC_HZWTMD_LE            0x00030000
 302#define HC_HZWTMD_GT            0x00040000
 303#define HC_HZWTMD_NE            0x00050000
 304#define HC_HZWTMD_GE            0x00060000
 305#define HC_HZWTMD_AllPass       0x00070000
 306#define HC_HEBEBias_SHIFT       8
 307/* HC_SubA_HZWCDL          0x0016
 308 */
 309#define HC_HZWCDL_MASK          0x00ffffff
 310/* HC_SubA_HZWCTAGnum      0x0017
 311 */
 312#define HC_HZWCTAGnum_MASK      0x00ff0000
 313#define HC_HZWCTAGnum_SHIFT     16
 314#define HC_HZWCDH_MASK          0x000000ff
 315#define HC_HZWCDH_SHIFT         0
 316/* HC_SubA_HZCYNum         0x0018
 317 */
 318#define HC_HZCYNum_MASK         0x00030000
 319#define HC_HZCYNum_SHIFT        16
 320#define HC_HZWCQWnum_MASK       0x00003fff
 321#define HC_HZWCQWnum_SHIFT      0
 322/* HC_SubA_HZWCFire        0x0019
 323 */
 324#define HC_ZWCFire_MASK         0x00010000
 325#define HC_HZWCQWnumLast_MASK   0x00003fff
 326#define HC_HZWCQWnumLast_SHIFT  0
 327
 328/* Stencil Setting
 329 */
 330#define HC_SubA_HSTREF          0x0023
 331#define HC_SubA_HSTMD           0x0024
 332/* HC_SubA_HSBFM
 333 */
 334#define HC_HSBFM_MASK           0x00030000
 335#define HC_HSBLoc_MASK          0x0000c000
 336#define HC_HSBPit_MASK          0x00003fff
 337/* HC_SubA_HSTREF
 338 */
 339#define HC_HSTREF_MASK          0x00ff0000
 340#define HC_HSTOPMSK_MASK        0x0000ff00
 341#define HC_HSTBMSK_MASK         0x000000ff
 342#define HC_HSTREF_SHIFT         16
 343#define HC_HSTOPMSK_SHIFT       8
 344/* HC_SubA_HSTMD
 345 */
 346#define HC_HSTMD_MASK           0x00070000
 347#define HC_HSTOPSF_MASK         0x000001c0
 348#define HC_HSTOPSPZF_MASK       0x00000038
 349#define HC_HSTOPSPZP_MASK       0x00000007
 350#define HC_HSTMD_NeverPass      0x00000000
 351#define HC_HSTMD_LT             0x00010000
 352#define HC_HSTMD_EQ             0x00020000
 353#define HC_HSTMD_LE             0x00030000
 354#define HC_HSTMD_GT             0x00040000
 355#define HC_HSTMD_NE             0x00050000
 356#define HC_HSTMD_GE             0x00060000
 357#define HC_HSTMD_AllPass        0x00070000
 358#define HC_HSTOPSF_KEEP         0x00000000
 359#define HC_HSTOPSF_ZERO         0x00000040
 360#define HC_HSTOPSF_REPLACE      0x00000080
 361#define HC_HSTOPSF_INCRSAT      0x000000c0
 362#define HC_HSTOPSF_DECRSAT      0x00000100
 363#define HC_HSTOPSF_INVERT       0x00000140
 364#define HC_HSTOPSF_INCR         0x00000180
 365#define HC_HSTOPSF_DECR         0x000001c0
 366#define HC_HSTOPSPZF_KEEP       0x00000000
 367#define HC_HSTOPSPZF_ZERO       0x00000008
 368#define HC_HSTOPSPZF_REPLACE    0x00000010
 369#define HC_HSTOPSPZF_INCRSAT    0x00000018
 370#define HC_HSTOPSPZF_DECRSAT    0x00000020
 371#define HC_HSTOPSPZF_INVERT     0x00000028
 372#define HC_HSTOPSPZF_INCR       0x00000030
 373#define HC_HSTOPSPZF_DECR       0x00000038
 374#define HC_HSTOPSPZP_KEEP       0x00000000
 375#define HC_HSTOPSPZP_ZERO       0x00000001
 376#define HC_HSTOPSPZP_REPLACE    0x00000002
 377#define HC_HSTOPSPZP_INCRSAT    0x00000003
 378#define HC_HSTOPSPZP_DECRSAT    0x00000004
 379#define HC_HSTOPSPZP_INVERT     0x00000005
 380#define HC_HSTOPSPZP_INCR       0x00000006
 381#define HC_HSTOPSPZP_DECR       0x00000007
 382
 383/* Alpha Setting
 384 */
 385#define HC_SubA_HABBasL         0x0030
 386#define HC_SubA_HABBasH         0x0031
 387#define HC_SubA_HABFM           0x0032
 388#define HC_SubA_HATMD           0x0033
 389#define HC_SubA_HABLCsat        0x0034
 390#define HC_SubA_HABLCop         0x0035
 391#define HC_SubA_HABLAsat        0x0036
 392#define HC_SubA_HABLAop         0x0037
 393#define HC_SubA_HABLRCa         0x0038
 394#define HC_SubA_HABLRFCa        0x0039
 395#define HC_SubA_HABLRCbias      0x003a
 396#define HC_SubA_HABLRCb         0x003b
 397#define HC_SubA_HABLRFCb        0x003c
 398#define HC_SubA_HABLRAa         0x003d
 399#define HC_SubA_HABLRAb         0x003e
 400/* HC_SubA_HABFM
 401 */
 402#define HC_HABFM_MASK           0x00030000
 403#define HC_HABLoc_MASK          0x0000c000
 404#define HC_HABPit_MASK          0x000007ff
 405/* HC_SubA_HATMD
 406 */
 407#define HC_HATMD_MASK           0x00000700
 408#define HC_HATREF_MASK          0x000000ff
 409#define HC_HATMD_NeverPass      0x00000000
 410#define HC_HATMD_LT             0x00000100
 411#define HC_HATMD_EQ             0x00000200
 412#define HC_HATMD_LE             0x00000300
 413#define HC_HATMD_GT             0x00000400
 414#define HC_HATMD_NE             0x00000500
 415#define HC_HATMD_GE             0x00000600
 416#define HC_HATMD_AllPass        0x00000700
 417/* HC_SubA_HABLCsat
 418 */
 419#define HC_HABLCsat_MASK        0x00010000
 420#define HC_HABLCa_MASK          0x0000fc00
 421#define HC_HABLCa_C_MASK        0x0000c000
 422#define HC_HABLCa_OPC_MASK      0x00003c00
 423#define HC_HABLFCa_MASK         0x000003f0
 424#define HC_HABLFCa_C_MASK       0x00000300
 425#define HC_HABLFCa_OPC_MASK     0x000000f0
 426#define HC_HABLCbias_MASK       0x0000000f
 427#define HC_HABLCbias_C_MASK     0x00000008
 428#define HC_HABLCbias_OPC_MASK   0x00000007
 429/*-- Define the input color.
 430 */
 431#define HC_XC_Csrc              0x00000000
 432#define HC_XC_Cdst              0x00000001
 433#define HC_XC_Asrc              0x00000002
 434#define HC_XC_Adst              0x00000003
 435#define HC_XC_Fog               0x00000004
 436#define HC_XC_HABLRC            0x00000005
 437#define HC_XC_minSrcDst         0x00000006
 438#define HC_XC_maxSrcDst         0x00000007
 439#define HC_XC_mimAsrcInvAdst    0x00000008
 440#define HC_XC_OPC               0x00000000
 441#define HC_XC_InvOPC            0x00000010
 442#define HC_XC_OPCp5             0x00000020
 443/*-- Define the input Alpha
 444 */
 445#define HC_XA_OPA               0x00000000
 446#define HC_XA_InvOPA            0x00000010
 447#define HC_XA_OPAp5             0x00000020
 448#define HC_XA_0                 0x00000000
 449#define HC_XA_Asrc              0x00000001
 450#define HC_XA_Adst              0x00000002
 451#define HC_XA_Fog               0x00000003
 452#define HC_XA_minAsrcFog        0x00000004
 453#define HC_XA_minAsrcAdst       0x00000005
 454#define HC_XA_maxAsrcFog        0x00000006
 455#define HC_XA_maxAsrcAdst       0x00000007
 456#define HC_XA_HABLRA            0x00000008
 457#define HC_XA_minAsrcInvAdst    0x00000008
 458#define HC_XA_HABLFRA           0x00000009
 459/*--
 460 */
 461#define HC_HABLCa_OPC           (HC_XC_OPC << 10)
 462#define HC_HABLCa_InvOPC        (HC_XC_InvOPC << 10)
 463#define HC_HABLCa_OPCp5         (HC_XC_OPCp5 << 10)
 464#define HC_HABLCa_Csrc          (HC_XC_Csrc << 10)
 465#define HC_HABLCa_Cdst          (HC_XC_Cdst << 10)
 466#define HC_HABLCa_Asrc          (HC_XC_Asrc << 10)
 467#define HC_HABLCa_Adst          (HC_XC_Adst << 10)
 468#define HC_HABLCa_Fog           (HC_XC_Fog << 10)
 469#define HC_HABLCa_HABLRCa       (HC_XC_HABLRC << 10)
 470#define HC_HABLCa_minSrcDst     (HC_XC_minSrcDst << 10)
 471#define HC_HABLCa_maxSrcDst     (HC_XC_maxSrcDst << 10)
 472#define HC_HABLFCa_OPC              (HC_XC_OPC << 4)
 473#define HC_HABLFCa_InvOPC           (HC_XC_InvOPC << 4)
 474#define HC_HABLFCa_OPCp5            (HC_XC_OPCp5 << 4)
 475#define HC_HABLFCa_Csrc             (HC_XC_Csrc << 4)
 476#define HC_HABLFCa_Cdst             (HC_XC_Cdst << 4)
 477#define HC_HABLFCa_Asrc             (HC_XC_Asrc << 4)
 478#define HC_HABLFCa_Adst             (HC_XC_Adst << 4)
 479#define HC_HABLFCa_Fog              (HC_XC_Fog << 4)
 480#define HC_HABLFCa_HABLRCa          (HC_XC_HABLRC << 4)
 481#define HC_HABLFCa_minSrcDst        (HC_XC_minSrcDst << 4)
 482#define HC_HABLFCa_maxSrcDst        (HC_XC_maxSrcDst << 4)
 483#define HC_HABLFCa_mimAsrcInvAdst   (HC_XC_mimAsrcInvAdst << 4)
 484#define HC_HABLCbias_HABLRCbias 0x00000000
 485#define HC_HABLCbias_Asrc       0x00000001
 486#define HC_HABLCbias_Adst       0x00000002
 487#define HC_HABLCbias_Fog        0x00000003
 488#define HC_HABLCbias_Cin        0x00000004
 489/* HC_SubA_HABLCop         0x0035
 490 */
 491#define HC_HABLdot_MASK         0x00010000
 492#define HC_HABLCop_MASK         0x00004000
 493#define HC_HABLCb_MASK          0x00003f00
 494#define HC_HABLCb_C_MASK        0x00003000
 495#define HC_HABLCb_OPC_MASK      0x00000f00
 496#define HC_HABLFCb_MASK         0x000000fc
 497#define HC_HABLFCb_C_MASK       0x000000c0
 498#define HC_HABLFCb_OPC_MASK     0x0000003c
 499#define HC_HABLCshift_MASK      0x00000003
 500#define HC_HABLCb_OPC           (HC_XC_OPC << 8)
 501#define HC_HABLCb_InvOPC        (HC_XC_InvOPC << 8)
 502#define HC_HABLCb_OPCp5         (HC_XC_OPCp5 << 8)
 503#define HC_HABLCb_Csrc          (HC_XC_Csrc << 8)
 504#define HC_HABLCb_Cdst          (HC_XC_Cdst << 8)
 505#define HC_HABLCb_Asrc          (HC_XC_Asrc << 8)
 506#define HC_HABLCb_Adst          (HC_XC_Adst << 8)
 507#define HC_HABLCb_Fog           (HC_XC_Fog << 8)
 508#define HC_HABLCb_HABLRCa       (HC_XC_HABLRC << 8)
 509#define HC_HABLCb_minSrcDst     (HC_XC_minSrcDst << 8)
 510#define HC_HABLCb_maxSrcDst     (HC_XC_maxSrcDst << 8)
 511#define HC_HABLFCb_OPC              (HC_XC_OPC << 2)
 512#define HC_HABLFCb_InvOPC           (HC_XC_InvOPC << 2)
 513#define HC_HABLFCb_OPCp5            (HC_XC_OPCp5 << 2)
 514#define HC_HABLFCb_Csrc             (HC_XC_Csrc << 2)
 515#define HC_HABLFCb_Cdst             (HC_XC_Cdst << 2)
 516#define HC_HABLFCb_Asrc             (HC_XC_Asrc << 2)
 517#define HC_HABLFCb_Adst             (HC_XC_Adst << 2)
 518#define HC_HABLFCb_Fog              (HC_XC_Fog << 2)
 519#define HC_HABLFCb_HABLRCb          (HC_XC_HABLRC << 2)
 520#define HC_HABLFCb_minSrcDst        (HC_XC_minSrcDst << 2)
 521#define HC_HABLFCb_maxSrcDst        (HC_XC_maxSrcDst << 2)
 522#define HC_HABLFCb_mimAsrcInvAdst   (HC_XC_mimAsrcInvAdst << 2)
 523/* HC_SubA_HABLAsat        0x0036
 524 */
 525#define HC_HABLAsat_MASK        0x00010000
 526#define HC_HABLAa_MASK          0x0000fc00
 527#define HC_HABLAa_A_MASK        0x0000c000
 528#define HC_HABLAa_OPA_MASK      0x00003c00
 529#define HC_HABLFAa_MASK         0x000003f0
 530#define HC_HABLFAa_A_MASK       0x00000300
 531#define HC_HABLFAa_OPA_MASK     0x000000f0
 532#define HC_HABLAbias_MASK       0x0000000f
 533#define HC_HABLAbias_A_MASK     0x00000008
 534#define HC_HABLAbias_OPA_MASK   0x00000007
 535#define HC_HABLAa_OPA           (HC_XA_OPA << 10)
 536#define HC_HABLAa_InvOPA        (HC_XA_InvOPA << 10)
 537#define HC_HABLAa_OPAp5         (HC_XA_OPAp5 << 10)
 538#define HC_HABLAa_0             (HC_XA_0 << 10)
 539#define HC_HABLAa_Asrc          (HC_XA_Asrc << 10)
 540#define HC_HABLAa_Adst          (HC_XA_Adst << 10)
 541#define HC_HABLAa_Fog           (HC_XA_Fog << 10)
 542#define HC_HABLAa_minAsrcFog    (HC_XA_minAsrcFog << 10)
 543#define HC_HABLAa_minAsrcAdst   (HC_XA_minAsrcAdst << 10)
 544#define HC_HABLAa_maxAsrcFog    (HC_XA_maxAsrcFog << 10)
 545#define HC_HABLAa_maxAsrcAdst   (HC_XA_maxAsrcAdst << 10)
 546#define HC_HABLAa_HABLRA        (HC_XA_HABLRA << 10)
 547#define HC_HABLFAa_OPA          (HC_XA_OPA << 4)
 548#define HC_HABLFAa_InvOPA       (HC_XA_InvOPA << 4)
 549#define HC_HABLFAa_OPAp5        (HC_XA_OPAp5 << 4)
 550#define HC_HABLFAa_0            (HC_XA_0 << 4)
 551#define HC_HABLFAa_Asrc         (HC_XA_Asrc << 4)
 552#define HC_HABLFAa_Adst         (HC_XA_Adst << 4)
 553#define HC_HABLFAa_Fog          (HC_XA_Fog << 4)
 554#define HC_HABLFAa_minAsrcFog   (HC_XA_minAsrcFog << 4)
 555#define HC_HABLFAa_minAsrcAdst  (HC_XA_minAsrcAdst << 4)
 556#define HC_HABLFAa_maxAsrcFog   (HC_XA_maxAsrcFog << 4)
 557#define HC_HABLFAa_maxAsrcAdst  (HC_XA_maxAsrcAdst << 4)
 558#define HC_HABLFAa_minAsrcInvAdst   (HC_XA_minAsrcInvAdst << 4)
 559#define HC_HABLFAa_HABLFRA          (HC_XA_HABLFRA << 4)
 560#define HC_HABLAbias_HABLRAbias 0x00000000
 561#define HC_HABLAbias_Asrc       0x00000001
 562#define HC_HABLAbias_Adst       0x00000002
 563#define HC_HABLAbias_Fog        0x00000003
 564#define HC_HABLAbias_Aaa        0x00000004
 565/* HC_SubA_HABLAop         0x0037
 566 */
 567#define HC_HABLAop_MASK         0x00004000
 568#define HC_HABLAb_MASK          0x00003f00
 569#define HC_HABLAb_OPA_MASK      0x00000f00
 570#define HC_HABLFAb_MASK         0x000000fc
 571#define HC_HABLFAb_OPA_MASK     0x0000003c
 572#define HC_HABLAshift_MASK      0x00000003
 573#define HC_HABLAb_OPA           (HC_XA_OPA << 8)
 574#define HC_HABLAb_InvOPA        (HC_XA_InvOPA << 8)
 575#define HC_HABLAb_OPAp5         (HC_XA_OPAp5 << 8)
 576#define HC_HABLAb_0             (HC_XA_0 << 8)
 577#define HC_HABLAb_Asrc          (HC_XA_Asrc << 8)
 578#define HC_HABLAb_Adst          (HC_XA_Adst << 8)
 579#define HC_HABLAb_Fog           (HC_XA_Fog << 8)
 580#define HC_HABLAb_minAsrcFog    (HC_XA_minAsrcFog << 8)
 581#define HC_HABLAb_minAsrcAdst   (HC_XA_minAsrcAdst << 8)
 582#define HC_HABLAb_maxAsrcFog    (HC_XA_maxAsrcFog << 8)
 583#define HC_HABLAb_maxAsrcAdst   (HC_XA_maxAsrcAdst << 8)
 584#define HC_HABLAb_HABLRA        (HC_XA_HABLRA << 8)
 585#define HC_HABLFAb_OPA          (HC_XA_OPA << 2)
 586#define HC_HABLFAb_InvOPA       (HC_XA_InvOPA << 2)
 587#define HC_HABLFAb_OPAp5        (HC_XA_OPAp5 << 2)
 588#define HC_HABLFAb_0            (HC_XA_0 << 2)
 589#define HC_HABLFAb_Asrc         (HC_XA_Asrc << 2)
 590#define HC_HABLFAb_Adst         (HC_XA_Adst << 2)
 591#define HC_HABLFAb_Fog          (HC_XA_Fog << 2)
 592#define HC_HABLFAb_minAsrcFog   (HC_XA_minAsrcFog << 2)
 593#define HC_HABLFAb_minAsrcAdst  (HC_XA_minAsrcAdst << 2)
 594#define HC_HABLFAb_maxAsrcFog   (HC_XA_maxAsrcFog << 2)
 595#define HC_HABLFAb_maxAsrcAdst  (HC_XA_maxAsrcAdst << 2)
 596#define HC_HABLFAb_minAsrcInvAdst   (HC_XA_minAsrcInvAdst << 2)
 597#define HC_HABLFAb_HABLFRA          (HC_XA_HABLFRA << 2)
 598/* HC_SubA_HABLRAa         0x003d
 599 */
 600#define HC_HABLRAa_MASK         0x00ff0000
 601#define HC_HABLRFAa_MASK        0x0000ff00
 602#define HC_HABLRAbias_MASK      0x000000ff
 603#define HC_HABLRAa_SHIFT        16
 604#define HC_HABLRFAa_SHIFT       8
 605/* HC_SubA_HABLRAb         0x003e
 606 */
 607#define HC_HABLRAb_MASK         0x0000ff00
 608#define HC_HABLRFAb_MASK        0x000000ff
 609#define HC_HABLRAb_SHIFT        8
 610
 611/* Destination Setting
 612 */
 613#define HC_SubA_HDBBasL         0x0040
 614#define HC_SubA_HDBBasH         0x0041
 615#define HC_SubA_HDBFM           0x0042
 616#define HC_SubA_HFBBMSKL        0x0043
 617#define HC_SubA_HROP            0x0044
 618/* HC_SubA_HDBFM           0x0042
 619 */
 620#define HC_HDBFM_MASK           0x001f0000
 621#define HC_HDBLoc_MASK          0x0000c000
 622#define HC_HDBPit_MASK          0x00003fff
 623#define HC_HDBFM_RGB555         0x00000000
 624#define HC_HDBFM_RGB565         0x00010000
 625#define HC_HDBFM_ARGB4444       0x00020000
 626#define HC_HDBFM_ARGB1555       0x00030000
 627#define HC_HDBFM_BGR555         0x00040000
 628#define HC_HDBFM_BGR565         0x00050000
 629#define HC_HDBFM_ABGR4444       0x00060000
 630#define HC_HDBFM_ABGR1555       0x00070000
 631#define HC_HDBFM_ARGB0888       0x00080000
 632#define HC_HDBFM_ARGB8888       0x00090000
 633#define HC_HDBFM_ABGR0888       0x000a0000
 634#define HC_HDBFM_ABGR8888       0x000b0000
 635#define HC_HDBLoc_Local         0x00000000
 636#define HC_HDBLoc_Sys           0x00004000
 637/* HC_SubA_HROP            0x0044
 638 */
 639#define HC_HROP_MASK            0x00000f00
 640#define HC_HFBBMSKH_MASK        0x000000ff
 641#define HC_HROP_BLACK           0x00000000
 642#define HC_HROP_DPon            0x00000100
 643#define HC_HROP_DPna            0x00000200
 644#define HC_HROP_Pn              0x00000300
 645#define HC_HROP_PDna            0x00000400
 646#define HC_HROP_Dn              0x00000500
 647#define HC_HROP_DPx             0x00000600
 648#define HC_HROP_DPan            0x00000700
 649#define HC_HROP_DPa             0x00000800
 650#define HC_HROP_DPxn            0x00000900
 651#define HC_HROP_D               0x00000a00
 652#define HC_HROP_DPno            0x00000b00
 653#define HC_HROP_P               0x00000c00
 654#define HC_HROP_PDno            0x00000d00
 655#define HC_HROP_DPo             0x00000e00
 656#define HC_HROP_WHITE           0x00000f00
 657
 658/* Fog Setting
 659 */
 660#define HC_SubA_HFogLF          0x0050
 661#define HC_SubA_HFogCL          0x0051
 662#define HC_SubA_HFogCH          0x0052
 663#define HC_SubA_HFogStL         0x0053
 664#define HC_SubA_HFogStH         0x0054
 665#define HC_SubA_HFogOOdMF       0x0055
 666#define HC_SubA_HFogOOdEF       0x0056
 667#define HC_SubA_HFogEndL        0x0057
 668#define HC_SubA_HFogDenst       0x0058
 669/* HC_SubA_FogLF           0x0050
 670 */
 671#define HC_FogLF_MASK           0x00000010
 672#define HC_FogEq_MASK           0x00000008
 673#define HC_FogMD_MASK           0x00000007
 674#define HC_FogMD_LocalFog        0x00000000
 675#define HC_FogMD_LinearFog       0x00000002
 676#define HC_FogMD_ExponentialFog  0x00000004
 677#define HC_FogMD_Exponential2Fog 0x00000005
 678/* #define HC_FogMD_FogTable       0x00000003 */
 679
 680/* HC_SubA_HFogDenst        0x0058
 681 */
 682#define HC_FogDenst_MASK        0x001fff00
 683#define HC_FogEndL_MASK         0x000000ff
 684
 685/* Texture subtype definitions
 686 */
 687#define HC_SubType_Tex0         0x00000000
 688#define HC_SubType_Tex1         0x00000001
 689#define HC_SubType_TexGeneral   0x000000fe
 690
 691/* Attribute of texture n
 692 */
 693#define HC_SubA_HTXnL0BasL      0x0000
 694#define HC_SubA_HTXnL1BasL      0x0001
 695#define HC_SubA_HTXnL2BasL      0x0002
 696#define HC_SubA_HTXnL3BasL      0x0003
 697#define HC_SubA_HTXnL4BasL      0x0004
 698#define HC_SubA_HTXnL5BasL      0x0005
 699#define HC_SubA_HTXnL6BasL      0x0006
 700#define HC_SubA_HTXnL7BasL      0x0007
 701#define HC_SubA_HTXnL8BasL      0x0008
 702#define HC_SubA_HTXnL9BasL      0x0009
 703#define HC_SubA_HTXnLaBasL      0x000a
 704#define HC_SubA_HTXnLbBasL      0x000b
 705#define HC_SubA_HTXnLcBasL      0x000c
 706#define HC_SubA_HTXnLdBasL      0x000d
 707#define HC_SubA_HTXnLeBasL      0x000e
 708#define HC_SubA_HTXnLfBasL      0x000f
 709#define HC_SubA_HTXnL10BasL     0x0010
 710#define HC_SubA_HTXnL11BasL     0x0011
 711#define HC_SubA_HTXnL012BasH    0x0020
 712#define HC_SubA_HTXnL345BasH    0x0021
 713#define HC_SubA_HTXnL678BasH    0x0022
 714#define HC_SubA_HTXnL9abBasH    0x0023
 715#define HC_SubA_HTXnLcdeBasH    0x0024
 716#define HC_SubA_HTXnLf1011BasH  0x0025
 717#define HC_SubA_HTXnL0Pit       0x002b
 718#define HC_SubA_HTXnL1Pit       0x002c
 719#define HC_SubA_HTXnL2Pit       0x002d
 720#define HC_SubA_HTXnL3Pit       0x002e
 721#define HC_SubA_HTXnL4Pit       0x002f
 722#define HC_SubA_HTXnL5Pit       0x0030
 723#define HC_SubA_HTXnL6Pit       0x0031
 724#define HC_SubA_HTXnL7Pit       0x0032
 725#define HC_SubA_HTXnL8Pit       0x0033
 726#define HC_SubA_HTXnL9Pit       0x0034
 727#define HC_SubA_HTXnLaPit       0x0035
 728#define HC_SubA_HTXnLbPit       0x0036
 729#define HC_SubA_HTXnLcPit       0x0037
 730#define HC_SubA_HTXnLdPit       0x0038
 731#define HC_SubA_HTXnLePit       0x0039
 732#define HC_SubA_HTXnLfPit       0x003a
 733#define HC_SubA_HTXnL10Pit      0x003b
 734#define HC_SubA_HTXnL11Pit      0x003c
 735#define HC_SubA_HTXnL0_5WE      0x004b
 736#define HC_SubA_HTXnL6_bWE      0x004c
 737#define HC_SubA_HTXnLc_11WE     0x004d
 738#define HC_SubA_HTXnL0_5HE      0x0051
 739#define HC_SubA_HTXnL6_bHE      0x0052
 740#define HC_SubA_HTXnLc_11HE     0x0053
 741#define HC_SubA_HTXnL0OS        0x0077
 742#define HC_SubA_HTXnTB          0x0078
 743#define HC_SubA_HTXnMPMD        0x0079
 744#define HC_SubA_HTXnCLODu       0x007a
 745#define HC_SubA_HTXnFM          0x007b
 746#define HC_SubA_HTXnTRCH        0x007c
 747#define HC_SubA_HTXnTRCL        0x007d
 748#define HC_SubA_HTXnTBC         0x007e
 749#define HC_SubA_HTXnTRAH        0x007f
 750#define HC_SubA_HTXnTBLCsat     0x0080
 751#define HC_SubA_HTXnTBLCop      0x0081
 752#define HC_SubA_HTXnTBLMPfog    0x0082
 753#define HC_SubA_HTXnTBLAsat     0x0083
 754#define HC_SubA_HTXnTBLRCa      0x0085
 755#define HC_SubA_HTXnTBLRCb      0x0086
 756#define HC_SubA_HTXnTBLRCc      0x0087
 757#define HC_SubA_HTXnTBLRCbias   0x0088
 758#define HC_SubA_HTXnTBLRAa      0x0089
 759#define HC_SubA_HTXnTBLRFog     0x008a
 760#define HC_SubA_HTXnBumpM00     0x0090
 761#define HC_SubA_HTXnBumpM01     0x0091
 762#define HC_SubA_HTXnBumpM10     0x0092
 763#define HC_SubA_HTXnBumpM11     0x0093
 764#define HC_SubA_HTXnLScale      0x0094
 765#define HC_SubA_HTXSMD          0x0000
 766/* HC_SubA_HTXnL012BasH    0x0020
 767 */
 768#define HC_HTXnL0BasH_MASK      0x000000ff
 769#define HC_HTXnL1BasH_MASK      0x0000ff00
 770#define HC_HTXnL2BasH_MASK      0x00ff0000
 771#define HC_HTXnL1BasH_SHIFT     8
 772#define HC_HTXnL2BasH_SHIFT     16
 773/* HC_SubA_HTXnL345BasH    0x0021
 774 */
 775#define HC_HTXnL3BasH_MASK      0x000000ff
 776#define HC_HTXnL4BasH_MASK      0x0000ff00
 777#define HC_HTXnL5BasH_MASK      0x00ff0000
 778#define HC_HTXnL4BasH_SHIFT     8
 779#define HC_HTXnL5BasH_SHIFT     16
 780/* HC_SubA_HTXnL678BasH    0x0022
 781 */
 782#define HC_HTXnL6BasH_MASK      0x000000ff
 783#define HC_HTXnL7BasH_MASK      0x0000ff00
 784#define HC_HTXnL8BasH_MASK      0x00ff0000
 785#define HC_HTXnL7BasH_SHIFT     8
 786#define HC_HTXnL8BasH_SHIFT     16
 787/* HC_SubA_HTXnL9abBasH    0x0023
 788 */
 789#define HC_HTXnL9BasH_MASK      0x000000ff
 790#define HC_HTXnLaBasH_MASK      0x0000ff00
 791#define HC_HTXnLbBasH_MASK      0x00ff0000
 792#define HC_HTXnLaBasH_SHIFT     8
 793#define HC_HTXnLbBasH_SHIFT     16
 794/* HC_SubA_HTXnLcdeBasH    0x0024
 795 */
 796#define HC_HTXnLcBasH_MASK      0x000000ff
 797#define HC_HTXnLdBasH_MASK      0x0000ff00
 798#define HC_HTXnLeBasH_MASK      0x00ff0000
 799#define HC_HTXnLdBasH_SHIFT     8
 800#define HC_HTXnLeBasH_SHIFT     16
 801/* HC_SubA_HTXnLcdeBasH    0x0025
 802 */
 803#define HC_HTXnLfBasH_MASK      0x000000ff
 804#define HC_HTXnL10BasH_MASK      0x0000ff00
 805#define HC_HTXnL11BasH_MASK      0x00ff0000
 806#define HC_HTXnL10BasH_SHIFT     8
 807#define HC_HTXnL11BasH_SHIFT     16
 808/* HC_SubA_HTXnL0Pit       0x002b
 809 */
 810#define HC_HTXnLnPit_MASK       0x00003fff
 811#define HC_HTXnEnPit_MASK       0x00080000
 812#define HC_HTXnLnPitE_MASK      0x00f00000
 813#define HC_HTXnLnPitE_SHIFT     20
 814/* HC_SubA_HTXnL0_5WE      0x004b
 815 */
 816#define HC_HTXnL0WE_MASK        0x0000000f
 817#define HC_HTXnL1WE_MASK        0x000000f0
 818#define HC_HTXnL2WE_MASK        0x00000f00
 819#define HC_HTXnL3WE_MASK        0x0000f000
 820#define HC_HTXnL4WE_MASK        0x000f0000
 821#define HC_HTXnL5WE_MASK        0x00f00000
 822#define HC_HTXnL1WE_SHIFT       4
 823#define HC_HTXnL2WE_SHIFT       8
 824#define HC_HTXnL3WE_SHIFT       12
 825#define HC_HTXnL4WE_SHIFT       16
 826#define HC_HTXnL5WE_SHIFT       20
 827/* HC_SubA_HTXnL6_bWE      0x004c
 828 */
 829#define HC_HTXnL6WE_MASK        0x0000000f
 830#define HC_HTXnL7WE_MASK        0x000000f0
 831#define HC_HTXnL8WE_MASK        0x00000f00
 832#define HC_HTXnL9WE_MASK        0x0000f000
 833#define HC_HTXnLaWE_MASK        0x000f0000
 834#define HC_HTXnLbWE_MASK        0x00f00000
 835#define HC_HTXnL7WE_SHIFT       4
 836#define HC_HTXnL8WE_SHIFT       8
 837#define HC_HTXnL9WE_SHIFT       12
 838#define HC_HTXnLaWE_SHIFT       16
 839#define HC_HTXnLbWE_SHIFT       20
 840/* HC_SubA_HTXnLc_11WE      0x004d
 841 */
 842#define HC_HTXnLcWE_MASK        0x0000000f
 843#define HC_HTXnLdWE_MASK        0x000000f0
 844#define HC_HTXnLeWE_MASK        0x00000f00
 845#define HC_HTXnLfWE_MASK        0x0000f000
 846#define HC_HTXnL10WE_MASK       0x000f0000
 847#define HC_HTXnL11WE_MASK       0x00f00000
 848#define HC_HTXnLdWE_SHIFT       4
 849#define HC_HTXnLeWE_SHIFT       8
 850#define HC_HTXnLfWE_SHIFT       12
 851#define HC_HTXnL10WE_SHIFT      16
 852#define HC_HTXnL11WE_SHIFT      20
 853/* HC_SubA_HTXnL0_5HE      0x0051
 854 */
 855#define HC_HTXnL0HE_MASK        0x0000000f
 856#define HC_HTXnL1HE_MASK        0x000000f0
 857#define HC_HTXnL2HE_MASK        0x00000f00
 858#define HC_HTXnL3HE_MASK        0x0000f000
 859#define HC_HTXnL4HE_MASK        0x000f0000
 860#define HC_HTXnL5HE_MASK        0x00f00000
 861#define HC_HTXnL1HE_SHIFT       4
 862#define HC_HTXnL2HE_SHIFT       8
 863#define HC_HTXnL3HE_SHIFT       12
 864#define HC_HTXnL4HE_SHIFT       16
 865#define HC_HTXnL5HE_SHIFT       20
 866/* HC_SubA_HTXnL6_bHE      0x0052
 867 */
 868#define HC_HTXnL6HE_MASK        0x0000000f
 869#define HC_HTXnL7HE_MASK        0x000000f0
 870#define HC_HTXnL8HE_MASK        0x00000f00
 871#define HC_HTXnL9HE_MASK        0x0000f000
 872#define HC_HTXnLaHE_MASK        0x000f0000
 873#define HC_HTXnLbHE_MASK        0x00f00000
 874#define HC_HTXnL7HE_SHIFT       4
 875#define HC_HTXnL8HE_SHIFT       8
 876#define HC_HTXnL9HE_SHIFT       12
 877#define HC_HTXnLaHE_SHIFT       16
 878#define HC_HTXnLbHE_SHIFT       20
 879/* HC_SubA_HTXnLc_11HE      0x0053
 880 */
 881#define HC_HTXnLcHE_MASK        0x0000000f
 882#define HC_HTXnLdHE_MASK        0x000000f0
 883#define HC_HTXnLeHE_MASK        0x00000f00
 884#define HC_HTXnLfHE_MASK        0x0000f000
 885#define HC_HTXnL10HE_MASK       0x000f0000
 886#define HC_HTXnL11HE_MASK       0x00f00000
 887#define HC_HTXnLdHE_SHIFT       4
 888#define HC_HTXnLeHE_SHIFT       8
 889#define HC_HTXnLfHE_SHIFT       12
 890#define HC_HTXnL10HE_SHIFT      16
 891#define HC_HTXnL11HE_SHIFT      20
 892/* HC_SubA_HTXnL0OS        0x0077
 893 */
 894#define HC_HTXnL0OS_MASK        0x003ff000
 895#define HC_HTXnLVmax_MASK       0x00000fc0
 896#define HC_HTXnLVmin_MASK       0x0000003f
 897#define HC_HTXnL0OS_SHIFT       12
 898#define HC_HTXnLVmax_SHIFT      6
 899/* HC_SubA_HTXnTB          0x0078
 900 */
 901#define HC_HTXnTB_MASK          0x00f00000
 902#define HC_HTXnFLSe_MASK        0x0000e000
 903#define HC_HTXnFLSs_MASK        0x00001c00
 904#define HC_HTXnFLTe_MASK        0x00000380
 905#define HC_HTXnFLTs_MASK        0x00000070
 906#define HC_HTXnFLDs_MASK        0x0000000f
 907#define HC_HTXnTB_NoTB          0x00000000
 908#define HC_HTXnTB_TBC_S         0x00100000
 909#define HC_HTXnTB_TBC_T         0x00200000
 910#define HC_HTXnTB_TB_S          0x00400000
 911#define HC_HTXnTB_TB_T          0x00800000
 912#define HC_HTXnFLSe_Nearest     0x00000000
 913#define HC_HTXnFLSe_Linear      0x00002000
 914#define HC_HTXnFLSe_NonLinear   0x00004000
 915#define HC_HTXnFLSe_Sharp       0x00008000
 916#define HC_HTXnFLSe_Flat_Gaussian_Cubic 0x0000c000
 917#define HC_HTXnFLSs_Nearest     0x00000000
 918#define HC_HTXnFLSs_Linear      0x00000400
 919#define HC_HTXnFLSs_NonLinear   0x00000800
 920#define HC_HTXnFLSs_Flat_Gaussian_Cubic 0x00001800
 921#define HC_HTXnFLTe_Nearest     0x00000000
 922#define HC_HTXnFLTe_Linear      0x00000080
 923#define HC_HTXnFLTe_NonLinear   0x00000100
 924#define HC_HTXnFLTe_Sharp       0x00000180
 925#define HC_HTXnFLTe_Flat_Gaussian_Cubic 0x00000300
 926#define HC_HTXnFLTs_Nearest     0x00000000
 927#define HC_HTXnFLTs_Linear      0x00000010
 928#define HC_HTXnFLTs_NonLinear   0x00000020
 929#define HC_HTXnFLTs_Flat_Gaussian_Cubic 0x00000060
 930#define HC_HTXnFLDs_Tex0        0x00000000
 931#define HC_HTXnFLDs_Nearest     0x00000001
 932#define HC_HTXnFLDs_Linear      0x00000002
 933#define HC_HTXnFLDs_NonLinear   0x00000003
 934#define HC_HTXnFLDs_Dither      0x00000004
 935#define HC_HTXnFLDs_ConstLOD    0x00000005
 936#define HC_HTXnFLDs_Ani         0x00000006
 937#define HC_HTXnFLDs_AniDither   0x00000007
 938/* HC_SubA_HTXnMPMD        0x0079
 939 */
 940#define HC_HTXnMPMD_SMASK       0x00070000
 941#define HC_HTXnMPMD_TMASK       0x00380000
 942#define HC_HTXnLODDTf_MASK      0x00000007
 943#define HC_HTXnXY2ST_MASK       0x00000008
 944#define HC_HTXnMPMD_Tsingle     0x00000000
 945#define HC_HTXnMPMD_Tclamp      0x00080000
 946#define HC_HTXnMPMD_Trepeat     0x00100000
 947#define HC_HTXnMPMD_Tmirror     0x00180000
 948#define HC_HTXnMPMD_Twrap       0x00200000
 949#define HC_HTXnMPMD_Ssingle     0x00000000
 950#define HC_HTXnMPMD_Sclamp      0x00010000
 951#define HC_HTXnMPMD_Srepeat     0x00020000
 952#define HC_HTXnMPMD_Smirror     0x00030000
 953#define HC_HTXnMPMD_Swrap       0x00040000
 954/* HC_SubA_HTXnCLODu       0x007a
 955 */
 956#define HC_HTXnCLODu_MASK       0x000ffc00
 957#define HC_HTXnCLODd_MASK       0x000003ff
 958#define HC_HTXnCLODu_SHIFT      10
 959/* HC_SubA_HTXnFM          0x007b
 960 */
 961#define HC_HTXnFM_MASK          0x00ff0000
 962#define HC_HTXnLoc_MASK         0x00000003
 963#define HC_HTXnFM_INDEX         0x00000000
 964#define HC_HTXnFM_Intensity     0x00080000
 965#define HC_HTXnFM_Lum           0x00100000
 966#define HC_HTXnFM_Alpha         0x00180000
 967#define HC_HTXnFM_DX            0x00280000
 968#define HC_HTXnFM_ARGB16        0x00880000
 969#define HC_HTXnFM_ARGB32        0x00980000
 970#define HC_HTXnFM_ABGR16        0x00a80000
 971#define HC_HTXnFM_ABGR32        0x00b80000
 972#define HC_HTXnFM_RGBA16        0x00c80000
 973#define HC_HTXnFM_RGBA32        0x00d80000
 974#define HC_HTXnFM_BGRA16        0x00e80000
 975#define HC_HTXnFM_BGRA32        0x00f80000
 976#define HC_HTXnFM_BUMPMAP       0x00380000
 977#define HC_HTXnFM_Index1        (HC_HTXnFM_INDEX     | 0x00000000)
 978#define HC_HTXnFM_Index2        (HC_HTXnFM_INDEX     | 0x00010000)
 979#define HC_HTXnFM_Index4        (HC_HTXnFM_INDEX     | 0x00020000)
 980#define HC_HTXnFM_Index8        (HC_HTXnFM_INDEX     | 0x00030000)
 981#define HC_HTXnFM_T1            (HC_HTXnFM_Intensity | 0x00000000)
 982#define HC_HTXnFM_T2            (HC_HTXnFM_Intensity | 0x00010000)
 983#define HC_HTXnFM_T4            (HC_HTXnFM_Intensity | 0x00020000)
 984#define HC_HTXnFM_T8            (HC_HTXnFM_Intensity | 0x00030000)
 985#define HC_HTXnFM_L1            (HC_HTXnFM_Lum       | 0x00000000)
 986#define HC_HTXnFM_L2            (HC_HTXnFM_Lum       | 0x00010000)
 987#define HC_HTXnFM_L4            (HC_HTXnFM_Lum       | 0x00020000)
 988#define HC_HTXnFM_L8            (HC_HTXnFM_Lum       | 0x00030000)
 989#define HC_HTXnFM_AL44          (HC_HTXnFM_Lum       | 0x00040000)
 990#define HC_HTXnFM_AL88          (HC_HTXnFM_Lum       | 0x00050000)
 991#define HC_HTXnFM_A1            (HC_HTXnFM_Alpha     | 0x00000000)
 992#define HC_HTXnFM_A2            (HC_HTXnFM_Alpha     | 0x00010000)
 993#define HC_HTXnFM_A4            (HC_HTXnFM_Alpha     | 0x00020000)
 994#define HC_HTXnFM_A8            (HC_HTXnFM_Alpha     | 0x00030000)
 995#define HC_HTXnFM_DX1           (HC_HTXnFM_DX        | 0x00010000)
 996#define HC_HTXnFM_DX23          (HC_HTXnFM_DX        | 0x00020000)
 997#define HC_HTXnFM_DX45          (HC_HTXnFM_DX        | 0x00030000)
 998#define HC_HTXnFM_RGB555        (HC_HTXnFM_ARGB16    | 0x00000000)
 999#define HC_HTXnFM_RGB565        (HC_HTXnFM_ARGB16    | 0x00010000)
1000#define HC_HTXnFM_ARGB1555      (HC_HTXnFM_ARGB16    | 0x00020000)
1001#define HC_HTXnFM_ARGB4444      (HC_HTXnFM_ARGB16    | 0x00030000)
1002#define HC_HTXnFM_ARGB0888      (HC_HTXnFM_ARGB32    | 0x00000000)
1003#define HC_HTXnFM_ARGB8888      (HC_HTXnFM_ARGB32    | 0x00010000)
1004#define HC_HTXnFM_BGR555        (HC_HTXnFM_ABGR16    | 0x00000000)
1005#define HC_HTXnFM_BGR565        (HC_HTXnFM_ABGR16    | 0x00010000)
1006#define HC_HTXnFM_ABGR1555      (HC_HTXnFM_ABGR16    | 0x00020000)
1007#define HC_HTXnFM_ABGR4444      (HC_HTXnFM_ABGR16    | 0x00030000)
1008#define HC_HTXnFM_ABGR0888      (HC_HTXnFM_ABGR32    | 0x00000000)
1009#define HC_HTXnFM_ABGR8888      (HC_HTXnFM_ABGR32    | 0x00010000)
1010#define HC_HTXnFM_RGBA5550      (HC_HTXnFM_RGBA16    | 0x00000000)
1011#define HC_HTXnFM_RGBA5551      (HC_HTXnFM_RGBA16    | 0x00020000)
1012#define HC_HTXnFM_RGBA4444      (HC_HTXnFM_RGBA16    | 0x00030000)
1013#define HC_HTXnFM_RGBA8880      (HC_HTXnFM_RGBA32    | 0x00000000)
1014#define HC_HTXnFM_RGBA8888      (HC_HTXnFM_RGBA32    | 0x00010000)
1015#define HC_HTXnFM_BGRA5550      (HC_HTXnFM_BGRA16    | 0x00000000)
1016#define HC_HTXnFM_BGRA5551      (HC_HTXnFM_BGRA16    | 0x00020000)
1017#define HC_HTXnFM_BGRA4444      (HC_HTXnFM_BGRA16    | 0x00030000)
1018#define HC_HTXnFM_BGRA8880      (HC_HTXnFM_BGRA32    | 0x00000000)
1019#define HC_HTXnFM_BGRA8888      (HC_HTXnFM_BGRA32    | 0x00010000)
1020#define HC_HTXnFM_VU88          (HC_HTXnFM_BUMPMAP   | 0x00000000)
1021#define HC_HTXnFM_LVU655        (HC_HTXnFM_BUMPMAP   | 0x00010000)
1022#define HC_HTXnFM_LVU888        (HC_HTXnFM_BUMPMAP   | 0x00020000)
1023#define HC_HTXnLoc_Local        0x00000000
1024#define HC_HTXnLoc_Sys          0x00000002
1025#define HC_HTXnLoc_AGP          0x00000003
1026/* HC_SubA_HTXnTRAH        0x007f
1027 */
1028#define HC_HTXnTRAH_MASK        0x00ff0000
1029#define HC_HTXnTRAL_MASK        0x0000ff00
1030#define HC_HTXnTBA_MASK         0x000000ff
1031#define HC_HTXnTRAH_SHIFT       16
1032#define HC_HTXnTRAL_SHIFT       8
1033/* HC_SubA_HTXnTBLCsat     0x0080
1034 *-- Define the input texture.
1035 */
1036#define HC_XTC_TOPC             0x00000000
1037#define HC_XTC_InvTOPC          0x00000010
1038#define HC_XTC_TOPCp5           0x00000020
1039#define HC_XTC_Cbias            0x00000000
1040#define HC_XTC_InvCbias         0x00000010
1041#define HC_XTC_0                0x00000000
1042#define HC_XTC_Dif              0x00000001
1043#define HC_XTC_Spec             0x00000002
1044#define HC_XTC_Tex              0x00000003
1045#define HC_XTC_Cur              0x00000004
1046#define HC_XTC_Adif             0x00000005
1047#define HC_XTC_Fog              0x00000006
1048#define HC_XTC_Atex             0x00000007
1049#define HC_XTC_Acur             0x00000008
1050#define HC_XTC_HTXnTBLRC        0x00000009
1051#define HC_XTC_Ctexnext         0x0000000a
1052/*--
1053 */
1054#define HC_HTXnTBLCsat_MASK     0x00800000
1055#define HC_HTXnTBLCa_MASK       0x000fc000
1056#define HC_HTXnTBLCb_MASK       0x00001f80
1057#define HC_HTXnTBLCc_MASK       0x0000003f
1058#define HC_HTXnTBLCa_TOPC       (HC_XTC_TOPC << 14)
1059#define HC_HTXnTBLCa_InvTOPC    (HC_XTC_InvTOPC << 14)
1060#define HC_HTXnTBLCa_TOPCp5     (HC_XTC_TOPCp5 << 14)
1061#define HC_HTXnTBLCa_0          (HC_XTC_0 << 14)
1062#define HC_HTXnTBLCa_Dif        (HC_XTC_Dif << 14)
1063#define HC_HTXnTBLCa_Spec       (HC_XTC_Spec << 14)
1064#define HC_HTXnTBLCa_Tex        (HC_XTC_Tex << 14)
1065#define HC_HTXnTBLCa_Cur        (HC_XTC_Cur << 14)
1066#define HC_HTXnTBLCa_Adif       (HC_XTC_Adif << 14)
1067#define HC_HTXnTBLCa_Fog        (HC_XTC_Fog << 14)
1068#define HC_HTXnTBLCa_Atex       (HC_XTC_Atex << 14)
1069#define HC_HTXnTBLCa_Acur       (HC_XTC_Acur << 14)
1070#define HC_HTXnTBLCa_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 14)
1071#define HC_HTXnTBLCa_Ctexnext   (HC_XTC_Ctexnext << 14)
1072#define HC_HTXnTBLCb_TOPC       (HC_XTC_TOPC << 7)
1073#define HC_HTXnTBLCb_InvTOPC    (HC_XTC_InvTOPC << 7)
1074#define HC_HTXnTBLCb_TOPCp5     (HC_XTC_TOPCp5 << 7)
1075#define HC_HTXnTBLCb_0          (HC_XTC_0 << 7)
1076#define HC_HTXnTBLCb_Dif        (HC_XTC_Dif << 7)
1077#define HC_HTXnTBLCb_Spec       (HC_XTC_Spec << 7)
1078#define HC_HTXnTBLCb_Tex        (HC_XTC_Tex << 7)
1079#define HC_HTXnTBLCb_Cur        (HC_XTC_Cur << 7)
1080#define HC_HTXnTBLCb_Adif       (HC_XTC_Adif << 7)
1081#define HC_HTXnTBLCb_Fog        (HC_XTC_Fog << 7)
1082#define HC_HTXnTBLCb_Atex       (HC_XTC_Atex << 7)
1083#define HC_HTXnTBLCb_Acur       (HC_XTC_Acur << 7)
1084#define HC_HTXnTBLCb_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 7)
1085#define HC_HTXnTBLCb_Ctexnext   (HC_XTC_Ctexnext << 7)
1086#define HC_HTXnTBLCc_TOPC       (HC_XTC_TOPC << 0)
1087#define HC_HTXnTBLCc_InvTOPC    (HC_XTC_InvTOPC << 0)
1088#define HC_HTXnTBLCc_TOPCp5     (HC_XTC_TOPCp5 << 0)
1089#define HC_HTXnTBLCc_0          (HC_XTC_0 << 0)
1090#define HC_HTXnTBLCc_Dif        (HC_XTC_Dif << 0)
1091#define HC_HTXnTBLCc_Spec       (HC_XTC_Spec << 0)
1092#define HC_HTXnTBLCc_Tex        (HC_XTC_Tex << 0)
1093#define HC_HTXnTBLCc_Cur        (HC_XTC_Cur << 0)
1094#define HC_HTXnTBLCc_Adif       (HC_XTC_Adif << 0)
1095#define HC_HTXnTBLCc_Fog        (HC_XTC_Fog << 0)
1096#define HC_HTXnTBLCc_Atex       (HC_XTC_Atex << 0)
1097#define HC_HTXnTBLCc_Acur       (HC_XTC_Acur << 0)
1098#define HC_HTXnTBLCc_HTXnTBLRC  (HC_XTC_HTXnTBLRC << 0)
1099#define HC_HTXnTBLCc_Ctexnext   (HC_XTC_Ctexnext << 0)
1100/* HC_SubA_HTXnTBLCop      0x0081
1101 */
1102#define HC_HTXnTBLdot_MASK      0x00c00000
1103#define HC_HTXnTBLCop_MASK      0x00380000
1104#define HC_HTXnTBLCbias_MASK    0x0007c000
1105#define HC_HTXnTBLCshift_MASK   0x00001800
1106#define HC_HTXnTBLAop_MASK      0x00000380
1107#define HC_HTXnTBLAbias_MASK    0x00000078
1108#define HC_HTXnTBLAshift_MASK   0x00000003
1109#define HC_HTXnTBLCop_Add       0x00000000
1110#define HC_HTXnTBLCop_Sub       0x00080000
1111#define HC_HTXnTBLCop_Min       0x00100000
1112#define HC_HTXnTBLCop_Max       0x00180000
1113#define HC_HTXnTBLCop_Mask      0x00200000
1114#define HC_HTXnTBLCbias_Cbias           (HC_XTC_Cbias << 14)
1115#define HC_HTXnTBLCbias_InvCbias        (HC_XTC_InvCbias << 14)
1116#define HC_HTXnTBLCbias_0               (HC_XTC_0 << 14)
1117#define HC_HTXnTBLCbias_Dif             (HC_XTC_Dif << 14)
1118#define HC_HTXnTBLCbias_Spec            (HC_XTC_Spec << 14)
1119#define HC_HTXnTBLCbias_Tex             (HC_XTC_Tex << 14)
1120#define HC_HTXnTBLCbias_Cur             (HC_XTC_Cur << 14)
1121#define HC_HTXnTBLCbias_Adif            (HC_XTC_Adif << 14)
1122#define HC_HTXnTBLCbias_Fog             (HC_XTC_Fog << 14)
1123#define HC_HTXnTBLCbias_Atex            (HC_XTC_Atex << 14)
1124#define HC_HTXnTBLCbias_Acur            (HC_XTC_Acur << 14)
1125#define HC_HTXnTBLCbias_HTXnTBLRC       (HC_XTC_HTXnTBLRC << 14)
1126#define HC_HTXnTBLCshift_1      0x00000000
1127#define HC_HTXnTBLCshift_2      0x00000800
1128#define HC_HTXnTBLCshift_No     0x00001000
1129#define HC_HTXnTBLCshift_DotP   0x00001800
1130/*=* John Sheng [2003.7.18] texture combine *=*/
1131#define HC_HTXnTBLDOT3   0x00080000
1132#define HC_HTXnTBLDOT4   0x000C0000
1133
1134#define HC_HTXnTBLAop_Add       0x00000000
1135#define HC_HTXnTBLAop_Sub       0x00000080
1136#define HC_HTXnTBLAop_Min       0x00000100
1137#define HC_HTXnTBLAop_Max       0x00000180
1138#define HC_HTXnTBLAop_Mask      0x00000200
1139#define HC_HTXnTBLAbias_Inv             0x00000040
1140#define HC_HTXnTBLAbias_Adif            0x00000000
1141#define HC_HTXnTBLAbias_Fog             0x00000008
1142#define HC_HTXnTBLAbias_Acur            0x00000010
1143#define HC_HTXnTBLAbias_HTXnTBLRAbias   0x00000018
1144#define HC_HTXnTBLAbias_Atex            0x00000020
1145#define HC_HTXnTBLAshift_1      0x00000000
1146#define HC_HTXnTBLAshift_2      0x00000001
1147#define HC_HTXnTBLAshift_No     0x00000002
1148/* #define HC_HTXnTBLAshift_DotP   0x00000003 */
1149/* HC_SubA_HTXnTBLMPFog    0x0082
1150 */
1151#define HC_HTXnTBLMPfog_MASK    0x00e00000
1152#define HC_HTXnTBLMPfog_0       0x00000000
1153#define HC_HTXnTBLMPfog_Adif    0x00200000
1154#define HC_HTXnTBLMPfog_Fog     0x00400000
1155#define HC_HTXnTBLMPfog_Atex    0x00600000
1156#define HC_HTXnTBLMPfog_Acur    0x00800000
1157#define HC_HTXnTBLMPfog_GHTXnTBLRFog    0x00a00000
1158/* HC_SubA_HTXnTBLAsat     0x0083
1159 *-- Define the texture alpha input.
1160 */
1161#define HC_XTA_TOPA             0x00000000
1162#define HC_XTA_InvTOPA          0x00000008
1163#define HC_XTA_TOPAp5           0x00000010
1164#define HC_XTA_Adif             0x00000000
1165#define HC_XTA_Fog              0x00000001
1166#define HC_XTA_Acur             0x00000002
1167#define HC_XTA_HTXnTBLRA        0x00000003
1168#define HC_XTA_Atex             0x00000004
1169#define HC_XTA_Atexnext         0x00000005
1170/*--
1171 */
1172#define HC_HTXnTBLAsat_MASK     0x00800000
1173#define HC_HTXnTBLAMB_MASK      0x00700000
1174#define HC_HTXnTBLAa_MASK       0x0007c000
1175#define HC_HTXnTBLAb_MASK       0x00000f80
1176#define HC_HTXnTBLAc_MASK       0x0000001f
1177#define HC_HTXnTBLAMB_SHIFT     20
1178#define HC_HTXnTBLAa_TOPA       (HC_XTA_TOPA << 14)
1179#define HC_HTXnTBLAa_InvTOPA    (HC_XTA_InvTOPA << 14)
1180#define HC_HTXnTBLAa_TOPAp5     (HC_XTA_TOPAp5 << 14)
1181#define HC_HTXnTBLAa_Adif       (HC_XTA_Adif << 14)
1182#define HC_HTXnTBLAa_Fog        (HC_XTA_Fog << 14)
1183#define HC_HTXnTBLAa_Acur       (HC_XTA_Acur << 14)
1184#define HC_HTXnTBLAa_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 14)
1185#define HC_HTXnTBLAa_Atex       (HC_XTA_Atex << 14)
1186#define HC_HTXnTBLAa_Atexnext   (HC_XTA_Atexnext << 14)
1187#define HC_HTXnTBLAb_TOPA       (HC_XTA_TOPA << 7)
1188#define HC_HTXnTBLAb_InvTOPA    (HC_XTA_InvTOPA << 7)
1189#define HC_HTXnTBLAb_TOPAp5     (HC_XTA_TOPAp5 << 7)
1190#define HC_HTXnTBLAb_Adif       (HC_XTA_Adif << 7)
1191#define HC_HTXnTBLAb_Fog        (HC_XTA_Fog << 7)
1192#define HC_HTXnTBLAb_Acur       (HC_XTA_Acur << 7)
1193#define HC_HTXnTBLAb_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 7)
1194#define HC_HTXnTBLAb_Atex       (HC_XTA_Atex << 7)
1195#define HC_HTXnTBLAb_Atexnext   (HC_XTA_Atexnext << 7)
1196#define HC_HTXnTBLAc_TOPA       (HC_XTA_TOPA << 0)
1197#define HC_HTXnTBLAc_InvTOPA    (HC_XTA_InvTOPA << 0)
1198#define HC_HTXnTBLAc_TOPAp5     (HC_XTA_TOPAp5 << 0)
1199#define HC_HTXnTBLAc_Adif       (HC_XTA_Adif << 0)
1200#define HC_HTXnTBLAc_Fog        (HC_XTA_Fog << 0)
1201#define HC_HTXnTBLAc_Acur       (HC_XTA_Acur << 0)
1202#define HC_HTXnTBLAc_HTXnTBLRA  (HC_XTA_HTXnTBLRA << 0)
1203#define HC_HTXnTBLAc_Atex       (HC_XTA_Atex << 0)
1204#define HC_HTXnTBLAc_Atexnext   (HC_XTA_Atexnext << 0)
1205/* HC_SubA_HTXnTBLRAa      0x0089
1206 */
1207#define HC_HTXnTBLRAa_MASK      0x00ff0000
1208#define HC_HTXnTBLRAb_MASK      0x0000ff00
1209#define HC_HTXnTBLRAc_MASK      0x000000ff
1210#define HC_HTXnTBLRAa_SHIFT     16
1211#define HC_HTXnTBLRAb_SHIFT     8
1212#define HC_HTXnTBLRAc_SHIFT     0
1213/* HC_SubA_HTXnTBLRFog     0x008a
1214 */
1215#define HC_HTXnTBLRFog_MASK     0x0000ff00
1216#define HC_HTXnTBLRAbias_MASK   0x000000ff
1217#define HC_HTXnTBLRFog_SHIFT    8
1218#define HC_HTXnTBLRAbias_SHIFT  0
1219/* HC_SubA_HTXnLScale      0x0094
1220 */
1221#define HC_HTXnLScale_MASK      0x0007fc00
1222#define HC_HTXnLOff_MASK        0x000001ff
1223#define HC_HTXnLScale_SHIFT     10
1224/* HC_SubA_HTXSMD          0x0000
1225 */
1226#define HC_HTXSMD_MASK          0x00000080
1227#define HC_HTXTMD_MASK          0x00000040
1228#define HC_HTXNum_MASK          0x00000038
1229#define HC_HTXTRMD_MASK         0x00000006
1230#define HC_HTXCHCLR_MASK        0x00000001
1231#define HC_HTXNum_SHIFT         3
1232
1233/* Texture Palette n
1234 */
1235#define HC_SubType_TexPalette0  0x00000000
1236#define HC_SubType_TexPalette1  0x00000001
1237#define HC_SubType_FogTable     0x00000010
1238#define HC_SubType_Stipp…

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