/drivers/block/sunxi_nand/src/include/nand_physic.h

https://bitbucket.org/ndreys/linux-sunxi · C Header · 336 lines · 59 code · 70 blank · 207 comment · 0 complexity · 17bb3433e06710429d92646abf57859b MD5 · raw file

  1. /*
  2. * drivers/block/sunxi_nand/src/include/nand_physic.h
  3. *
  4. * (C) Copyright 2007-2012
  5. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #ifndef __NAND_PHYSIC_H__
  23. #define __NAND_PHYSIC_H__
  24. #include "nand_type.h"
  25. //===========================================
  26. extern struct __NandStorageInfo_t NandStorageInfo;
  27. extern struct __NandPageCachePool_t PageCachePool;
  28. //===========================================
  29. //==============================================================================
  30. // define the physical archictecture export parameter
  31. //==============================================================================
  32. //define the Ecc Mode
  33. #define ECC_MODE (NandStorageInfo.EccMode)
  34. //define the DDR tyep
  35. #define DDR_TYPE (NandStorageInfo.DDRType)
  36. //define the sector count of a single physical page
  37. #define SECTOR_CNT_OF_SINGLE_PAGE (NandStorageInfo.SectorCntPerPage)
  38. //define the sector count of a super physical page, the super page may be based on multi-plane
  39. #define SECTOR_CNT_OF_SUPER_PAGE (NandStorageInfo.SectorCntPerPage * NandStorageInfo.PlaneCntPerDie)
  40. //define the sector bitmap for a single page
  41. #define FULL_BITMAP_OF_SINGLE_PAGE ((__u32)((1<<SECTOR_CNT_OF_SINGLE_PAGE) - 1))
  42. //define the sector bitmap for a super page, the sector count of a super page may be equal to 32
  43. #define FULL_BITMAP_OF_SUPER_PAGE ((__u32)((1<<(SECTOR_CNT_OF_SUPER_PAGE - 1)) | ((1<<(SECTOR_CNT_OF_SUPER_PAGE - 1)) - 1)))
  44. //define the block number offset for the multi-plane operation
  45. #define MULTI_PLANE_BLOCK_OFFSET (NandStorageInfo.OptPhyOpPar.MultiPlaneBlockOffset)
  46. //define the position of the bad block flag in a physical block
  47. #define BAD_BLOCK_FLAG_PST (NandStorageInfo.OptPhyOpPar.BadBlockFlagPosition)
  48. //define if the nand flash can support cache read operation
  49. #define SUPPORT_CACHE_READ (NAND_CACHE_READ & NandStorageInfo.OperationOpt)
  50. //define if the nand flash can support cache program operation
  51. #define SUPPORT_CACHE_PROGRAM (NAND_CACHE_PROGRAM & NandStorageInfo.OperationOpt)
  52. //define if the nand flash can support multi-plane read operation
  53. #define SUPPORT_MULTI_READ (NAND_MULTI_READ & NandStorageInfo.OperationOpt)
  54. //define if the nand flash can support multi-plane program operation
  55. #define SUPPORT_MULTI_PROGRAM (NAND_MULTI_PROGRAM & NandStorageInfo.OperationOpt)
  56. //define if the nand flash can support page copy-back with command operation
  57. #define SUPPORT_PAGE_COPYBACK (NAND_PAGE_COPYBACK & NandStorageInfo.OperationOpt)
  58. //define if the nand flash can support __s32ernal __s32er-leave operation
  59. #define SUPPORT_INT_INTERLEAVE (NAND_INT_INTERLEAVE & NandStorageInfo.OperationOpt)
  60. //define if the nand flash system can support external __s32er-leave operation
  61. #define SUPPORT_EXT_INTERLEAVE (NAND_EXT_INTERLEAVE & NandStorageInfo.OperationOpt)
  62. //define if the nand flash system can support randomizer
  63. #define SUPPORT_RANDOM (NAND_RANDOM & NandStorageInfo.OperationOpt)
  64. //define if the nand flash system can support read retry
  65. #define SUPPORT_READ_RETRY (NAND_READ_RETRY & NandStorageInfo.OperationOpt)
  66. //define if the nand flash system can support read unique id
  67. #define SUPPORT_READ_UNIQUE_ID (NAND_READ_UNIQUE_ID & NandStorageInfo.OperationOpt)
  68. //define if the nand flash system can support bank align
  69. #define SUPPORT_ALIGN_NAND_BNK (!(NAND_PAGE_ADR_NO_SKIP & NandStorageInfo.OperationOpt))
  70. //define the count of the nand flash DIE in a nand flash chip
  71. #define DIE_CNT_OF_CHIP (NandStorageInfo.DieCntPerChip)
  72. //define the count of the nand flash bank in a nand flas hchip
  73. #define BNK_CNT_OF_CHIP (NandStorageInfo.BankCntPerChip)
  74. //define the Rb connect Mode
  75. #define RB_CONNECT_MODE (NandStorageInfo.RbConnectMode)
  76. //define the count of the total nand flash bank in the nand flash storage system
  77. #define TOTAL_BANK_CNT (NandStorageInfo.BankCntPerChip * NandStorageInfo.ChipCnt)
  78. //define the count of the physical block in a nand flash DIE
  79. #define BLOCK_CNT_OF_DIE (NandStorageInfo.BlkCntPerDie)
  80. //define the count of the nand flash plane in a nand flash DIE
  81. #define PLANE_CNT_OF_DIE (NandStorageInfo.PlaneCntPerDie)
  82. //define the count of the physical page in a physical block
  83. #define PAGE_CNT_OF_PHY_BLK (NandStorageInfo.PageCntPerPhyBlk)
  84. //define the information of the nand chip connect in the nand storage system
  85. #define CHIP_CONNECT_INFO (NandStorageInfo.ChipConnectInfo)
  86. //define the ReadRetryType of the nand chip connect in the nand storage system
  87. #define READ_RETRY_TYPE (NandStorageInfo.ReadRetryType)
  88. //define the ReadRetryType of the nand chip connect in the nand storage system
  89. #define READ_RETRY_MODE ((READ_RETRY_TYPE>>16)&0xff)
  90. //define the ReadRetryType of the nand chip connect in the nand storage system
  91. #define READ_RETRY_CYCLE ((READ_RETRY_TYPE>>8)&0xff)
  92. //define the ReadRetryType of the nand chip connect in the nand storage system
  93. #define READ_RETRY_REG_CNT ((READ_RETRY_TYPE>>0)&0xff)
  94. //define the nand flash access frequence parameter
  95. #define NAND_ACCESS_FREQUENCE (NandStorageInfo.FrequencePar)
  96. #define BAD_BLK_FLAG_PST (NandStorageInfo.OptPhyOpPar.BadBlockFlagPosition)
  97. //sync bank with chip mode, need wait whole chip true ready
  98. #define SYNC_CHIP_MODE 0x00
  99. //sync bank with bank mode, only check the status of the bank to wait bank ready
  100. #define SYNC_BANK_MODE 0x01
  101. //define the page cache for physical module processing page data
  102. #define PHY_TMP_PAGE_CACHE (PageCachePool.PageCache0)
  103. //define the spare data cache for physical module processing spare area data
  104. #define PHY_TMP_SPARE_CACHE (PageCachePool.SpareCache)
  105. //==============================================================================
  106. // define the functions __s32erface for the physic operation module
  107. //==============================================================================
  108. /*
  109. ************************************************************************************************************************
  110. * INIT NAND FLASH DRIVER PHYSICAL MODULE
  111. *
  112. * Description: init nand flash driver physical module.
  113. *
  114. * Aguments : none
  115. *
  116. * Returns : the resutl of initial.
  117. * = 0 initiate successful;
  118. * = -1 initiate failed.
  119. ************************************************************************************************************************
  120. */
  121. __s32 PHY_Init(void);
  122. __s32 PHY_ChangeMode(__u8 serial_mode);
  123. /*
  124. ************************************************************************************************************************
  125. * NAND FLASH DRIVER PHYSICAL MODULE EXIT
  126. *
  127. * Description: nand flash driver physical module exit.
  128. *
  129. * Aguments : none
  130. *
  131. * Returns : the resutl of exit.
  132. * = 0 exit successful;
  133. * = -1 exit failed.
  134. ************************************************************************************************************************
  135. */
  136. __s32 PHY_Exit(void);
  137. /*
  138. ************************************************************************************************************************
  139. * RESET ONE NAND FLASH CHIP
  140. *
  141. *Description: Reset the given nand chip;
  142. *
  143. *Arguments : nChip the chip select number, which need be reset.
  144. *
  145. *Return : the result of chip reset;
  146. * = 0 reset nand chip successful;
  147. * = -1 reset nand chip failed.
  148. ************************************************************************************************************************
  149. */
  150. __s32 PHY_ResetChip(__u32 nChip);
  151. /*
  152. ************************************************************************************************************************
  153. * READ NAND FLASH ID
  154. *
  155. *Description: Read nand flash ID from the given nand chip.
  156. *
  157. *Arguments : nChip the chip number whoes ID need be read;
  158. * pChipID the po__s32er to the chip ID buffer.
  159. *
  160. *Return : read nand chip ID result;
  161. * = 0 read chip ID successful, the chip ID has been stored in given buffer;
  162. * = -1 read chip ID failed.
  163. ************************************************************************************************************************
  164. */
  165. __s32 PHY_ReadNandId(__s32 nChip, void *pChipID);
  166. __s32 PHY_ReadNandUniqueId(__s32 bank, void *pChipID);
  167. /*
  168. ************************************************************************************************************************
  169. * CHECK WRITE PROTECT STATUS
  170. *
  171. *Description: check the status of write protect.
  172. *
  173. *Arguments : nChip the number of chip, which nand chip need be checked.
  174. *
  175. *Return : the result of status check;
  176. * = 0 the nand flash is not write proteced;
  177. * = 1 the nand flash is write proteced;
  178. * = -1 check status failed.
  179. ************************************************************************************************************************
  180. */
  181. __s32 PHY_CheckWp(__u32 nChip);
  182. /*
  183. ************************************************************************************************************************
  184. * PHYSICAL BLOCK ERASE
  185. *
  186. *Description: Erase one nand flash physical block.
  187. *
  188. *Arguments : pBlkAdr the parameter of the physical block which need be erased.
  189. *
  190. *Return : the result of the block erase;
  191. * = 0 erase physical block successful;
  192. * = -1 erase physical block failed.
  193. ************************************************************************************************************************
  194. */
  195. __s32 PHY_BlockErase(struct __PhysicOpPara_t *pBlkAdr);
  196. /*
  197. ************************************************************************************************************************
  198. * READ NAND FLASH PHYSICAL PAGE DATA
  199. *
  200. *Description: Read a page from a nand flash physical page to buffer.
  201. *
  202. *Arguments : pPageAdr the po__s32er to the accessed page parameter.
  203. *
  204. *Return : the result of physical page read;
  205. * = 0 read physical page successful;
  206. * > 0 read physical page successful, but need do some process;
  207. * < 0 read physical page failed.
  208. ************************************************************************************************************************
  209. */
  210. __s32 PHY_PageRead(struct __PhysicOpPara_t *pPageAdr);
  211. __s32 PHY_PageReadSpare(struct __PhysicOpPara_t *pPageAdr);
  212. /*
  213. ************************************************************************************************************************
  214. * WRITE NAND FLASH PHYSICAL PAGE DATA
  215. *
  216. *Description: Write a page from buffer to a nand flash physical page.
  217. *
  218. *Arguments : pPageAdr the po__s32er to the accessed page parameter.
  219. *
  220. *Return : The result of the page write;
  221. * = 0 page write successful;
  222. * > 0 page write successful, but need do some process;
  223. * < 0 page write failed.
  224. ************************************************************************************************************************
  225. */
  226. __s32 PHY_PageWrite(struct __PhysicOpPara_t *pPageAdr);
  227. /*
  228. ************************************************************************************************************************
  229. * PHYSIC PAGE COPY-BACK
  230. *
  231. *Description: copy one physical page from one physical block to another physical block.
  232. *
  233. *Arguments : pSrcPage the parameter of the source page which need be copied;
  234. * pDstPage the parameter of the destination page which copied to.
  235. *
  236. *Return : the result of the page copy-back;
  237. * = 0 page copy-back successful;
  238. * = -1 page copy-back failed.
  239. ************************************************************************************************************************
  240. */
  241. __s32 PHY_PageCopyback(struct __PhysicOpPara_t *pSrcPage, struct __PhysicOpPara_t *pDstPage);
  242. /*
  243. ************************************************************************************************************************
  244. * SYNCH NAND FLASH PHYSIC OPERATION
  245. *
  246. *Description: Synch nand flash operation, check nand flash program/erase operation status.
  247. *
  248. *Arguments : nBank the number of the bank which need be synchronized;
  249. * bMode the type of synch,
  250. * = 0 synch the chip which the bank belonged to, wait the whole chip
  251. * to be ready, and report status. if the chip support cacheprogram,
  252. * need check if the chip is true ready;
  253. * = 1 only synch the the bank, wait the bank ready and report the status,
  254. * if the chip support cache program, need not check if the cache is
  255. * true ready.
  256. *
  257. *Return : the result of synch;
  258. * = 0 synch nand flash successful, nand operation ok;
  259. * = -1 synch nand flash failed.
  260. ************************************************************************************************************************
  261. */
  262. __s32 PHY_SynchBank(__u32 nBank, __u32 bMode);
  263. __s32 PHY_GetDefaultParam(__u32 bank);
  264. __s32 PHY_SetDefaultParam(__u32 bank);
  265. __s32 PHY_ScanDDRParam(void);
  266. #endif //ifnedf __NAND_PHYSIC_H__