/drivers/block/sunxi_nand/nfc/nfc_w.c

https://bitbucket.org/ndreys/linux-sunxi · C · 955 lines · 532 code · 204 blank · 219 comment · 55 complexity · 4e2149b98d93fc77c4aa5aab05edf5ab MD5 · raw file

  1. /*
  2. * drivers/block/sunxi_nand/nfc/nfc_w.c
  3. *
  4. * (C) Copyright 2007-2012
  5. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. #include "nfc_i.h"
  23. extern __u32 pagesize;
  24. extern __s32 _wait_cmdfifo_free(void);
  25. extern __s32 _wait_cmd_finish(void);
  26. extern void _dma_config_start(__u8 rw, __u32 buff_addr, __u32 len);
  27. extern __s32 _wait_dma_end(void);
  28. extern __s32 _check_ecc(__u32 eblock_cnt);
  29. extern void _disable_ecc(void);
  30. extern void _enable_ecc(__u32 pipline);
  31. extern __s32 _enter_nand_critical(void);
  32. extern __s32 _exit_nand_critical(void);
  33. extern void _set_addr(__u8 *addr, __u8 cnt);
  34. extern __s32 nfc_set_cmd_register(NFC_CMD_LIST *cmd);
  35. extern __s32 _read_in_page_mode(NFC_CMD_LIST *rcmd,void *mainbuf,void *sparebuf,__u8 dma_wait_mode);
  36. extern __s32 _read_in_normal_mode(NFC_CMD_LIST *rcmd, __u8 *mainbuf, __u8 *sparebuf,__u8 dma_wait_mode);
  37. extern __u8 read_retry_reg_adr[READ_RETRY_MAX_REG_NUM];
  38. extern __u8 read_retry_default_val[8][READ_RETRY_MAX_REG_NUM];
  39. extern __s16 read_retry_val[READ_RETRY_MAX_CYCLE][READ_RETRY_MAX_REG_NUM];
  40. extern __u8 read_retry_mode;
  41. extern __u8 read_retry_cycle;
  42. extern __u8 read_retry_reg_num;
  43. extern __u8 lsb_mode_reg_adr[LSB_MODE_MAX_REG_NUM];
  44. extern __u8 lsb_mode_default_val[LSB_MODE_MAX_REG_NUM];
  45. extern __u8 lsb_mode_val[LSB_MODE_MAX_REG_NUM];
  46. extern __u8 lsb_mode_reg_num;
  47. extern __s32 _vender_get_param(__u8 *para, __u8 *addr, __u32 count);
  48. extern __s32 _vender_set_param(__u8 *para, __u8 *addr, __u32 count);
  49. extern __s32 _vender_pre_condition(void);
  50. /*after send write or erase command, must wait rb from ready to busy, then can send status command
  51. because nfc not do this, so software delay by xr, 2009-3-25*/
  52. void _wait_twb(void)
  53. {
  54. /*
  55. __u32 timeout = 800;
  56. while ( (timeout--) && !(NFC_READ_REG(NFC_REG_ST) & NFC_CMD_FIFO_STATUS));
  57. */
  58. }
  59. /*******************************************************************************
  60. * NFC_Write
  61. *
  62. * Description : write one page data into flash in single plane mode.
  63. * Arguments : *wcmd -- the write command sequence list head?&#x20AC;&#x201A;
  64. * *mainbuf -- point to data buffer address, it must be four bytes align.
  65. * *sparebuf -- point to spare buffer address.
  66. * dma_wait_mode -- how to deal when dma start, 0 = wait till dma finish,
  67. 1 = dma interrupt was set and now sleep till interrupt occurs.
  68. * rb_wait_mode -- 0 = do not care rb, 1 = set rb interrupt and do not wait rb ready.
  69. * page_mode -- 0 = common command, 1 = page command.
  70. * Returns : 0 = success.
  71. -1 = fail.
  72. * Notes : the unit must be page, so if page_mode is not 1, return fail,the function exits without checking status,
  73. if the commands do not fetch data,ecc is not neccesary.
  74. ********************************************************************************/
  75. __s32 NFC_Write( NFC_CMD_LIST *wcmd, void *mainbuf, void *sparebuf, __u8 dma_wait_mode, __u8 rb_wait_mode,
  76. __u8 page_mode)
  77. {
  78. __s32 ret;
  79. __s32 i;
  80. __u32 cfg;
  81. __u32 program_cmd,random_program_cmd;
  82. NFC_CMD_LIST *cur_cmd,*program_addr_cmd;
  83. if (page_mode == 0){
  84. return -1;
  85. }
  86. ret = 0;
  87. _enter_nand_critical();
  88. /*write in page_mode*/
  89. program_addr_cmd = wcmd;
  90. cur_cmd = wcmd;
  91. cur_cmd = cur_cmd->next;
  92. random_program_cmd = cur_cmd->value;
  93. cur_cmd = cur_cmd->next;
  94. program_cmd = cur_cmd->value;
  95. //access NFC internal RAM by DMA bus
  96. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | NFC_RAM_METHOD);
  97. /*set dma and run*/
  98. // if (NFC_IS_SDRAM((__u32)mainbuf))
  99. // attr = 0x2930281;
  100. // else
  101. // attr = 0x2930280;
  102. _dma_config_start(1, (__u32)mainbuf, pagesize);
  103. /*wait cmd fifo free*/
  104. ret = _wait_cmdfifo_free();
  105. if (ret){
  106. _exit_nand_critical();
  107. return ret;
  108. }
  109. /*set NFC_REG_CNT*/
  110. NFC_WRITE_REG(NFC_REG_CNT,1024);
  111. /*set NFC_REG_RCMD_SET*/
  112. cfg = 0;
  113. cfg |= (program_cmd & 0xff);
  114. cfg |= ((random_program_cmd & 0xff) << 8);
  115. NFC_WRITE_REG(NFC_REG_WCMD_SET, cfg);
  116. /*set NFC_REG_SECTOR_NUM*/
  117. NFC_WRITE_REG(NFC_REG_SECTOR_NUM, pagesize/1024);
  118. /*set user data*/
  119. for (i = 0; i < pagesize/1024; i++){
  120. NFC_WRITE_REG(NFC_REG_USER_DATA(i), *((__u32 *)sparebuf + i) );
  121. }
  122. /*set addr*/
  123. _set_addr(program_addr_cmd->addr,program_addr_cmd->addr_cycle);
  124. /*set NFC_REG_CMD*/
  125. cfg = 0;
  126. /*set sequence mode*/
  127. //cfg |= 0x1<<25;
  128. cfg |= program_addr_cmd->value;
  129. cfg |= ( (program_addr_cmd->addr_cycle - 1) << 16);
  130. //cfg |= (NFC_SEND_ADR | NFC_ACCESS_DIR | NFC_DATA_TRANS | NFC_SEND_CMD | NFC_WAIT_FLAG | NFC_DATA_SWAP_METHOD);
  131. cfg |= (NFC_SEND_ADR | NFC_ACCESS_DIR | NFC_DATA_TRANS | NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_DATA_SWAP_METHOD);
  132. cfg |= ((__u32)0x2 << 30);//page command
  133. if (pagesize/1024 == 1)
  134. cfg |= NFC_SEQ;
  135. /*enable ecc*/
  136. _enable_ecc(1);
  137. NFC_WRITE_REG(NFC_REG_CMD,cfg);
  138. NAND_WaitDmaFinish();
  139. _wait_twb();
  140. _wait_cmdfifo_free();
  141. _wait_cmd_finish();
  142. /*start dma?*/
  143. /*if dma mode is wait*/
  144. if(0 == dma_wait_mode){
  145. ret = _wait_dma_end();
  146. }
  147. /*disable ecc*/
  148. _disable_ecc();
  149. /*switch to ahb*/
  150. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) & (~NFC_RAM_METHOD));
  151. _exit_nand_critical();
  152. return ret;
  153. }
  154. __s32 NFC_Write_Seq( NFC_CMD_LIST *wcmd, void *mainbuf, void *sparebuf, __u8 dma_wait_mode, __u8 rb_wait_mode,
  155. __u8 page_mode)
  156. {
  157. __s32 ret;
  158. __s32 i;
  159. __u32 cfg;
  160. __u32 ecc_mode_temp;
  161. __u32 program_cmd,random_program_cmd;
  162. NFC_CMD_LIST *cur_cmd,*program_addr_cmd;
  163. if (page_mode == 0){
  164. return -1;
  165. }
  166. ret = 0;
  167. _enter_nand_critical();
  168. /*write in page_mode*/
  169. program_addr_cmd = wcmd;
  170. cur_cmd = wcmd;
  171. cur_cmd = cur_cmd->next;
  172. random_program_cmd = cur_cmd->value;
  173. cur_cmd = cur_cmd->next;
  174. program_cmd = cur_cmd->value;
  175. //access NFC internal RAM by DMA bus
  176. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | NFC_RAM_METHOD);
  177. // /*set dma and run*/
  178. // if (NFC_IS_SDRAM((__u32)mainbuf))
  179. // attr = 0x2930281;
  180. // else
  181. // attr = 0x2930280;
  182. _dma_config_start(1, (__u32)mainbuf, pagesize);
  183. /*wait cmd fifo free*/
  184. ret = _wait_cmdfifo_free();
  185. if (ret){
  186. _exit_nand_critical();
  187. return ret;
  188. }
  189. /*set NFC_REG_CNT*/
  190. NFC_WRITE_REG(NFC_REG_CNT,1024);
  191. /*set NFC_REG_RCMD_SET*/
  192. cfg = 0;
  193. cfg |= (program_cmd & 0xff);
  194. cfg |= ((random_program_cmd & 0xff) << 8);
  195. NFC_WRITE_REG(NFC_REG_WCMD_SET, cfg);
  196. /*set NFC_REG_SECTOR_NUM*/
  197. NFC_WRITE_REG(NFC_REG_SECTOR_NUM, pagesize/1024);
  198. /*set user data*/
  199. for (i = 0; i < pagesize/1024; i++){
  200. NFC_WRITE_REG(NFC_REG_USER_DATA(i), *((__u32 *)sparebuf + i) );
  201. }
  202. /*set addr*/
  203. _set_addr(program_addr_cmd->addr,program_addr_cmd->addr_cycle);
  204. /*set NFC_REG_CMD*/
  205. cfg = 0;
  206. /*set sequence mode*/
  207. cfg |= 0x1<<25;
  208. cfg |= program_addr_cmd->value;
  209. cfg |= ( (program_addr_cmd->addr_cycle - 1) << 16);
  210. //cfg |= (NFC_SEND_ADR | NFC_ACCESS_DIR | NFC_DATA_TRANS | NFC_SEND_CMD | NFC_WAIT_FLAG | NFC_DATA_SWAP_METHOD);
  211. cfg |= (NFC_SEND_ADR | NFC_ACCESS_DIR | NFC_DATA_TRANS | NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_DATA_SWAP_METHOD);
  212. cfg |= ((__u32)0x2 << 30);//page command
  213. if (pagesize/1024 == 1)
  214. cfg |= NFC_SEQ;
  215. /*enable ecc*/
  216. _enable_ecc(1);
  217. /*set ecc to 24-bit ecc*/
  218. ecc_mode_temp = NFC_READ_REG(NFC_REG_ECC_CTL) & 0xf000;
  219. NFC_WRITE_REG(NFC_REG_ECC_CTL, ((NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|(0x1<<12) ));
  220. NFC_WRITE_REG(NFC_REG_CMD,cfg);
  221. NAND_WaitDmaFinish();
  222. _wait_twb();
  223. _wait_cmdfifo_free();
  224. _wait_cmd_finish();
  225. /*start dma?*/
  226. /*if dma mode is wait*/
  227. if(0 == dma_wait_mode){
  228. ret = _wait_dma_end();
  229. }
  230. /*disable ecc*/
  231. _disable_ecc();
  232. /*set ecc to original value*/
  233. NFC_WRITE_REG(NFC_REG_ECC_CTL, (NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|ecc_mode_temp);
  234. /*switch to ahb*/
  235. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) & (~NFC_RAM_METHOD));
  236. _exit_nand_critical();
  237. return ret;
  238. }
  239. __s32 NFC_Write_1K( NFC_CMD_LIST *wcmd, void *mainbuf, void *sparebuf, __u8 dma_wait_mode, __u8 rb_wait_mode,
  240. __u8 page_mode)
  241. {
  242. __s32 ret;
  243. __s32 i;
  244. __u32 cfg;
  245. __u32 page_size_temp, ecc_mode_temp;
  246. __u32 program_cmd,random_program_cmd;
  247. NFC_CMD_LIST *cur_cmd,*program_addr_cmd;
  248. if (page_mode == 0){
  249. return -1;
  250. }
  251. ret = 0;
  252. _enter_nand_critical();
  253. /*write in page_mode*/
  254. program_addr_cmd = wcmd;
  255. cur_cmd = wcmd;
  256. cur_cmd = cur_cmd->next;
  257. random_program_cmd = cur_cmd->value;
  258. cur_cmd = cur_cmd->next;
  259. program_cmd = cur_cmd->value;
  260. //access NFC internal RAM by DMA bus
  261. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | NFC_RAM_METHOD);
  262. //set pagesize to 1K
  263. page_size_temp = (NFC_READ_REG(NFC_REG_CTL) & 0xf00)>>8;
  264. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | (0x3<<8));
  265. // /*set dma and run*/
  266. // if (NFC_IS_SDRAM((__u32)mainbuf))
  267. // attr = 0x2930281;
  268. // else
  269. // attr = 0x2930280;
  270. _dma_config_start(1, (__u32)mainbuf, 1024);
  271. /*wait cmd fifo free*/
  272. ret = _wait_cmdfifo_free();
  273. if (ret){
  274. _exit_nand_critical();
  275. return ret;
  276. }
  277. /*set NFC_REG_CNT*/
  278. NFC_WRITE_REG(NFC_REG_CNT,1024);
  279. /*set NFC_REG_RCMD_SET*/
  280. cfg = 0;
  281. cfg |= (program_cmd & 0xff);
  282. cfg |= ((random_program_cmd & 0xff) << 8);
  283. NFC_WRITE_REG(NFC_REG_WCMD_SET, cfg);
  284. /*set NFC_REG_SECTOR_NUM*/
  285. NFC_WRITE_REG(NFC_REG_SECTOR_NUM, 1024/1024);
  286. /*set user data*/
  287. for (i = 0; i < 1024/1024; i++){
  288. NFC_WRITE_REG(NFC_REG_USER_DATA(i), *((__u32 *)sparebuf + i) );
  289. }
  290. /*set addr*/
  291. _set_addr(program_addr_cmd->addr,program_addr_cmd->addr_cycle);
  292. /*set NFC_REG_CMD*/
  293. cfg = 0;
  294. /*set sequence mode*/
  295. cfg |= 0x1<<25;
  296. cfg |= program_addr_cmd->value;
  297. cfg |= ( (program_addr_cmd->addr_cycle - 1) << 16);
  298. //cfg |= (NFC_SEND_ADR | NFC_ACCESS_DIR | NFC_DATA_TRANS | NFC_SEND_CMD | NFC_WAIT_FLAG | NFC_DATA_SWAP_METHOD);
  299. cfg |= (NFC_SEND_ADR | NFC_ACCESS_DIR | NFC_DATA_TRANS | NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_DATA_SWAP_METHOD);
  300. cfg |= ((__u32)0x2 << 30);//page command
  301. if (pagesize/1024 == 1)
  302. cfg |= NFC_SEQ;
  303. /*enable ecc*/
  304. _enable_ecc(1);
  305. /*set ecc to 64-bit ecc*/
  306. ecc_mode_temp = NFC_READ_REG(NFC_REG_ECC_CTL) & 0xf000;
  307. NFC_WRITE_REG(NFC_REG_ECC_CTL, ((NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|(0x8<<12) ));
  308. NFC_WRITE_REG(NFC_REG_CMD,cfg);
  309. NAND_WaitDmaFinish();
  310. _wait_twb();
  311. _wait_cmdfifo_free();
  312. _wait_cmd_finish();
  313. /*start dma?*/
  314. /*if dma mode is wait*/
  315. if(0 == dma_wait_mode){
  316. ret = _wait_dma_end();
  317. }
  318. /*disable ecc*/
  319. _disable_ecc();
  320. /*set ecc to original value*/
  321. NFC_WRITE_REG(NFC_REG_ECC_CTL, (NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|ecc_mode_temp);
  322. /*set pagesize to original value*/
  323. NFC_WRITE_REG(NFC_REG_CTL, ((NFC_READ_REG(NFC_REG_CTL)) & (~NFC_PAGE_SIZE)) | (page_size_temp<<8));
  324. /*switch to ahb*/
  325. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) & (~NFC_RAM_METHOD));
  326. _exit_nand_critical();
  327. return ret;
  328. }
  329. /*******************************************************************************
  330. * NFC_Erase
  331. *
  332. * Description : erase one block in signle plane mode or multi plane mode.
  333. * Arguments : *ecmd -- the erase command sequence list head
  334. * rb_wait_mode -- 0 = do not care rb, 1 = set rb interrupt and do not wait rb ready.
  335. * Returns : 0 = success.
  336. -1 = fail.
  337. * Notes : the unit must be page, so if page_mode is not 1, return fail,the function exits without checking status,
  338. if the commands do not fetch data,ecc is not neccesary.
  339. ********************************************************************************/
  340. __s32 NFC_Erase(NFC_CMD_LIST *ecmd, __u8 rb_wait_mode)
  341. {
  342. __s32 ret;
  343. _enter_nand_critical();
  344. ret = nfc_set_cmd_register(ecmd);
  345. if (ret){
  346. _exit_nand_critical();
  347. return ret;
  348. }
  349. _wait_twb();
  350. ret = _wait_cmdfifo_free();
  351. ret |= _wait_cmd_finish();
  352. _exit_nand_critical();
  353. return ret;
  354. }
  355. /*******************************************************************************
  356. * NFC_CopyBackRead
  357. *
  358. * Description : copyback read one page data inside flash in single plane mode or multi plane mode
  359. * Arguments : *crcmd -- the copyback read command sequence list head.
  360. * Returns : 0 = success.
  361. -1 = fail.
  362. * Notes : the unit must be page.
  363. ********************************************************************************/
  364. __s32 NFC_CopyBackRead(NFC_CMD_LIST *crcmd)
  365. {
  366. __s32 ret;
  367. _enter_nand_critical();
  368. ret = nfc_set_cmd_register(crcmd);
  369. if (ret){
  370. _exit_nand_critical();
  371. return ret;
  372. }
  373. ret = _wait_cmdfifo_free();
  374. ret |= _wait_cmd_finish();
  375. _exit_nand_critical();
  376. return ret;
  377. }
  378. //#pragma arm section code="NFC_CopyBackWrite"
  379. /*******************************************************************************
  380. * NFC_CopyBackWrite
  381. *
  382. * Description : copyback write one page data inside flash in single plane mode or multi plane mode
  383. * Arguments : *cwcmd -- the copyback read command sequence list head.
  384. rb_wait_mode -- 0 = do not care rb, 1 = set rb interrupt and do not wait rb ready.
  385. * Returns : 0 = success.
  386. -1 = fail.
  387. * Notes : the unit must be page.
  388. ********************************************************************************/
  389. __s32 NFC_CopyBackWrite(NFC_CMD_LIST *cwcmd, __u8 rb_wait_mode)
  390. {
  391. __s32 ret;
  392. _enter_nand_critical();
  393. ret = nfc_set_cmd_register(cwcmd);
  394. if (ret){
  395. _exit_nand_critical();
  396. return ret;
  397. }
  398. _wait_twb();
  399. ret = _wait_cmdfifo_free();
  400. ret |= _wait_cmd_finish();
  401. _exit_nand_critical();
  402. return ret;
  403. }
  404. __s32 _read_in_page_mode_seq(NFC_CMD_LIST *rcmd,void *mainbuf,void *sparebuf,__u8 dma_wait_mode)
  405. {
  406. __s32 ret,ret1;
  407. __s32 i;
  408. __u32 cfg;
  409. NFC_CMD_LIST *cur_cmd,*read_addr_cmd;
  410. __u32 read_data_cmd,random_read_cmd0,random_read_cmd1;
  411. __u32 ecc_mode_temp;
  412. ret = 0;
  413. read_addr_cmd = rcmd;
  414. cur_cmd = rcmd;
  415. cur_cmd = cur_cmd->next;
  416. random_read_cmd0 = cur_cmd->value;
  417. cur_cmd = cur_cmd->next;
  418. random_read_cmd1 = cur_cmd->value;
  419. cur_cmd = cur_cmd->next;
  420. read_data_cmd = cur_cmd->value;
  421. //access NFC internal RAM by DMA bus
  422. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | NFC_RAM_METHOD);
  423. // /*set dma and run*/
  424. // /*sdram*/
  425. // if (NFC_IS_SDRAM((__u32)mainbuf))
  426. // attr = 0x2810293;
  427. // /*sram*/
  428. // else
  429. // attr = 0x2800293;
  430. _dma_config_start(0, (__u32)mainbuf, pagesize);
  431. /*wait cmd fifo free*/
  432. ret = _wait_cmdfifo_free();
  433. if (ret)
  434. return ret;
  435. /*set NFC_REG_CNT*/
  436. NFC_WRITE_REG(NFC_REG_CNT,1024);
  437. /*set NFC_REG_RCMD_SET*/
  438. cfg = 0;
  439. cfg |= (read_data_cmd & 0xff);
  440. cfg |= ((random_read_cmd0 & 0xff) << 8);
  441. cfg |= ((random_read_cmd1 & 0xff) << 16);
  442. NFC_WRITE_REG(NFC_REG_RCMD_SET, cfg);
  443. /*set NFC_REG_SECTOR_NUM*/
  444. NFC_WRITE_REG(NFC_REG_SECTOR_NUM, pagesize/1024);
  445. /*set addr*/
  446. _set_addr(read_addr_cmd->addr,read_addr_cmd->addr_cycle);
  447. /*set NFC_REG_CMD*/
  448. cfg = 0;
  449. cfg |= read_addr_cmd->value;
  450. /*set sequence mode*/
  451. cfg |= 0x1<<25;
  452. cfg |= ( (read_addr_cmd->addr_cycle - 1) << 16);
  453. cfg |= (NFC_SEND_ADR | NFC_DATA_TRANS | NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_WAIT_FLAG | NFC_DATA_SWAP_METHOD);
  454. cfg |= ((__u32)0x2 << 30);//page command
  455. if (pagesize/1024 == 1)
  456. cfg |= NFC_SEQ;
  457. /*enable ecc*/
  458. _enable_ecc(1);
  459. /*set ecc to 24-bit ecc*/
  460. ecc_mode_temp = NFC_READ_REG(NFC_REG_ECC_CTL) & 0xf000;
  461. NFC_WRITE_REG(NFC_REG_ECC_CTL, ((NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|(0x1<<12)));
  462. NFC_WRITE_REG(NFC_REG_CMD,cfg);
  463. NAND_WaitDmaFinish();
  464. /*wait cmd fifo free and cmd finish*/
  465. ret = _wait_cmdfifo_free();
  466. ret |= _wait_cmd_finish();
  467. if (ret){
  468. _disable_ecc();
  469. return ret;
  470. }
  471. /*get user data*/
  472. for (i = 0; i < pagesize/1024; i++){
  473. *(((__u32*) sparebuf)+i) = NFC_READ_REG(NFC_REG_USER_DATA(i));
  474. }
  475. /*ecc check and disable ecc*/
  476. ret = _check_ecc(pagesize/1024);
  477. _disable_ecc();
  478. /*set ecc to original value*/
  479. NFC_WRITE_REG(NFC_REG_ECC_CTL, (NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|ecc_mode_temp);
  480. /*if dma mode is wait*/
  481. if(0 == dma_wait_mode){
  482. ret1 = _wait_dma_end();
  483. if (ret1)
  484. return ret1;
  485. }
  486. return ret;
  487. }
  488. __s32 _read_in_page_mode_1K(NFC_CMD_LIST *rcmd,void *mainbuf,void *sparebuf,__u8 dma_wait_mode)
  489. {
  490. __s32 ret,ret1;
  491. __s32 i;
  492. __u32 cfg;
  493. NFC_CMD_LIST *cur_cmd,*read_addr_cmd;
  494. __u32 read_data_cmd,random_read_cmd0,random_read_cmd1;
  495. __u32 page_size_temp, ecc_mode_temp;
  496. ret = 0;
  497. read_addr_cmd = rcmd;
  498. cur_cmd = rcmd;
  499. cur_cmd = cur_cmd->next;
  500. random_read_cmd0 = cur_cmd->value;
  501. cur_cmd = cur_cmd->next;
  502. random_read_cmd1 = cur_cmd->value;
  503. cur_cmd = cur_cmd->next;
  504. read_data_cmd = cur_cmd->value;
  505. //access NFC internal RAM by DMA bus
  506. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | NFC_RAM_METHOD);
  507. //set pagesize to 1K
  508. page_size_temp = (NFC_READ_REG(NFC_REG_CTL) & 0xf00)>>8;
  509. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | (0x3<<8));
  510. ///*set dma and run*/
  511. ///*sdram*/
  512. //if (NFC_IS_SDRAM((__u32)mainbuf))
  513. // attr = 0x2810293;
  514. ///*sram*/
  515. //else
  516. // attr = 0x2800293;
  517. _dma_config_start(0, (__u32)mainbuf, 1024);
  518. /*wait cmd fifo free*/
  519. ret = _wait_cmdfifo_free();
  520. if (ret)
  521. return ret;
  522. /*set NFC_REG_CNT*/
  523. NFC_WRITE_REG(NFC_REG_CNT,1024);
  524. /*set NFC_REG_RCMD_SET*/
  525. cfg = 0;
  526. cfg |= (read_data_cmd & 0xff);
  527. cfg |= ((random_read_cmd0 & 0xff) << 8);
  528. cfg |= ((random_read_cmd1 & 0xff) << 16);
  529. NFC_WRITE_REG(NFC_REG_RCMD_SET, cfg);
  530. /*set NFC_REG_SECTOR_NUM*/
  531. NFC_WRITE_REG(NFC_REG_SECTOR_NUM, 1024/1024);
  532. /*set addr*/
  533. _set_addr(read_addr_cmd->addr,read_addr_cmd->addr_cycle);
  534. /*set NFC_REG_CMD*/
  535. cfg = 0;
  536. cfg |= read_addr_cmd->value;
  537. /*set sequence mode*/
  538. cfg |= 0x1<<25;
  539. cfg |= ( (read_addr_cmd->addr_cycle - 1) << 16);
  540. cfg |= (NFC_SEND_ADR | NFC_DATA_TRANS | NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_WAIT_FLAG | NFC_DATA_SWAP_METHOD);
  541. cfg |= ((__u32)0x2 << 30);//page command
  542. if (1024/1024 == 1)
  543. cfg |= NFC_SEQ;
  544. /*enable ecc*/
  545. _enable_ecc(1);
  546. /*set ecc to 64-bit ecc*/
  547. ecc_mode_temp = NFC_READ_REG(NFC_REG_ECC_CTL) & 0xf000;
  548. NFC_WRITE_REG(NFC_REG_ECC_CTL, ((NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|(0x8<<12) ));
  549. NFC_WRITE_REG(NFC_REG_CMD,cfg);
  550. NAND_WaitDmaFinish();
  551. /*wait cmd fifo free and cmd finish*/
  552. ret = _wait_cmdfifo_free();
  553. ret |= _wait_cmd_finish();
  554. if (ret){
  555. _disable_ecc();
  556. return ret;
  557. }
  558. /*get user data*/
  559. for (i = 0; i < 1024/1024; i++){
  560. *(((__u32*) sparebuf)+i) = NFC_READ_REG(NFC_REG_USER_DATA(i));
  561. }
  562. /*ecc check and disable ecc*/
  563. ret = _check_ecc(pagesize/1024);
  564. _disable_ecc();
  565. /*if dma mode is wait*/
  566. if(0 == dma_wait_mode){
  567. ret1 = _wait_dma_end();
  568. if (ret1)
  569. return ret1;
  570. }
  571. /*set ecc to original value*/
  572. NFC_WRITE_REG(NFC_REG_ECC_CTL, (NFC_READ_REG(NFC_REG_ECC_CTL) & (~NFC_ECC_MODE))|ecc_mode_temp);
  573. /*set pagesize to original value*/
  574. NFC_WRITE_REG(NFC_REG_CTL, ((NFC_READ_REG(NFC_REG_CTL)) & (~NFC_PAGE_SIZE)) | (page_size_temp<<8));
  575. return ret;
  576. }
  577. __s32 _read_in_page_mode_spare(NFC_CMD_LIST *rcmd,void *mainbuf,void *sparebuf,__u8 dma_wait_mode)
  578. {
  579. __s32 ret,ret1;
  580. __s32 i;
  581. __u32 cfg;
  582. NFC_CMD_LIST *cur_cmd,*read_addr_cmd;
  583. __u32 read_data_cmd,random_read_cmd0,random_read_cmd1;
  584. ret = 0;
  585. read_addr_cmd = rcmd;
  586. cur_cmd = rcmd;
  587. cur_cmd = cur_cmd->next;
  588. random_read_cmd0 = cur_cmd->value;
  589. cur_cmd = cur_cmd->next;
  590. random_read_cmd1 = cur_cmd->value;
  591. cur_cmd = cur_cmd->next;
  592. read_data_cmd = cur_cmd->value;
  593. //access NFC internal RAM by DMA bus
  594. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) | NFC_RAM_METHOD);
  595. ///*set dma and run*/
  596. ///*sdram*/
  597. //if (NFC_IS_SDRAM((__u32)mainbuf))
  598. // attr = 0x2810293;
  599. ///*sram*/
  600. //else
  601. // attr = 0x2800293;
  602. _dma_config_start(0, (__u32)mainbuf, 2048);
  603. /*wait cmd fifo free*/
  604. ret = _wait_cmdfifo_free();
  605. if (ret)
  606. return ret;
  607. /*set NFC_REG_CNT*/
  608. NFC_WRITE_REG(NFC_REG_CNT,1024);
  609. /*set NFC_REG_RCMD_SET*/
  610. cfg = 0;
  611. cfg |= (read_data_cmd & 0xff);
  612. cfg |= ((random_read_cmd0 & 0xff) << 8);
  613. cfg |= ((random_read_cmd1 & 0xff) << 16);
  614. NFC_WRITE_REG(NFC_REG_RCMD_SET, cfg);
  615. /*set NFC_REG_SECTOR_NUM*/
  616. NFC_WRITE_REG(NFC_REG_SECTOR_NUM, 2048/1024);
  617. /*set addr*/
  618. _set_addr(read_addr_cmd->addr,read_addr_cmd->addr_cycle);
  619. /*set NFC_REG_CMD*/
  620. cfg = 0;
  621. cfg |= read_addr_cmd->value;
  622. /*set sequence mode*/
  623. //cfg |= 0x1<<25;
  624. cfg |= ( (read_addr_cmd->addr_cycle - 1) << 16);
  625. cfg |= (NFC_SEND_ADR | NFC_DATA_TRANS | NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_WAIT_FLAG | NFC_DATA_SWAP_METHOD);
  626. cfg |= ((__u32)0x2 << 30);//page command
  627. if (pagesize/1024 == 1)
  628. cfg |= NFC_SEQ;
  629. /*enable ecc*/
  630. _enable_ecc(1);
  631. NFC_WRITE_REG(NFC_REG_CMD,cfg);
  632. NAND_WaitDmaFinish();//
  633. /*wait cmd fifo free and cmd finish*/
  634. ret = _wait_cmdfifo_free();
  635. ret |= _wait_cmd_finish();
  636. if (ret){
  637. _disable_ecc();
  638. return ret;
  639. }
  640. /*get user data*/
  641. for (i = 0; i < 2048/1024; i++){
  642. *(((__u32*) sparebuf)+i) = NFC_READ_REG(NFC_REG_USER_DATA(i));
  643. }
  644. /*ecc check and disable ecc*/
  645. ret = _check_ecc(2048/1024);
  646. _disable_ecc();
  647. /*if dma mode is wait*/
  648. if(0 == dma_wait_mode){
  649. ret1 = _wait_dma_end();
  650. if (ret1)
  651. return ret1;
  652. }
  653. return ret;
  654. }
  655. __s32 NFC_Read_Seq(NFC_CMD_LIST *rcmd, void *mainbuf, void *sparebuf, __u8 dma_wait_mode,__u8 page_mode )
  656. {
  657. __s32 ret ;
  658. _enter_nand_critical();
  659. ret = _read_in_page_mode_seq(rcmd, mainbuf,sparebuf, dma_wait_mode);
  660. /*switch to ahb*/
  661. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) & (~NFC_RAM_METHOD));
  662. _exit_nand_critical();
  663. return ret;
  664. }
  665. __s32 NFC_Read_1K(NFC_CMD_LIST *rcmd, void *mainbuf, void *sparebuf, __u8 dma_wait_mode,__u8 page_mode )
  666. {
  667. __s32 ret ;
  668. _enter_nand_critical();
  669. ret = _read_in_page_mode_1K(rcmd, mainbuf,sparebuf, dma_wait_mode);
  670. /*switch to ahb*/
  671. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) & (~NFC_RAM_METHOD));
  672. _exit_nand_critical();
  673. return ret;
  674. }
  675. __s32 NFC_Read_Spare(NFC_CMD_LIST *rcmd, void *mainbuf, void *sparebuf, __u8 dma_wait_mode,__u8 page_mode )
  676. {
  677. __s32 ret ;
  678. _enter_nand_critical();
  679. ret = _read_in_page_mode_spare(rcmd, mainbuf,sparebuf, dma_wait_mode);
  680. /*switch to ahb*/
  681. NFC_WRITE_REG(NFC_REG_CTL, (NFC_READ_REG(NFC_REG_CTL)) & (~NFC_RAM_METHOD));
  682. _exit_nand_critical();
  683. return ret;
  684. }
  685. __s32 NFC_LSBInit(__u32 read_retry_type)
  686. {
  687. //init
  688. read_retry_mode = (read_retry_type>>16)&0xff;
  689. read_retry_cycle =(read_retry_type>>8)&0xff;
  690. read_retry_reg_num = (read_retry_type>>0)&0xff;
  691. if(read_retry_mode == 1) //mode1
  692. {
  693. //set lsb mode
  694. lsb_mode_reg_num = 5;
  695. lsb_mode_reg_adr[0] = 0xa4;
  696. lsb_mode_reg_adr[1] = 0xa5;
  697. lsb_mode_reg_adr[2] = 0xb0;
  698. lsb_mode_reg_adr[3] = 0xb1;
  699. lsb_mode_reg_adr[4] = 0xc9;
  700. lsb_mode_val[0] = 0x25;
  701. lsb_mode_val[1] = 0x25;
  702. lsb_mode_val[2] = 0x25;
  703. lsb_mode_val[3] = 0x25;
  704. lsb_mode_val[4] = 0x1;
  705. }
  706. else
  707. {
  708. return -1;
  709. }
  710. return 0;
  711. }
  712. __s32 LSB_GetDefaultParam(__u32 chip,__u8* default_value, __u32 read_retry_type)
  713. {
  714. __s32 ret;
  715. __u32 i;
  716. ret =_vender_get_param(&lsb_mode_default_val[0], &lsb_mode_reg_adr[0], lsb_mode_reg_num);
  717. for(i=0; i<lsb_mode_reg_num; i++)
  718. {
  719. default_value[i] = lsb_mode_default_val[i];
  720. }
  721. return ret;
  722. }
  723. __s32 LSB_SetDefaultParam(__u32 chip,__u8* default_value, __u32 read_retry_type)
  724. {
  725. __s32 ret;
  726. ret =_vender_set_param(&lsb_mode_default_val[0], &lsb_mode_reg_adr[0], lsb_mode_reg_num);
  727. return ret;
  728. }
  729. __s32 NFC_LSBEnable(__u32 chip, __u32 read_retry_type)
  730. {
  731. __u8 value[LSB_MODE_MAX_REG_NUM];
  732. __u32 i;
  733. //fix chip 0
  734. LSB_GetDefaultParam(0,value,read_retry_type);
  735. for(i=0;i<lsb_mode_reg_num;i++)
  736. value[i] += lsb_mode_val[i];
  737. _vender_set_param(value, &lsb_mode_reg_adr[0], lsb_mode_reg_num);
  738. return 0;
  739. }
  740. __s32 NFC_LSBDisable(__u32 chip, __u32 read_retry_type)
  741. {
  742. __u8 value[LSB_MODE_MAX_REG_NUM];
  743. //fix chip 0
  744. LSB_SetDefaultParam(0,value, read_retry_type);
  745. return 0;
  746. }
  747. __s32 NFC_LSBExit(__u32 read_retry_type)
  748. {
  749. return 0;
  750. }