/arch/x86/include/asm/irq_remapping.h
C++ Header | 41 lines | 30 code | 4 blank | 7 comment | 1 complexity | bde8475e4bad7e55e6211afce5b272f1 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
1#ifndef _ASM_X86_IRQ_REMAPPING_H 2#define _ASM_X86_IRQ_REMAPPING_H 3 4#define IRTE_DEST(dest) ((x2apic_mode) ? dest : dest << 8) 5 6#ifdef CONFIG_INTR_REMAP 7static inline void prepare_irte(struct irte *irte, int vector, 8 unsigned int dest) 9{ 10 memset(irte, 0, sizeof(*irte)); 11 12 irte->present = 1; 13 irte->dst_mode = apic->irq_dest_mode; 14 /* 15 * Trigger mode in the IRTE will always be edge, and for IO-APIC, the 16 * actual level or edge trigger will be setup in the IO-APIC 17 * RTE. This will help simplify level triggered irq migration. 18 * For more details, see the comments (in io_apic.c) explainig IO-APIC 19 * irq migration in the presence of interrupt-remapping. 20 */ 21 irte->trigger_mode = 0; 22 irte->dlvry_mode = apic->irq_delivery_mode; 23 irte->vector = vector; 24 irte->dest_id = IRTE_DEST(dest); 25 irte->redir_hint = 1; 26} 27static inline bool irq_remapped(struct irq_cfg *cfg) 28{ 29 return cfg->irq_2_iommu.iommu != NULL; 30} 31#else 32static void prepare_irte(struct irte *irte, int vector, unsigned int dest) 33{ 34} 35static inline bool irq_remapped(struct irq_cfg *cfg) 36{ 37 return false; 38} 39#endif 40 41#endif /* _ASM_X86_IRQ_REMAPPING_H */