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/arch/sh/lib/udiv_qrnnd.S

https://bitbucket.org/ndreys/linux-sunxi
Assembly | 81 lines | 73 code | 8 blank | 0 comment | 3 complexity | 268f3c4930674dc04306c8be6b4f02ca MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
 1/* Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
 2   2004, 2005, 2006
 3   Free Software Foundation, Inc.
 4
 5This file is free software; you can redistribute it and/or modify it
 6under the terms of the GNU General Public License as published by the
 7Free Software Foundation; either version 2, or (at your option) any
 8later version.
 9
10In addition to the permissions in the GNU General Public License, the
11Free Software Foundation gives you unlimited permission to link the
12compiled version of this file into combinations with other programs,
13and to distribute those combinations without any restriction coming
14from the use of this file.  (The General Public License restrictions
15do apply in other respects; for example, they cover modification of
16the file, and distribution when not linked into a combine
17executable.)
18
19This file is distributed in the hope that it will be useful, but
20WITHOUT ANY WARRANTY; without even the implied warranty of
21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
22General Public License for more details.
23
24You should have received a copy of the GNU General Public License
25along with this program; see the file COPYING.  If not, write to
26the Free Software Foundation, 51 Franklin Street, Fifth Floor,
27Boston, MA 02110-1301, USA.  */
28
29!! libgcc routines for the Renesas / SuperH SH CPUs.
30!! Contributed by Steve Chamberlain.
31!! sac@cygnus.com
32
33!! ashiftrt_r4_x, ___ashrsi3, ___ashlsi3, ___lshrsi3 routines
34!! recoded in assembly by Toshiyasu Morita
35!! tm@netcom.com
36
37/* SH2 optimizations for ___ashrsi3, ___ashlsi3, ___lshrsi3 and
38   ELF local label prefixes by J"orn Rennecke
39   amylaar@cygnus.com  */
40
41	/* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */
42	/* n1 < d, but n1 might be larger than d1.  */
43	.global __udiv_qrnnd_16
44	.balign 8
45__udiv_qrnnd_16:
46	div0u
47	cmp/hi r6,r0
48	bt .Lots
49	.rept 16
50	div1 r6,r0 
51	.endr
52	extu.w r0,r1
53	bt 0f
54	add r6,r0
550:	rotcl r1
56	mulu.w r1,r5
57	xtrct r4,r0
58	swap.w r0,r0
59	sts macl,r2
60	cmp/hs r2,r0
61	sub r2,r0
62	bt 0f
63	addc r5,r0
64	add #-1,r1
65	bt 0f
661:	add #-1,r1
67	rts
68	add r5,r0
69	.balign 8
70.Lots:
71	sub r5,r0
72	swap.w r4,r1
73	xtrct r0,r1
74	clrt
75	mov r1,r0
76	addc r5,r0
77	mov #-1,r1
78	bf/s 1b
79	 shlr16 r1
800:	rts
81	 nop