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/arch/sh/include/asm/cache.h

https://bitbucket.org/ndreys/linux-sunxi
C++ Header | 47 lines | 23 code | 8 blank | 16 comment | 0 complexity | 88b196fab7882b12b3efc41641e6d985 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
 1/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $
 2 *
 3 * include/asm-sh/cache.h
 4 *
 5 * Copyright 1999 (C) Niibe Yutaka
 6 * Copyright 2002, 2003 (C) Paul Mundt
 7 */
 8#ifndef __ASM_SH_CACHE_H
 9#define __ASM_SH_CACHE_H
10#ifdef __KERNEL__
11
12#include <linux/init.h>
13#include <cpu/cache.h>
14
15#define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
16
17#define __read_mostly __attribute__((__section__(".data..read_mostly")))
18
19#ifndef __ASSEMBLY__
20struct cache_info {
21	unsigned int ways;		/* Number of cache ways */
22	unsigned int sets;		/* Number of cache sets */
23	unsigned int linesz;		/* Cache line size (bytes) */
24
25	unsigned int way_size;		/* sets * line size */
26
27	/*
28	 * way_incr is the address offset for accessing the next way
29	 * in memory mapped cache array ops.
30	 */
31	unsigned int way_incr;
32	unsigned int entry_shift;
33	unsigned int entry_mask;
34
35	/*
36	 * Compute a mask which selects the address bits which overlap between
37	 * 1. those used to select the cache set during indexing
38	 * 2. those in the physical page number.
39	 */
40	unsigned int alias_mask;
41	unsigned int n_aliases;		/* Number of aliases */
42
43	unsigned long flags;
44};
45#endif /* __ASSEMBLY__ */
46#endif /* __KERNEL__ */
47#endif /* __ASM_SH_CACHE_H */