/arch/s390/include/asm/processor.h

  1/*
  2 *  include/asm-s390/processor.h
  3 *
  4 *  S390 version
  5 *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6 *    Author(s): Hartmut Penner (hp@de.ibm.com),
  7 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
  8 *
  9 *  Derived from "include/asm-i386/processor.h"
 10 *    Copyright (C) 1994, Linus Torvalds
 11 */
 12
 13#ifndef __ASM_S390_PROCESSOR_H
 14#define __ASM_S390_PROCESSOR_H
 15
 16#include <linux/linkage.h>
 17#include <asm/cpu.h>
 18#include <asm/page.h>
 19#include <asm/ptrace.h>
 20#include <asm/setup.h>
 21
 22#ifdef __KERNEL__
 23/*
 24 * Default implementation of macro that returns current
 25 * instruction pointer ("program counter").
 26 */
 27#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
 28
 29static inline void get_cpu_id(struct cpuid *ptr)
 30{
 31	asm volatile("stidp %0" : "=Q" (*ptr));
 32}
 33
 34extern void s390_adjust_jiffies(void);
 35extern int get_cpu_capability(unsigned int *);
 36
 37/*
 38 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
 39 */
 40#ifndef __s390x__
 41
 42#define TASK_SIZE		(1UL << 31)
 43#define TASK_UNMAPPED_BASE	(1UL << 30)
 44
 45#else /* __s390x__ */
 46
 47#define TASK_SIZE_OF(tsk)	((tsk)->mm->context.asce_limit)
 48#define TASK_UNMAPPED_BASE	(test_thread_flag(TIF_31BIT) ? \
 49					(1UL << 30) : (1UL << 41))
 50#define TASK_SIZE		TASK_SIZE_OF(current)
 51
 52#endif /* __s390x__ */
 53
 54#ifdef __KERNEL__
 55
 56#ifndef __s390x__
 57#define STACK_TOP		(1UL << 31)
 58#define STACK_TOP_MAX		(1UL << 31)
 59#else /* __s390x__ */
 60#define STACK_TOP		(1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
 61#define STACK_TOP_MAX		(1UL << 42)
 62#endif /* __s390x__ */
 63
 64
 65#endif
 66
 67#define HAVE_ARCH_PICK_MMAP_LAYOUT
 68
 69typedef struct {
 70        __u32 ar4;
 71} mm_segment_t;
 72
 73/*
 74 * Thread structure
 75 */
 76struct thread_struct {
 77	s390_fp_regs fp_regs;
 78	unsigned int  acrs[NUM_ACRS];
 79        unsigned long ksp;              /* kernel stack pointer             */
 80	mm_segment_t mm_segment;
 81        unsigned long prot_addr;        /* address of protection-excep.     */
 82        unsigned int trap_no;
 83	struct per_regs per_user;	/* User specified PER registers */
 84	struct per_event per_event;	/* Cause of the last PER trap */
 85        /* pfault_wait is used to block the process on a pfault event */
 86	unsigned long pfault_wait;
 87	struct list_head list;
 88};
 89
 90typedef struct thread_struct thread_struct;
 91
 92/*
 93 * Stack layout of a C stack frame.
 94 */
 95#ifndef __PACK_STACK
 96struct stack_frame {
 97	unsigned long back_chain;
 98	unsigned long empty1[5];
 99	unsigned long gprs[10];
100	unsigned int  empty2[8];
101};
102#else
103struct stack_frame {
104	unsigned long empty1[5];
105	unsigned int  empty2[8];
106	unsigned long gprs[10];
107	unsigned long back_chain;
108};
109#endif
110
111#define ARCH_MIN_TASKALIGN	8
112
113#define INIT_THREAD {							\
114	.ksp = sizeof(init_stack) + (unsigned long) &init_stack,	\
115}
116
117/*
118 * Do necessary setup to start up a new thread.
119 */
120#define start_thread(regs, new_psw, new_stackp) do {		\
121	set_fs(USER_DS);					\
122	regs->psw.mask	= psw_user_bits;			\
123	regs->psw.addr	= new_psw | PSW_ADDR_AMODE;		\
124	regs->gprs[15]	= new_stackp;				\
125} while (0)
126
127#define start_thread31(regs, new_psw, new_stackp) do {		\
128	set_fs(USER_DS);					\
129	regs->psw.mask	= psw_user32_bits;			\
130	regs->psw.addr	= new_psw | PSW_ADDR_AMODE;		\
131	regs->gprs[15]	= new_stackp;				\
132	crst_table_downgrade(current->mm, 1UL << 31);		\
133} while (0)
134
135/* Forward declaration, a strange C thing */
136struct task_struct;
137struct mm_struct;
138struct seq_file;
139
140/* Free all resources held by a thread. */
141extern void release_thread(struct task_struct *);
142extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
143
144/* Prepare to copy thread state - unlazy all lazy status */
145#define prepare_to_copy(tsk)	do { } while (0)
146
147/*
148 * Return saved PC of a blocked thread.
149 */
150extern unsigned long thread_saved_pc(struct task_struct *t);
151
152extern void show_code(struct pt_regs *regs);
153
154unsigned long get_wchan(struct task_struct *p);
155#define task_pt_regs(tsk) ((struct pt_regs *) \
156        (task_stack_page(tsk) + THREAD_SIZE) - 1)
157#define KSTK_EIP(tsk)	(task_pt_regs(tsk)->psw.addr)
158#define KSTK_ESP(tsk)	(task_pt_regs(tsk)->gprs[15])
159
160/*
161 * Give up the time slice of the virtual PU.
162 */
163static inline void cpu_relax(void)
164{
165	if (MACHINE_HAS_DIAG44)
166		asm volatile("diag 0,0,68");
167	barrier();
168}
169
170static inline void psw_set_key(unsigned int key)
171{
172	asm volatile("spka 0(%0)" : : "d" (key));
173}
174
175/*
176 * Set PSW to specified value.
177 */
178static inline void __load_psw(psw_t psw)
179{
180#ifndef __s390x__
181	asm volatile("lpsw  %0" : : "Q" (psw) : "cc");
182#else
183	asm volatile("lpswe %0" : : "Q" (psw) : "cc");
184#endif
185}
186
187/*
188 * Set PSW mask to specified value, while leaving the
189 * PSW addr pointing to the next instruction.
190 */
191
192static inline void __load_psw_mask (unsigned long mask)
193{
194	unsigned long addr;
195	psw_t psw;
196
197	psw.mask = mask;
198
199#ifndef __s390x__
200	asm volatile(
201		"	basr	%0,0\n"
202		"0:	ahi	%0,1f-0b\n"
203		"	st	%0,%O1+4(%R1)\n"
204		"	lpsw	%1\n"
205		"1:"
206		: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
207#else /* __s390x__ */
208	asm volatile(
209		"	larl	%0,1f\n"
210		"	stg	%0,%O1+8(%R1)\n"
211		"	lpswe	%1\n"
212		"1:"
213		: "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
214#endif /* __s390x__ */
215}
216 
217/*
218 * Function to stop a processor until an interruption occurred
219 */
220static inline void enabled_wait(void)
221{
222	__load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT |
223			PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY);
224}
225
226/*
227 * Function to drop a processor into disabled wait state
228 */
229
230static inline void ATTRIB_NORET disabled_wait(unsigned long code)
231{
232        unsigned long ctl_buf;
233        psw_t dw_psw;
234
235        dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT;
236        dw_psw.addr = code;
237        /* 
238         * Store status and then load disabled wait psw,
239         * the processor is dead afterwards
240         */
241#ifndef __s390x__
242	asm volatile(
243		"	stctl	0,0,0(%2)\n"
244		"	ni	0(%2),0xef\n"	/* switch off protection */
245		"	lctl	0,0,0(%2)\n"
246		"	stpt	0xd8\n"		/* store timer */
247		"	stckc	0xe0\n"		/* store clock comparator */
248		"	stpx	0x108\n"	/* store prefix register */
249		"	stam	0,15,0x120\n"	/* store access registers */
250		"	std	0,0x160\n"	/* store f0 */
251		"	std	2,0x168\n"	/* store f2 */
252		"	std	4,0x170\n"	/* store f4 */
253		"	std	6,0x178\n"	/* store f6 */
254		"	stm	0,15,0x180\n"	/* store general registers */
255		"	stctl	0,15,0x1c0\n"	/* store control registers */
256		"	oi	0x1c0,0x10\n"	/* fake protection bit */
257		"	lpsw	0(%1)"
258		: "=m" (ctl_buf)
259		: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
260#else /* __s390x__ */
261	asm volatile(
262		"	stctg	0,0,0(%2)\n"
263		"	ni	4(%2),0xef\n"	/* switch off protection */
264		"	lctlg	0,0,0(%2)\n"
265		"	lghi	1,0x1000\n"
266		"	stpt	0x328(1)\n"	/* store timer */
267		"	stckc	0x330(1)\n"	/* store clock comparator */
268		"	stpx	0x318(1)\n"	/* store prefix register */
269		"	stam	0,15,0x340(1)\n"/* store access registers */
270		"	stfpc	0x31c(1)\n"	/* store fpu control */
271		"	std	0,0x200(1)\n"	/* store f0 */
272		"	std	1,0x208(1)\n"	/* store f1 */
273		"	std	2,0x210(1)\n"	/* store f2 */
274		"	std	3,0x218(1)\n"	/* store f3 */
275		"	std	4,0x220(1)\n"	/* store f4 */
276		"	std	5,0x228(1)\n"	/* store f5 */
277		"	std	6,0x230(1)\n"	/* store f6 */
278		"	std	7,0x238(1)\n"	/* store f7 */
279		"	std	8,0x240(1)\n"	/* store f8 */
280		"	std	9,0x248(1)\n"	/* store f9 */
281		"	std	10,0x250(1)\n"	/* store f10 */
282		"	std	11,0x258(1)\n"	/* store f11 */
283		"	std	12,0x260(1)\n"	/* store f12 */
284		"	std	13,0x268(1)\n"	/* store f13 */
285		"	std	14,0x270(1)\n"	/* store f14 */
286		"	std	15,0x278(1)\n"	/* store f15 */
287		"	stmg	0,15,0x280(1)\n"/* store general registers */
288		"	stctg	0,15,0x380(1)\n"/* store control registers */
289		"	oi	0x384(1),0x10\n"/* fake protection bit */
290		"	lpswe	0(%1)"
291		: "=m" (ctl_buf)
292		: "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
293#endif /* __s390x__ */
294	while (1);
295}
296
297/*
298 * Basic Machine Check/Program Check Handler.
299 */
300
301extern void s390_base_mcck_handler(void);
302extern void s390_base_pgm_handler(void);
303extern void s390_base_ext_handler(void);
304
305extern void (*s390_base_mcck_handler_fn)(void);
306extern void (*s390_base_pgm_handler_fn)(void);
307extern void (*s390_base_ext_handler_fn)(void);
308
309#define ARCH_LOW_ADDRESS_LIMIT	0x7fffffffUL
310
311#endif
312
313/*
314 * Helper macro for exception table entries
315 */
316#ifndef __s390x__
317#define EX_TABLE(_fault,_target)			\
318	".section __ex_table,\"a\"\n"			\
319	"	.align 4\n"				\
320	"	.long  " #_fault "," #_target "\n"	\
321	".previous\n"
322#else
323#define EX_TABLE(_fault,_target)			\
324	".section __ex_table,\"a\"\n"			\
325	"	.align 8\n"				\
326	"	.quad  " #_fault "," #_target "\n"	\
327	".previous\n"
328#endif
329
330#endif                                 /* __ASM_S390_PROCESSOR_H           */