/share/man/man4/man4.i386/CPU_ELAN.4

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  1. .\" Copyright (c) 2003 Poul-Henning Kamp <phk@FreeBSD.org>
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  27. .Dd November 23, 2003
  28. .Dt CPU_ELAN 4 i386
  29. .Os
  30. .Sh NAME
  31. .Nm CPU_ELAN
  32. .Nd AMD Elan 520 CPU support
  33. .Sh SYNOPSIS
  34. .Cd "options CPU_ELAN"
  35. .Cd "options CPU_ELAN_PPS"
  36. .Cd "options CPU_ELAN_XTAL"
  37. .Bl -item -compact
  38. .It
  39. .Va machdep.elan_gpio_config
  40. .It
  41. .Va machdep.elan_freq
  42. .El
  43. .Cd "options CPU_SOEKRIS"
  44. .Sh DESCRIPTION
  45. The
  46. .Cd "options CPU_ELAN"
  47. enables support for the AMD Elan 520 CPU.
  48. .Pp
  49. A device
  50. .Pa /dev/elan-mmcr
  51. exports the MMCR register bank to userland
  52. using
  53. .Xr mmap 2 .
  54. .Pp
  55. The
  56. .Tn i8254
  57. timer will be adjusted to the slightly unorthodox
  58. frequency 1189161 Hz (32768 * 45 * 25 / 31) employed by the Elan.
  59. .Pp
  60. A timecounter named
  61. .Dq Li ELAN
  62. is implemented using the general purpose timer 2,
  63. but it will not be usable unless HZ is configured at 150 or higher.
  64. This timecounter is much better than the
  65. .Dq Li i8254
  66. timecounter and should be
  67. used at all times.
  68. .Pp
  69. The
  70. .Va machdep.elan_gpio_config
  71. .Xr sysctl 8
  72. variable
  73. enables configuration of the GPIO pins of the CPU.
  74. The string must be exactly 32 characters long.
  75. A
  76. .Ql -
  77. means the GPIO is unavailable.
  78. A
  79. .Ql l
  80. (lower-case ell) configures a
  81. .Xr led 4
  82. device (active low).
  83. A
  84. .Ql L
  85. configures a
  86. .Xr led 4
  87. device (active high).
  88. A
  89. .Ql \&.
  90. means no configuration for this GPIO.
  91. These
  92. .Xr led 4
  93. devices will be named
  94. .Pa /dev/led/gpio%d .
  95. For meaning of
  96. .Ql P ,
  97. .Ql e
  98. and
  99. .Ql E ,
  100. see under
  101. .Cd "options CPU_ELAN_PPS" .
  102. .Pp
  103. The
  104. .Cd "options CPU_ELAN_XTAL"
  105. and the
  106. .Va machdep.elan_freq
  107. .Xr sysctl 8
  108. variable
  109. can be used to set the CPU clock crystal frequency in Hz.
  110. The default is 33333333 Hz.
  111. .Pp
  112. The
  113. .Cd "options CPU_ELAN_PPS"
  114. enables precision timestamping using the RFC2783 PPS-API via the
  115. .Pa /dev/elan-mmcr
  116. device.
  117. The resolution will be approximately 125 nsec
  118. and the precision \(+- 125 nsec.
  119. (For 125 nsec read
  120. .Dq "4 / CPU clock crystal frequency" . )
  121. .Pp
  122. The input signal must be connected to the TMR1IN pin and
  123. a GPIO pin.
  124. The GPIO pin must be configured with a
  125. .Ql P
  126. in
  127. .Va machdep.elan_gpio_config .
  128. .Pp
  129. In addition, one GPIO pin can be configured with either
  130. .Ql e
  131. (active low)
  132. or
  133. .Ql E
  134. (active high) to become a
  135. .Dq echo
  136. output of the input signal.
  137. Please notice that this signal is not suitable for calibration.
  138. .Pp
  139. If the
  140. .Cd "options CPU_SOEKRIS"
  141. is given, the support will additionally be tailored to the
  142. Soekris Engineering 45xx series of embedded computers.
  143. The
  144. .Dq error
  145. led will be configured (as
  146. .Pa /dev/led/error )
  147. and the GPIO pins which are not
  148. available will be disabled.
  149. .Sh SEE ALSO
  150. .Xr led 4 ,
  151. .Xr timecounters 4 ,
  152. .Xr sysctl 8
  153. .Sh HISTORY
  154. The
  155. .Nm
  156. code first appeared in
  157. .Fx 4.7 .
  158. .Sh AUTHORS
  159. .An "Poul-Henning Kamp" Aq phk@FreeBSD.org