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/drivers/pcmcia/yenta_socket.c

https://bitbucket.org/evzijst/gittest
C | 1160 lines | 839 code | 194 blank | 127 comment | 104 complexity | ef7ab52218a2bda9237556859a1c0142 MD5 | raw file
Possible License(s): CC-BY-SA-3.0, GPL-2.0, LGPL-2.0
  1. /*
  2. * Regular cardbus driver ("yenta_socket")
  3. *
  4. * (C) Copyright 1999, 2000 Linus Torvalds
  5. *
  6. * Changelog:
  7. * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
  8. * Dynamically adjust the size of the bridge resource
  9. *
  10. * May 2003: Dominik Brodowski <linux@brodo.de>
  11. * Merge pci_socket.c and yenta.c into one file
  12. */
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/sched.h>
  16. #include <linux/workqueue.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/delay.h>
  19. #include <linux/module.h>
  20. #include <pcmcia/version.h>
  21. #include <pcmcia/cs_types.h>
  22. #include <pcmcia/ss.h>
  23. #include <pcmcia/cs.h>
  24. #include <asm/io.h>
  25. #include "yenta_socket.h"
  26. #include "i82365.h"
  27. static int disable_clkrun;
  28. module_param(disable_clkrun, bool, 0444);
  29. MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
  30. #if 0
  31. #define debug(x,args...) printk(KERN_DEBUG "%s: " x, __func__ , ##args)
  32. #else
  33. #define debug(x,args...)
  34. #endif
  35. /* Don't ask.. */
  36. #define to_cycles(ns) ((ns)/120)
  37. #define to_ns(cycles) ((cycles)*120)
  38. static int yenta_probe_cb_irq(struct yenta_socket *socket);
  39. static unsigned int override_bios;
  40. module_param(override_bios, uint, 0000);
  41. MODULE_PARM_DESC (override_bios, "yenta ignore bios resource allocation");
  42. /*
  43. * Generate easy-to-use ways of reading a cardbus sockets
  44. * regular memory space ("cb_xxx"), configuration space
  45. * ("config_xxx") and compatibility space ("exca_xxxx")
  46. */
  47. static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
  48. {
  49. u32 val = readl(socket->base + reg);
  50. debug("%p %04x %08x\n", socket, reg, val);
  51. return val;
  52. }
  53. static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
  54. {
  55. debug("%p %04x %08x\n", socket, reg, val);
  56. writel(val, socket->base + reg);
  57. }
  58. static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
  59. {
  60. u8 val;
  61. pci_read_config_byte(socket->dev, offset, &val);
  62. debug("%p %04x %02x\n", socket, offset, val);
  63. return val;
  64. }
  65. static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
  66. {
  67. u16 val;
  68. pci_read_config_word(socket->dev, offset, &val);
  69. debug("%p %04x %04x\n", socket, offset, val);
  70. return val;
  71. }
  72. static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
  73. {
  74. u32 val;
  75. pci_read_config_dword(socket->dev, offset, &val);
  76. debug("%p %04x %08x\n", socket, offset, val);
  77. return val;
  78. }
  79. static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
  80. {
  81. debug("%p %04x %02x\n", socket, offset, val);
  82. pci_write_config_byte(socket->dev, offset, val);
  83. }
  84. static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
  85. {
  86. debug("%p %04x %04x\n", socket, offset, val);
  87. pci_write_config_word(socket->dev, offset, val);
  88. }
  89. static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
  90. {
  91. debug("%p %04x %08x\n", socket, offset, val);
  92. pci_write_config_dword(socket->dev, offset, val);
  93. }
  94. static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
  95. {
  96. u8 val = readb(socket->base + 0x800 + reg);
  97. debug("%p %04x %02x\n", socket, reg, val);
  98. return val;
  99. }
  100. static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
  101. {
  102. u16 val;
  103. val = readb(socket->base + 0x800 + reg);
  104. val |= readb(socket->base + 0x800 + reg + 1) << 8;
  105. debug("%p %04x %04x\n", socket, reg, val);
  106. return val;
  107. }
  108. static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
  109. {
  110. debug("%p %04x %02x\n", socket, reg, val);
  111. writeb(val, socket->base + 0x800 + reg);
  112. }
  113. static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
  114. {
  115. debug("%p %04x %04x\n", socket, reg, val);
  116. writeb(val, socket->base + 0x800 + reg);
  117. writeb(val >> 8, socket->base + 0x800 + reg + 1);
  118. }
  119. /*
  120. * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
  121. * on what kind of card is inserted..
  122. */
  123. static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
  124. {
  125. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  126. unsigned int val;
  127. u32 state = cb_readl(socket, CB_SOCKET_STATE);
  128. val = (state & CB_3VCARD) ? SS_3VCARD : 0;
  129. val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
  130. val |= (state & (CB_CDETECT1 | CB_CDETECT2 | CB_5VCARD | CB_3VCARD
  131. | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
  132. if (state & CB_CBCARD) {
  133. val |= SS_CARDBUS;
  134. val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
  135. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
  136. val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
  137. } else {
  138. u8 status = exca_readb(socket, I365_STATUS);
  139. val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
  140. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  141. val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
  142. } else {
  143. val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
  144. val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
  145. }
  146. val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
  147. val |= (status & I365_CS_READY) ? SS_READY : 0;
  148. val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
  149. }
  150. *value = val;
  151. return 0;
  152. }
  153. static int yenta_Vcc_power(u32 control)
  154. {
  155. switch (control & CB_SC_VCC_MASK) {
  156. case CB_SC_VCC_5V: return 50;
  157. case CB_SC_VCC_3V: return 33;
  158. default: return 0;
  159. }
  160. }
  161. static int yenta_Vpp_power(u32 control)
  162. {
  163. switch (control & CB_SC_VPP_MASK) {
  164. case CB_SC_VPP_12V: return 120;
  165. case CB_SC_VPP_5V: return 50;
  166. case CB_SC_VPP_3V: return 33;
  167. default: return 0;
  168. }
  169. }
  170. static int yenta_get_socket(struct pcmcia_socket *sock, socket_state_t *state)
  171. {
  172. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  173. u8 reg;
  174. u32 control;
  175. control = cb_readl(socket, CB_SOCKET_CONTROL);
  176. state->Vcc = yenta_Vcc_power(control);
  177. state->Vpp = yenta_Vpp_power(control);
  178. state->io_irq = socket->io_irq;
  179. if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
  180. u16 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
  181. if (bridge & CB_BRIDGE_CRST)
  182. state->flags |= SS_RESET;
  183. return 0;
  184. }
  185. /* 16-bit card state.. */
  186. reg = exca_readb(socket, I365_POWER);
  187. state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
  188. state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
  189. reg = exca_readb(socket, I365_INTCTL);
  190. state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
  191. state->flags |= (reg & I365_PC_IOCARD) ? SS_IOCARD : 0;
  192. reg = exca_readb(socket, I365_CSCINT);
  193. state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
  194. if (state->flags & SS_IOCARD) {
  195. state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
  196. } else {
  197. state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
  198. state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
  199. state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
  200. }
  201. return 0;
  202. }
  203. static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
  204. {
  205. u32 reg = 0; /* CB_SC_STPCLK? */
  206. switch (state->Vcc) {
  207. case 33: reg = CB_SC_VCC_3V; break;
  208. case 50: reg = CB_SC_VCC_5V; break;
  209. default: reg = 0; break;
  210. }
  211. switch (state->Vpp) {
  212. case 33: reg |= CB_SC_VPP_3V; break;
  213. case 50: reg |= CB_SC_VPP_5V; break;
  214. case 120: reg |= CB_SC_VPP_12V; break;
  215. }
  216. if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
  217. cb_writel(socket, CB_SOCKET_CONTROL, reg);
  218. }
  219. static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
  220. {
  221. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  222. u16 bridge;
  223. yenta_set_power(socket, state);
  224. socket->io_irq = state->io_irq;
  225. bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
  226. if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
  227. u8 intr;
  228. bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
  229. /* ISA interrupt control? */
  230. intr = exca_readb(socket, I365_INTCTL);
  231. intr = (intr & ~0xf);
  232. if (!socket->cb_irq) {
  233. intr |= state->io_irq;
  234. bridge |= CB_BRIDGE_INTR;
  235. }
  236. exca_writeb(socket, I365_INTCTL, intr);
  237. } else {
  238. u8 reg;
  239. reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
  240. reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
  241. reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
  242. if (state->io_irq != socket->cb_irq) {
  243. reg |= state->io_irq;
  244. bridge |= CB_BRIDGE_INTR;
  245. }
  246. exca_writeb(socket, I365_INTCTL, reg);
  247. reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
  248. reg |= I365_PWR_NORESET;
  249. if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
  250. if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
  251. if (exca_readb(socket, I365_POWER) != reg)
  252. exca_writeb(socket, I365_POWER, reg);
  253. /* CSC interrupt: no ISA irq for CSC */
  254. reg = I365_CSC_DETECT;
  255. if (state->flags & SS_IOCARD) {
  256. if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
  257. } else {
  258. if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
  259. if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
  260. if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
  261. }
  262. exca_writeb(socket, I365_CSCINT, reg);
  263. exca_readb(socket, I365_CSC);
  264. if(sock->zoom_video)
  265. sock->zoom_video(sock, state->flags & SS_ZVCARD);
  266. }
  267. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  268. /* Socket event mask: get card insert/remove events.. */
  269. cb_writel(socket, CB_SOCKET_EVENT, -1);
  270. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  271. return 0;
  272. }
  273. static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
  274. {
  275. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  276. int map;
  277. unsigned char ioctl, addr, enable;
  278. map = io->map;
  279. if (map > 1)
  280. return -EINVAL;
  281. enable = I365_ENA_IO(map);
  282. addr = exca_readb(socket, I365_ADDRWIN);
  283. /* Disable the window before changing it.. */
  284. if (addr & enable) {
  285. addr &= ~enable;
  286. exca_writeb(socket, I365_ADDRWIN, addr);
  287. }
  288. exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
  289. exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
  290. ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
  291. if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
  292. if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
  293. if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
  294. exca_writeb(socket, I365_IOCTL, ioctl);
  295. if (io->flags & MAP_ACTIVE)
  296. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  297. return 0;
  298. }
  299. static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
  300. {
  301. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  302. struct pci_bus_region region;
  303. int map;
  304. unsigned char addr, enable;
  305. unsigned int start, stop, card_start;
  306. unsigned short word;
  307. pcibios_resource_to_bus(socket->dev, &region, mem->res);
  308. map = mem->map;
  309. start = region.start;
  310. stop = region.end;
  311. card_start = mem->card_start;
  312. if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
  313. (card_start >> 26) || mem->speed > 1000)
  314. return -EINVAL;
  315. enable = I365_ENA_MEM(map);
  316. addr = exca_readb(socket, I365_ADDRWIN);
  317. if (addr & enable) {
  318. addr &= ~enable;
  319. exca_writeb(socket, I365_ADDRWIN, addr);
  320. }
  321. exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
  322. word = (start >> 12) & 0x0fff;
  323. if (mem->flags & MAP_16BIT)
  324. word |= I365_MEM_16BIT;
  325. if (mem->flags & MAP_0WS)
  326. word |= I365_MEM_0WS;
  327. exca_writew(socket, I365_MEM(map) + I365_W_START, word);
  328. word = (stop >> 12) & 0x0fff;
  329. switch (to_cycles(mem->speed)) {
  330. case 0: break;
  331. case 1: word |= I365_MEM_WS0; break;
  332. case 2: word |= I365_MEM_WS1; break;
  333. default: word |= I365_MEM_WS1 | I365_MEM_WS0; break;
  334. }
  335. exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
  336. word = ((card_start - start) >> 12) & 0x3fff;
  337. if (mem->flags & MAP_WRPROT)
  338. word |= I365_MEM_WRPROT;
  339. if (mem->flags & MAP_ATTRIB)
  340. word |= I365_MEM_REG;
  341. exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
  342. if (mem->flags & MAP_ACTIVE)
  343. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  344. return 0;
  345. }
  346. static unsigned int yenta_events(struct yenta_socket *socket)
  347. {
  348. u8 csc;
  349. u32 cb_event;
  350. unsigned int events;
  351. /* Clear interrupt status for the event */
  352. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  353. cb_writel(socket, CB_SOCKET_EVENT, cb_event);
  354. csc = exca_readb(socket, I365_CSC);
  355. events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
  356. events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
  357. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  358. events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
  359. } else {
  360. events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
  361. events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
  362. events |= (csc & I365_CSC_READY) ? SS_READY : 0;
  363. }
  364. return events;
  365. }
  366. static irqreturn_t yenta_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  367. {
  368. unsigned int events;
  369. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  370. events = yenta_events(socket);
  371. if (events) {
  372. pcmcia_parse_events(&socket->socket, events);
  373. return IRQ_HANDLED;
  374. }
  375. return IRQ_NONE;
  376. }
  377. static void yenta_interrupt_wrapper(unsigned long data)
  378. {
  379. struct yenta_socket *socket = (struct yenta_socket *) data;
  380. yenta_interrupt(0, (void *)socket, NULL);
  381. socket->poll_timer.expires = jiffies + HZ;
  382. add_timer(&socket->poll_timer);
  383. }
  384. static void yenta_clear_maps(struct yenta_socket *socket)
  385. {
  386. int i;
  387. struct resource res = { .start = 0, .end = 0x0fff };
  388. pccard_io_map io = { 0, 0, 0, 0, 1 };
  389. pccard_mem_map mem = { .res = &res, };
  390. yenta_set_socket(&socket->socket, &dead_socket);
  391. for (i = 0; i < 2; i++) {
  392. io.map = i;
  393. yenta_set_io_map(&socket->socket, &io);
  394. }
  395. for (i = 0; i < 5; i++) {
  396. mem.map = i;
  397. yenta_set_mem_map(&socket->socket, &mem);
  398. }
  399. }
  400. /* Called at resume and initialization events */
  401. static int yenta_sock_init(struct pcmcia_socket *sock)
  402. {
  403. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  404. u32 state;
  405. u16 bridge;
  406. bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~CB_BRIDGE_INTR;
  407. if (!socket->cb_irq)
  408. bridge |= CB_BRIDGE_INTR;
  409. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  410. exca_writeb(socket, I365_GBLCTL, 0x00);
  411. exca_writeb(socket, I365_GENCTL, 0x00);
  412. /* Redo card voltage interrogation */
  413. state = cb_readl(socket, CB_SOCKET_STATE);
  414. if (!(state & (CB_CDETECT1 | CB_CDETECT2 | CB_5VCARD |
  415. CB_3VCARD | CB_XVCARD | CB_YVCARD)))
  416. cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
  417. yenta_clear_maps(socket);
  418. if (socket->type && socket->type->sock_init)
  419. socket->type->sock_init(socket);
  420. /* Re-enable CSC interrupts */
  421. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  422. return 0;
  423. }
  424. static int yenta_sock_suspend(struct pcmcia_socket *sock)
  425. {
  426. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  427. /* Disable CSC interrupts */
  428. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  429. return 0;
  430. }
  431. /*
  432. * Use an adaptive allocation for the memory resource,
  433. * sometimes the memory behind pci bridges is limited:
  434. * 1/8 of the size of the io window of the parent.
  435. * max 4 MB, min 16 kB.
  436. */
  437. #define BRIDGE_MEM_MAX 4*1024*1024
  438. #define BRIDGE_MEM_MIN 16*1024
  439. #define BRIDGE_IO_MAX 256
  440. #define BRIDGE_IO_MIN 32
  441. #ifndef PCIBIOS_MIN_CARDBUS_IO
  442. #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
  443. #endif
  444. static void yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type)
  445. {
  446. struct pci_bus *bus;
  447. struct resource *root, *res;
  448. u32 start, end;
  449. u32 align, size, min;
  450. unsigned offset;
  451. unsigned mask;
  452. /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
  453. mask = ~0xfff;
  454. if (type & IORESOURCE_IO)
  455. mask = ~3;
  456. offset = 0x1c + 8*nr;
  457. bus = socket->dev->subordinate;
  458. res = socket->dev->resource + PCI_BRIDGE_RESOURCES + nr;
  459. res->name = bus->name;
  460. res->flags = type;
  461. res->start = 0;
  462. res->end = 0;
  463. root = pci_find_parent_resource(socket->dev, res);
  464. if (!root)
  465. return;
  466. start = config_readl(socket, offset) & mask;
  467. end = config_readl(socket, offset+4) | ~mask;
  468. if (start && end > start && !override_bios) {
  469. res->start = start;
  470. res->end = end;
  471. if (request_resource(root, res) == 0)
  472. return;
  473. printk(KERN_INFO "yenta %s: Preassigned resource %d busy, reconfiguring...\n",
  474. pci_name(socket->dev), nr);
  475. res->start = res->end = 0;
  476. }
  477. if (type & IORESOURCE_IO) {
  478. align = 1024;
  479. size = BRIDGE_IO_MAX;
  480. min = BRIDGE_IO_MIN;
  481. start = PCIBIOS_MIN_CARDBUS_IO;
  482. end = ~0U;
  483. } else {
  484. unsigned long avail = root->end - root->start;
  485. int i;
  486. size = BRIDGE_MEM_MAX;
  487. if (size > avail/8) {
  488. size=(avail+1)/8;
  489. /* round size down to next power of 2 */
  490. i = 0;
  491. while ((size /= 2) != 0)
  492. i++;
  493. size = 1 << i;
  494. }
  495. if (size < BRIDGE_MEM_MIN)
  496. size = BRIDGE_MEM_MIN;
  497. min = BRIDGE_MEM_MIN;
  498. align = size;
  499. start = PCIBIOS_MIN_MEM;
  500. end = ~0U;
  501. }
  502. do {
  503. if (allocate_resource(root, res, size, start, end, align, NULL, NULL)==0) {
  504. config_writel(socket, offset, res->start);
  505. config_writel(socket, offset+4, res->end);
  506. return;
  507. }
  508. size = size/2;
  509. align = size;
  510. } while (size >= min);
  511. printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n",
  512. pci_name(socket->dev), type);
  513. res->start = res->end = 0;
  514. }
  515. /*
  516. * Allocate the bridge mappings for the device..
  517. */
  518. static void yenta_allocate_resources(struct yenta_socket *socket)
  519. {
  520. yenta_allocate_res(socket, 0, IORESOURCE_MEM|IORESOURCE_PREFETCH);
  521. yenta_allocate_res(socket, 1, IORESOURCE_MEM);
  522. yenta_allocate_res(socket, 2, IORESOURCE_IO);
  523. yenta_allocate_res(socket, 3, IORESOURCE_IO); /* PCI isn't clever enough to use this one yet */
  524. }
  525. /*
  526. * Free the bridge mappings for the device..
  527. */
  528. static void yenta_free_resources(struct yenta_socket *socket)
  529. {
  530. int i;
  531. for (i=0;i<4;i++) {
  532. struct resource *res;
  533. res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
  534. if (res->start != 0 && res->end != 0)
  535. release_resource(res);
  536. res->start = res->end = 0;
  537. }
  538. }
  539. /*
  540. * Close it down - release our resources and go home..
  541. */
  542. static void yenta_close(struct pci_dev *dev)
  543. {
  544. struct yenta_socket *sock = pci_get_drvdata(dev);
  545. /* we don't want a dying socket registered */
  546. pcmcia_unregister_socket(&sock->socket);
  547. /* Disable all events so we don't die in an IRQ storm */
  548. cb_writel(sock, CB_SOCKET_MASK, 0x0);
  549. exca_writeb(sock, I365_CSCINT, 0);
  550. if (sock->cb_irq)
  551. free_irq(sock->cb_irq, sock);
  552. else
  553. del_timer_sync(&sock->poll_timer);
  554. if (sock->base)
  555. iounmap(sock->base);
  556. yenta_free_resources(sock);
  557. pci_release_regions(dev);
  558. pci_disable_device(dev);
  559. pci_set_drvdata(dev, NULL);
  560. }
  561. static struct pccard_operations yenta_socket_operations = {
  562. .init = yenta_sock_init,
  563. .suspend = yenta_sock_suspend,
  564. .get_status = yenta_get_status,
  565. .get_socket = yenta_get_socket,
  566. .set_socket = yenta_set_socket,
  567. .set_io_map = yenta_set_io_map,
  568. .set_mem_map = yenta_set_mem_map,
  569. };
  570. #include "ti113x.h"
  571. #include "ricoh.h"
  572. #include "topic.h"
  573. #include "o2micro.h"
  574. enum {
  575. CARDBUS_TYPE_DEFAULT = -1,
  576. CARDBUS_TYPE_TI,
  577. CARDBUS_TYPE_TI113X,
  578. CARDBUS_TYPE_TI12XX,
  579. CARDBUS_TYPE_TI1250,
  580. CARDBUS_TYPE_RICOH,
  581. CARDBUS_TYPE_TOPIC97,
  582. CARDBUS_TYPE_O2MICRO,
  583. };
  584. /*
  585. * Different cardbus controllers have slightly different
  586. * initialization sequences etc details. List them here..
  587. */
  588. static struct cardbus_type cardbus_type[] = {
  589. [CARDBUS_TYPE_TI] = {
  590. .override = ti_override,
  591. .save_state = ti_save_state,
  592. .restore_state = ti_restore_state,
  593. .sock_init = ti_init,
  594. },
  595. [CARDBUS_TYPE_TI113X] = {
  596. .override = ti113x_override,
  597. .save_state = ti_save_state,
  598. .restore_state = ti_restore_state,
  599. .sock_init = ti_init,
  600. },
  601. [CARDBUS_TYPE_TI12XX] = {
  602. .override = ti12xx_override,
  603. .save_state = ti_save_state,
  604. .restore_state = ti_restore_state,
  605. .sock_init = ti_init,
  606. },
  607. [CARDBUS_TYPE_TI1250] = {
  608. .override = ti1250_override,
  609. .save_state = ti_save_state,
  610. .restore_state = ti_restore_state,
  611. .sock_init = ti_init,
  612. },
  613. [CARDBUS_TYPE_RICOH] = {
  614. .override = ricoh_override,
  615. .save_state = ricoh_save_state,
  616. .restore_state = ricoh_restore_state,
  617. },
  618. [CARDBUS_TYPE_TOPIC97] = {
  619. .override = topic97_override,
  620. },
  621. [CARDBUS_TYPE_O2MICRO] = {
  622. .override = o2micro_override,
  623. .restore_state = o2micro_restore_state,
  624. },
  625. };
  626. /*
  627. * Only probe "regular" interrupts, don't
  628. * touch dangerous spots like the mouse irq,
  629. * because there are mice that apparently
  630. * get really confused if they get fondled
  631. * too intimately.
  632. *
  633. * Default to 11, 10, 9, 7, 6, 5, 4, 3.
  634. */
  635. static u32 isa_interrupts = 0x0ef8;
  636. static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
  637. {
  638. int i;
  639. unsigned long val;
  640. u16 bridge_ctrl;
  641. u32 mask;
  642. /* Set up ISA irq routing to probe the ISA irqs.. */
  643. bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
  644. if (!(bridge_ctrl & CB_BRIDGE_INTR)) {
  645. bridge_ctrl |= CB_BRIDGE_INTR;
  646. config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
  647. }
  648. /*
  649. * Probe for usable interrupts using the force
  650. * register to generate bogus card status events.
  651. */
  652. cb_writel(socket, CB_SOCKET_EVENT, -1);
  653. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  654. exca_writeb(socket, I365_CSCINT, 0);
  655. val = probe_irq_on() & isa_irq_mask;
  656. for (i = 1; i < 16; i++) {
  657. if (!((val >> i) & 1))
  658. continue;
  659. exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
  660. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  661. udelay(100);
  662. cb_writel(socket, CB_SOCKET_EVENT, -1);
  663. }
  664. cb_writel(socket, CB_SOCKET_MASK, 0);
  665. exca_writeb(socket, I365_CSCINT, 0);
  666. mask = probe_irq_mask(val) & 0xffff;
  667. bridge_ctrl &= ~CB_BRIDGE_INTR;
  668. config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
  669. return mask;
  670. }
  671. /* interrupt handler, only used during probing */
  672. static irqreturn_t yenta_probe_handler(int irq, void *dev_id, struct pt_regs *regs)
  673. {
  674. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  675. u8 csc;
  676. u32 cb_event;
  677. /* Clear interrupt status for the event */
  678. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  679. cb_writel(socket, CB_SOCKET_EVENT, -1);
  680. csc = exca_readb(socket, I365_CSC);
  681. if (cb_event || csc) {
  682. socket->probe_status = 1;
  683. return IRQ_HANDLED;
  684. }
  685. return IRQ_NONE;
  686. }
  687. /* probes the PCI interrupt, use only on override functions */
  688. static int yenta_probe_cb_irq(struct yenta_socket *socket)
  689. {
  690. u16 bridge_ctrl;
  691. if (!socket->cb_irq)
  692. return -1;
  693. socket->probe_status = 0;
  694. /* disable ISA interrupts */
  695. bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
  696. bridge_ctrl &= ~CB_BRIDGE_INTR;
  697. config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
  698. if (request_irq(socket->cb_irq, yenta_probe_handler, SA_SHIRQ, "yenta", socket)) {
  699. printk(KERN_WARNING "Yenta: request_irq() in yenta_probe_cb_irq() failed!\n");
  700. return -1;
  701. }
  702. /* generate interrupt, wait */
  703. exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG);
  704. cb_writel(socket, CB_SOCKET_EVENT, -1);
  705. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  706. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  707. msleep(100);
  708. /* disable interrupts */
  709. cb_writel(socket, CB_SOCKET_MASK, 0);
  710. exca_writeb(socket, I365_CSCINT, 0);
  711. cb_writel(socket, CB_SOCKET_EVENT, -1);
  712. exca_readb(socket, I365_CSC);
  713. free_irq(socket->cb_irq, socket);
  714. return (int) socket->probe_status;
  715. }
  716. /*
  717. * Set static data that doesn't need re-initializing..
  718. */
  719. static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
  720. {
  721. socket->socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD | SS_CAP_CARDBUS;
  722. socket->socket.map_size = 0x1000;
  723. socket->socket.pci_irq = socket->cb_irq;
  724. socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
  725. socket->socket.cb_dev = socket->dev;
  726. printk(KERN_INFO "Yenta: ISA IRQ mask 0x%04x, PCI irq %d\n",
  727. socket->socket.irq_mask, socket->cb_irq);
  728. }
  729. /*
  730. * Initialize the standard cardbus registers
  731. */
  732. static void yenta_config_init(struct yenta_socket *socket)
  733. {
  734. u16 bridge;
  735. struct pci_dev *dev = socket->dev;
  736. pci_set_power_state(socket->dev, 0);
  737. config_writel(socket, CB_LEGACY_MODE_BASE, 0);
  738. config_writel(socket, PCI_BASE_ADDRESS_0, dev->resource[0].start);
  739. config_writew(socket, PCI_COMMAND,
  740. PCI_COMMAND_IO |
  741. PCI_COMMAND_MEMORY |
  742. PCI_COMMAND_MASTER |
  743. PCI_COMMAND_WAIT);
  744. /* MAGIC NUMBERS! Fixme */
  745. config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
  746. config_writeb(socket, PCI_LATENCY_TIMER, 168);
  747. config_writel(socket, PCI_PRIMARY_BUS,
  748. (176 << 24) | /* sec. latency timer */
  749. (dev->subordinate->subordinate << 16) | /* subordinate bus */
  750. (dev->subordinate->secondary << 8) | /* secondary bus */
  751. dev->subordinate->primary); /* primary bus */
  752. /*
  753. * Set up the bridging state:
  754. * - enable write posting.
  755. * - memory window 0 prefetchable, window 1 non-prefetchable
  756. * - PCI interrupts enabled if a PCI interrupt exists..
  757. */
  758. bridge = config_readw(socket, CB_BRIDGE_CONTROL);
  759. bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_INTR | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
  760. bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN | CB_BRIDGE_INTR;
  761. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  762. }
  763. /*
  764. * Initialize a cardbus controller. Make sure we have a usable
  765. * interrupt, and that we can map the cardbus area. Fill in the
  766. * socket information structure..
  767. */
  768. static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id)
  769. {
  770. struct yenta_socket *socket;
  771. int ret;
  772. socket = kmalloc(sizeof(struct yenta_socket), GFP_KERNEL);
  773. if (!socket)
  774. return -ENOMEM;
  775. memset(socket, 0, sizeof(*socket));
  776. /* prepare pcmcia_socket */
  777. socket->socket.ops = &yenta_socket_operations;
  778. socket->socket.resource_ops = &pccard_nonstatic_ops;
  779. socket->socket.dev.dev = &dev->dev;
  780. socket->socket.driver_data = socket;
  781. socket->socket.owner = THIS_MODULE;
  782. /* prepare struct yenta_socket */
  783. socket->dev = dev;
  784. pci_set_drvdata(dev, socket);
  785. /*
  786. * Do some basic sanity checking..
  787. */
  788. if (pci_enable_device(dev)) {
  789. ret = -EBUSY;
  790. goto free;
  791. }
  792. ret = pci_request_regions(dev, "yenta_socket");
  793. if (ret)
  794. goto disable;
  795. if (!pci_resource_start(dev, 0)) {
  796. printk(KERN_ERR "No cardbus resource!\n");
  797. ret = -ENODEV;
  798. goto release;
  799. }
  800. /*
  801. * Ok, start setup.. Map the cardbus registers,
  802. * and request the IRQ.
  803. */
  804. socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
  805. if (!socket->base) {
  806. ret = -ENOMEM;
  807. goto release;
  808. }
  809. /*
  810. * report the subsystem vendor and device for help debugging
  811. * the irq stuff...
  812. */
  813. printk(KERN_INFO "Yenta: CardBus bridge found at %s [%04x:%04x]\n",
  814. pci_name(dev), dev->subsystem_vendor, dev->subsystem_device);
  815. yenta_config_init(socket);
  816. /* Disable all events */
  817. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  818. /* Set up the bridge regions.. */
  819. yenta_allocate_resources(socket);
  820. socket->cb_irq = dev->irq;
  821. /* Do we have special options for the device? */
  822. if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
  823. id->driver_data < ARRAY_SIZE(cardbus_type)) {
  824. socket->type = &cardbus_type[id->driver_data];
  825. ret = socket->type->override(socket);
  826. if (ret < 0)
  827. goto unmap;
  828. }
  829. /* We must finish initialization here */
  830. if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, SA_SHIRQ, "yenta", socket)) {
  831. /* No IRQ or request_irq failed. Poll */
  832. socket->cb_irq = 0; /* But zero is a valid IRQ number. */
  833. init_timer(&socket->poll_timer);
  834. socket->poll_timer.function = yenta_interrupt_wrapper;
  835. socket->poll_timer.data = (unsigned long)socket;
  836. socket->poll_timer.expires = jiffies + HZ;
  837. add_timer(&socket->poll_timer);
  838. }
  839. /* Figure out what the dang thing can do for the PCMCIA layer... */
  840. yenta_get_socket_capabilities(socket, isa_interrupts);
  841. printk(KERN_INFO "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
  842. /* Register it with the pcmcia layer.. */
  843. ret = pcmcia_register_socket(&socket->socket);
  844. if (ret == 0)
  845. goto out;
  846. unmap:
  847. iounmap(socket->base);
  848. release:
  849. pci_release_regions(dev);
  850. disable:
  851. pci_disable_device(dev);
  852. free:
  853. kfree(socket);
  854. out:
  855. return ret;
  856. }
  857. static int yenta_dev_suspend (struct pci_dev *dev, pm_message_t state)
  858. {
  859. struct yenta_socket *socket = pci_get_drvdata(dev);
  860. int ret;
  861. ret = pcmcia_socket_dev_suspend(&dev->dev, state);
  862. if (socket) {
  863. if (socket->type && socket->type->save_state)
  864. socket->type->save_state(socket);
  865. /* FIXME: pci_save_state needs to have a better interface */
  866. pci_save_state(dev);
  867. pci_read_config_dword(dev, 16*4, &socket->saved_state[0]);
  868. pci_read_config_dword(dev, 17*4, &socket->saved_state[1]);
  869. /*
  870. * Some laptops (IBM T22) do not like us putting the Cardbus
  871. * bridge into D3. At a guess, some other laptop will
  872. * probably require this, so leave it commented out for now.
  873. */
  874. /* pci_set_power_state(dev, 3); */
  875. }
  876. return ret;
  877. }
  878. static int yenta_dev_resume (struct pci_dev *dev)
  879. {
  880. struct yenta_socket *socket = pci_get_drvdata(dev);
  881. if (socket) {
  882. pci_set_power_state(dev, 0);
  883. /* FIXME: pci_restore_state needs to have a better interface */
  884. pci_restore_state(dev);
  885. pci_write_config_dword(dev, 16*4, socket->saved_state[0]);
  886. pci_write_config_dword(dev, 17*4, socket->saved_state[1]);
  887. if (socket->type && socket->type->restore_state)
  888. socket->type->restore_state(socket);
  889. }
  890. return pcmcia_socket_dev_resume(&dev->dev);
  891. }
  892. #define CB_ID(vend,dev,type) \
  893. { \
  894. .vendor = vend, \
  895. .device = dev, \
  896. .subvendor = PCI_ANY_ID, \
  897. .subdevice = PCI_ANY_ID, \
  898. .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
  899. .class_mask = ~0, \
  900. .driver_data = CARDBUS_TYPE_##type, \
  901. }
  902. static struct pci_device_id yenta_table [] = {
  903. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
  904. /*
  905. * TBD: Check if these TI variants can use more
  906. * advanced overrides instead. (I can't get the
  907. * data sheets for these devices. --rmk)
  908. */
  909. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
  910. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
  911. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
  912. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
  913. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
  914. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
  915. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
  916. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
  917. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
  918. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
  919. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
  920. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
  921. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
  922. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
  923. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
  924. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
  925. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
  926. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
  927. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
  928. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
  929. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
  930. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
  931. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, TI12XX),
  932. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, TI12XX),
  933. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, TI1250),
  934. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, TI12XX),
  935. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
  936. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
  937. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
  938. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
  939. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
  940. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
  941. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
  942. CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
  943. /* match any cardbus bridge */
  944. CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
  945. { /* all zeroes */ }
  946. };
  947. MODULE_DEVICE_TABLE(pci, yenta_table);
  948. static struct pci_driver yenta_cardbus_driver = {
  949. .name = "yenta_cardbus",
  950. .id_table = yenta_table,
  951. .probe = yenta_probe,
  952. .remove = __devexit_p(yenta_close),
  953. .suspend = yenta_dev_suspend,
  954. .resume = yenta_dev_resume,
  955. };
  956. static int __init yenta_socket_init(void)
  957. {
  958. return pci_register_driver (&yenta_cardbus_driver);
  959. }
  960. static void __exit yenta_socket_exit (void)
  961. {
  962. pci_unregister_driver (&yenta_cardbus_driver);
  963. }
  964. module_init(yenta_socket_init);
  965. module_exit(yenta_socket_exit);
  966. MODULE_LICENSE("GPL");