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/drivers/char/drm/i810_drv.h

https://bitbucket.org/evzijst/gittest
C Header | 236 lines | 154 code | 39 blank | 43 comment | 8 complexity | f37c66aa038c1a2465494481402bba13 MD5 | raw file
  1/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
  2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
  3 *
  4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  6 * All rights reserved.
  7 *
  8 * Permission is hereby granted, free of charge, to any person obtaining a
  9 * copy of this software and associated documentation files (the "Software"),
 10 * to deal in the Software without restriction, including without limitation
 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 12 * and/or sell copies of the Software, and to permit persons to whom the
 13 * Software is furnished to do so, subject to the following conditions:
 14 *
 15 * The above copyright notice and this permission notice (including the next
 16 * paragraph) shall be included in all copies or substantial portions of the
 17 * Software.
 18 *
 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 25 * DEALINGS IN THE SOFTWARE.
 26 *
 27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
 28 * 	    Jeff Hartmann <jhartmann@valinux.com>
 29 *
 30 */
 31
 32#ifndef _I810_DRV_H_
 33#define _I810_DRV_H_
 34
 35/* General customization:
 36 */
 37
 38#define DRIVER_AUTHOR		"VA Linux Systems Inc."
 39
 40#define DRIVER_NAME		"i810"
 41#define DRIVER_DESC		"Intel i810"
 42#define DRIVER_DATE		"20030605"
 43
 44/* Interface history
 45 *
 46 * 1.1   - XFree86 4.1
 47 * 1.2   - XvMC interfaces
 48 *       - XFree86 4.2
 49 * 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
 50 *       - Remove requirement for interrupt (leave stubs again)
 51 * 1.3   - Add page flipping.
 52 * 1.4   - fix DRM interface
 53 */
 54#define DRIVER_MAJOR		1
 55#define DRIVER_MINOR		4
 56#define DRIVER_PATCHLEVEL	0
 57
 58typedef struct drm_i810_buf_priv {
 59   	u32 *in_use;
 60   	int my_use_idx;
 61	int currently_mapped;
 62	void *virtual;
 63	void *kernel_virtual;
 64} drm_i810_buf_priv_t;
 65
 66typedef struct _drm_i810_ring_buffer{
 67	int tail_mask;
 68	unsigned long Start;
 69	unsigned long End;
 70	unsigned long Size;
 71	u8 *virtual_start;
 72	int head;
 73	int tail;
 74	int space;
 75} drm_i810_ring_buffer_t;
 76
 77typedef struct drm_i810_private {
 78	drm_map_t *sarea_map;
 79	drm_map_t *mmio_map;
 80
 81	drm_i810_sarea_t *sarea_priv;
 82   	drm_i810_ring_buffer_t ring;
 83
 84      	void *hw_status_page;
 85   	unsigned long counter;
 86
 87	dma_addr_t dma_status_page;
 88
 89	drm_buf_t *mmap_buffer;
 90
 91
 92	u32 front_di1, back_di1, zi1;
 93
 94	int back_offset;
 95	int depth_offset;
 96	int overlay_offset;
 97	int overlay_physical;
 98	int w, h;
 99	int pitch;
100  	int back_pitch;
101	int depth_pitch;
102
103	int do_boxes;
104	int dma_used;
105
106	int current_page;
107	int page_flipping;
108
109	wait_queue_head_t irq_queue;
110   	atomic_t irq_received;
111   	atomic_t irq_emitted;
112  
113        int front_offset;
114} drm_i810_private_t;
115
116				/* i810_dma.c */
117extern void i810_reclaim_buffers(drm_device_t *dev, struct file *filp);
118extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma);
119
120extern int i810_driver_dma_quiescent(drm_device_t *dev);
121extern void i810_driver_release(drm_device_t *dev, struct file *filp);
122extern void i810_driver_pretakedown(drm_device_t *dev);
123extern void i810_driver_prerelease(drm_device_t *dev, DRMFILE filp);
124
125#define I810_BASE(reg)		((unsigned long) \
126				dev_priv->mmio_map->handle)
127#define I810_ADDR(reg)		(I810_BASE(reg) + reg)
128#define I810_DEREF(reg)		*(__volatile__ int *)I810_ADDR(reg)
129#define I810_READ(reg)		I810_DEREF(reg)
130#define I810_WRITE(reg,val) 	do { I810_DEREF(reg) = val; } while (0)
131#define I810_DEREF16(reg)	*(__volatile__ u16 *)I810_ADDR(reg)
132#define I810_READ16(reg)	I810_DEREF16(reg)
133#define I810_WRITE16(reg,val)	do { I810_DEREF16(reg) = val; } while (0)
134
135#define I810_VERBOSE 0
136#define RING_LOCALS	unsigned int outring, ringmask; \
137                        volatile char *virt;
138
139#define BEGIN_LP_RING(n) do {						\
140	if (I810_VERBOSE)                                               \
141           DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", n, __FUNCTION__);	\
142	if (dev_priv->ring.space < n*4)					\
143		i810_wait_ring(dev, n*4);				\
144	dev_priv->ring.space -= n*4;					\
145	outring = dev_priv->ring.tail;					\
146	ringmask = dev_priv->ring.tail_mask;				\
147	virt = dev_priv->ring.virtual_start;				\
148} while (0)
149
150#define ADVANCE_LP_RING() do {				        \
151	if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n");    	\
152	dev_priv->ring.tail = outring;		        	\
153	I810_WRITE(LP_RING + RING_TAIL, outring);	        \
154} while(0)
155
156#define OUT_RING(n) do {  				                \
157	if (I810_VERBOSE) DRM_DEBUG("   OUT_RING %x\n", (int)(n));	\
158	*(volatile unsigned int *)(virt + outring) = n;	                \
159	outring += 4;					                \
160	outring &= ringmask;			                        \
161} while (0)
162
163#define GFX_OP_USER_INTERRUPT 		((0<<29)|(2<<23))
164#define GFX_OP_BREAKPOINT_INTERRUPT	((0<<29)|(1<<23))
165#define CMD_REPORT_HEAD			(7<<23)
166#define CMD_STORE_DWORD_IDX		((0x21<<23) | 0x1)
167#define CMD_OP_BATCH_BUFFER  ((0x0<<29)|(0x30<<23)|0x1)
168
169#define INST_PARSER_CLIENT   0x00000000
170#define INST_OP_FLUSH        0x02000000
171#define INST_FLUSH_MAP_CACHE 0x00000001
172
173
174#define BB1_START_ADDR_MASK   (~0x7)
175#define BB1_PROTECTED         (1<<0)
176#define BB1_UNPROTECTED       (0<<0)
177#define BB2_END_ADDR_MASK     (~0x7)
178
179#define I810REG_HWSTAM		0x02098
180#define I810REG_INT_IDENTITY_R	0x020a4
181#define I810REG_INT_MASK_R 	0x020a8
182#define I810REG_INT_ENABLE_R	0x020a0
183
184#define LP_RING     		0x2030
185#define HP_RING     		0x2040
186#define RING_TAIL      		0x00
187#define TAIL_ADDR		0x000FFFF8
188#define RING_HEAD      		0x04
189#define HEAD_WRAP_COUNT     	0xFFE00000
190#define HEAD_WRAP_ONE       	0x00200000
191#define HEAD_ADDR           	0x001FFFFC
192#define RING_START     		0x08
193#define START_ADDR          	0x00FFFFF8
194#define RING_LEN       		0x0C
195#define RING_NR_PAGES       	0x000FF000
196#define RING_REPORT_MASK    	0x00000006
197#define RING_REPORT_64K     	0x00000002
198#define RING_REPORT_128K    	0x00000004
199#define RING_NO_REPORT      	0x00000000
200#define RING_VALID_MASK     	0x00000001
201#define RING_VALID          	0x00000001
202#define RING_INVALID        	0x00000000
203
204#define GFX_OP_SCISSOR         ((0x3<<29)|(0x1c<<24)|(0x10<<19))
205#define SC_UPDATE_SCISSOR       (0x1<<1)
206#define SC_ENABLE_MASK          (0x1<<0)
207#define SC_ENABLE               (0x1<<0)
208
209#define GFX_OP_SCISSOR_INFO    ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
210#define SCI_YMIN_MASK      (0xffff<<16)
211#define SCI_XMIN_MASK      (0xffff<<0)
212#define SCI_YMAX_MASK      (0xffff<<16)
213#define SCI_XMAX_MASK      (0xffff<<0)
214
215#define GFX_OP_COLOR_FACTOR      ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
216#define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
217#define GFX_OP_MAP_INFO          ((0x3<<29)|(0x1d<<24)|0x2)
218#define GFX_OP_DESTBUFFER_VARS   ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
219#define GFX_OP_DRAWRECT_INFO     ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
220#define GFX_OP_PRIMITIVE         ((0x3<<29)|(0x1f<<24))
221
222#define CMD_OP_Z_BUFFER_INFO     ((0x0<<29)|(0x16<<23))
223#define CMD_OP_DESTBUFFER_INFO   ((0x0<<29)|(0x15<<23))
224#define CMD_OP_FRONTBUFFER_INFO  ((0x0<<29)|(0x14<<23))
225#define CMD_OP_WAIT_FOR_EVENT    ((0x0<<29)|(0x03<<23))
226
227#define BR00_BITBLT_CLIENT   0x40000000
228#define BR00_OP_COLOR_BLT    0x10000000
229#define BR00_OP_SRC_COPY_BLT 0x10C00000
230#define BR13_SOLID_PATTERN   0x80000000
231
232#define WAIT_FOR_PLANE_A_SCANLINES (1<<1) 
233#define WAIT_FOR_PLANE_A_FLIP      (1<<2) 
234#define WAIT_FOR_VBLANK (1<<3)
235
236#endif