PageRenderTime 32ms CodeModel.GetById 9ms app.highlight 16ms RepoModel.GetById 1ms app.codeStats 1ms

/arch/sh/kernel/cf-enabler.c

https://bitbucket.org/evzijst/gittest
C | 158 lines | 82 code | 22 blank | 54 comment | 15 complexity | a35d60a7be43be4cdd5e269e2c4b8530 MD5 | raw file
  1/* $Id: cf-enabler.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $
  2 *
  3 *  linux/drivers/block/cf-enabler.c
  4 *
  5 *  Copyright (C) 1999  Niibe Yutaka
  6 *  Copyright (C) 2000  Toshiharu Nozawa
  7 *  Copyright (C) 2001  A&D Co., Ltd.
  8 *
  9 *  Enable the CF configuration.
 10 */
 11
 12#include <linux/config.h>
 13#include <linux/init.h>
 14
 15#include <asm/io.h>
 16#include <asm/irq.h>
 17
 18/*
 19 * You can connect Compact Flash directly to the bus of SuperH.
 20 * This is the enabler for that.
 21 *
 22 * SIM: How generic is this really? It looks pretty board, or at
 23 * least SH sub-type, specific to me.
 24 * I know it doesn't work on the Overdrive!
 25 */
 26
 27/*
 28 * 0xB8000000 : Attribute
 29 * 0xB8001000 : Common Memory
 30 * 0xBA000000 : I/O
 31 */
 32#if defined(CONFIG_IDE) && defined(CONFIG_CPU_SH4)
 33/* SH4 can't access PCMCIA interface through P2 area.
 34 * we must remap it with appropreate attribute bit of the page set.
 35 * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
 36#include <linux/mm.h>
 37#include <linux/vmalloc.h>
 38
 39#if defined(CONFIG_CF_AREA6)
 40#define slot_no 0
 41#else
 42#define slot_no 1
 43#endif
 44
 45/* defined in mm/ioremap.c */
 46extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
 47
 48/* use this pointer to access to directly connected compact flash io area*/
 49void *cf_io_base;
 50
 51static int __init allocate_cf_area(void)
 52{
 53	pgprot_t prot;
 54	unsigned long paddrbase, psize;
 55
 56	/* open I/O area window */
 57	paddrbase = virt_to_phys((void*)CONFIG_CF_BASE_ADDR);
 58	psize = PAGE_SIZE;
 59	prot = PAGE_KERNEL_PCC(slot_no, _PAGE_PCC_IO16);
 60	cf_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
 61	if (!cf_io_base) {
 62		printk("allocate_cf_area : can't open CF I/O window!\n");
 63		return -ENOMEM;
 64	}
 65/*	printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n",
 66	    	paddrbase, psize, prot.pgprot, cf_io_base);*/
 67
 68	/* XXX : do we need attribute and common-memory area also? */
 69
 70	return 0;
 71}
 72#endif
 73
 74static int __init cf_init_default(void)
 75{
 76/* You must have enabled the card, and set the level interrupt
 77 * before reaching this point. Possibly in boot ROM or boot loader.
 78 */
 79#if defined(CONFIG_IDE) && defined(CONFIG_CPU_SH4)
 80	allocate_cf_area();
 81#endif
 82#if defined(CONFIG_SH_UNKNOWN)
 83	/* This should be done in each board's init_xxx_irq. */
 84	make_imask_irq(14);
 85	disable_irq(14);
 86#endif
 87	return 0;
 88}
 89
 90#if defined(CONFIG_SH_SOLUTION_ENGINE)
 91#include <asm/se/se.h>
 92
 93/*
 94 * SolutionEngine
 95 *
 96 * 0xB8400000 : Common Memory
 97 * 0xB8500000 : Attribute
 98 * 0xB8600000 : I/O
 99 */
100
101static int __init cf_init_se(void)
102{
103	if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
104		return 0;	/* Not detected */
105
106	if ((ctrl_inw(MRSHPC_CSR) & 0x0080) == 0) {
107		ctrl_outw(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
108	} else {
109		ctrl_outw(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
110	}
111
112	/*
113	 *  PC-Card window open 
114	 *  flag == COMMON/ATTRIBUTE/IO
115	 */
116	/* common window open */
117	ctrl_outw(0x8a84, MRSHPC_MW0CR1);/* window 0xb8400000 */
118	if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
119		/* common mode & bus width 16bit SWAP = 1*/
120		ctrl_outw(0x0b00, MRSHPC_MW0CR2);
121	else
122		/* common mode & bus width 16bit SWAP = 0*/
123		ctrl_outw(0x0300, MRSHPC_MW0CR2); 
124
125	/* attribute window open */
126	ctrl_outw(0x8a85, MRSHPC_MW1CR1);/* window 0xb8500000 */
127	if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
128		/* attribute mode & bus width 16bit SWAP = 1*/
129		ctrl_outw(0x0a00, MRSHPC_MW1CR2);
130	else
131		/* attribute mode & bus width 16bit SWAP = 0*/
132		ctrl_outw(0x0200, MRSHPC_MW1CR2);
133
134	/* I/O window open */
135	ctrl_outw(0x8a86, MRSHPC_IOWCR1);/* I/O window 0xb8600000 */
136	ctrl_outw(0x0008, MRSHPC_CDCR);	 /* I/O card mode */
137	if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
138		ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
139	else
140		ctrl_outw(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
141
142	ctrl_outw(0x2000, MRSHPC_ICR);
143	ctrl_outb(0x00, PA_MRSHPC_MW2 + 0x206);
144	ctrl_outb(0x42, PA_MRSHPC_MW2 + 0x200);
145	return 0;
146}
147#endif
148
149int __init cf_init(void)
150{
151#if defined(CONFIG_SH_SOLUTION_ENGINE)
152	if (MACH_SE)
153		return cf_init_se();
154#endif
155	return cf_init_default();
156}
157
158__initcall (cf_init);