/arch/sh/cchips/hd6446x/hd64465/setup.c

https://bitbucket.org/evzijst/gittest · C · 202 lines · 137 code · 45 blank · 20 comment · 12 complexity · 6634b699f63328df8a32efb2031f7240 MD5 · raw file

  1. /*
  2. * $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
  3. *
  4. * Setup and IRQ handling code for the HD64465 companion chip.
  5. * by Greg Banks <gbanks@pocketpenguins.com>
  6. * Copyright (c) 2000 PocketPenguins Inc
  7. *
  8. * Derived from setup_hd64461.c which bore the message:
  9. * Copyright (C) 2000 YAEGASHI Takeshi
  10. */
  11. #include <linux/config.h>
  12. #include <linux/sched.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/param.h>
  16. #include <linux/ioport.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/init.h>
  19. #include <linux/irq.h>
  20. #include <asm/io.h>
  21. #include <asm/irq.h>
  22. #include <asm/hd64465/hd64465.h>
  23. static void disable_hd64465_irq(unsigned int irq)
  24. {
  25. unsigned long flags;
  26. unsigned short nimr;
  27. unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
  28. pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask);
  29. local_irq_save(flags);
  30. nimr = inw(HD64465_REG_NIMR);
  31. nimr |= mask;
  32. outw(nimr, HD64465_REG_NIMR);
  33. local_irq_restore(flags);
  34. }
  35. static void enable_hd64465_irq(unsigned int irq)
  36. {
  37. unsigned long flags;
  38. unsigned short nimr;
  39. unsigned short mask = 1 << (irq - HD64465_IRQ_BASE);
  40. pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask);
  41. local_irq_save(flags);
  42. nimr = inw(HD64465_REG_NIMR);
  43. nimr &= ~mask;
  44. outw(nimr, HD64465_REG_NIMR);
  45. local_irq_restore(flags);
  46. }
  47. static void mask_and_ack_hd64465(unsigned int irq)
  48. {
  49. disable_hd64465_irq(irq);
  50. }
  51. static void end_hd64465_irq(unsigned int irq)
  52. {
  53. if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
  54. enable_hd64465_irq(irq);
  55. }
  56. static unsigned int startup_hd64465_irq(unsigned int irq)
  57. {
  58. enable_hd64465_irq(irq);
  59. return 0;
  60. }
  61. static void shutdown_hd64465_irq(unsigned int irq)
  62. {
  63. disable_hd64465_irq(irq);
  64. }
  65. static struct hw_interrupt_type hd64465_irq_type = {
  66. .typename = "HD64465-IRQ",
  67. .startup = startup_hd64465_irq,
  68. .shutdown = shutdown_hd64465_irq,
  69. .enable = enable_hd64465_irq,
  70. .disable = disable_hd64465_irq,
  71. .ack = mask_and_ack_hd64465,
  72. .end = end_hd64465_irq,
  73. };
  74. static irqreturn_t hd64465_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  75. {
  76. printk(KERN_INFO
  77. "HD64465: spurious interrupt, nirr: 0x%x nimr: 0x%x\n",
  78. inw(HD64465_REG_NIRR), inw(HD64465_REG_NIMR));
  79. return IRQ_NONE;
  80. }
  81. /*====================================================*/
  82. /*
  83. * Support for a secondary IRQ demux step. This is necessary
  84. * because the HD64465 presents a very thin interface to the
  85. * PCMCIA bus; a lot of features (such as remapping interrupts)
  86. * normally done in hardware by other PCMCIA host bridges is
  87. * instead done in software.
  88. */
  89. static struct
  90. {
  91. int (*func)(int, void *);
  92. void *dev;
  93. } hd64465_demux[HD64465_IRQ_NUM];
  94. void hd64465_register_irq_demux(int irq,
  95. int (*demux)(int irq, void *dev), void *dev)
  96. {
  97. hd64465_demux[irq - HD64465_IRQ_BASE].func = demux;
  98. hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev;
  99. }
  100. EXPORT_SYMBOL(hd64465_register_irq_demux);
  101. void hd64465_unregister_irq_demux(int irq)
  102. {
  103. hd64465_demux[irq - HD64465_IRQ_BASE].func = 0;
  104. }
  105. EXPORT_SYMBOL(hd64465_unregister_irq_demux);
  106. int hd64465_irq_demux(int irq)
  107. {
  108. if (irq == CONFIG_HD64465_IRQ) {
  109. unsigned short i, bit;
  110. unsigned short nirr = inw(HD64465_REG_NIRR);
  111. unsigned short nimr = inw(HD64465_REG_NIMR);
  112. pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr);
  113. nirr &= ~nimr;
  114. for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++)
  115. if (nirr & bit)
  116. break;
  117. if (i < HD64465_IRQ_NUM) {
  118. irq = HD64465_IRQ_BASE + i;
  119. if (hd64465_demux[i].func != 0)
  120. irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev);
  121. }
  122. }
  123. return irq;
  124. }
  125. static struct irqaction irq0 = { hd64465_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "HD64465", NULL, NULL};
  126. static int __init setup_hd64465(void)
  127. {
  128. int i;
  129. unsigned short rev;
  130. unsigned short smscr;
  131. if (!MACH_HD64465)
  132. return 0;
  133. printk(KERN_INFO "HD64465 configured at 0x%x on irq %d(mapped into %d to %d)\n",
  134. CONFIG_HD64465_IOBASE,
  135. CONFIG_HD64465_IRQ,
  136. HD64465_IRQ_BASE,
  137. HD64465_IRQ_BASE+HD64465_IRQ_NUM-1);
  138. if (inw(HD64465_REG_SDID) != HD64465_SDID) {
  139. printk(KERN_ERR "HD64465 device ID not found, check base address\n");
  140. }
  141. rev = inw(HD64465_REG_SRR);
  142. printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff);
  143. outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */
  144. for (i = 0; i < HD64465_IRQ_NUM ; i++) {
  145. irq_desc[HD64465_IRQ_BASE + i].handler = &hd64465_irq_type;
  146. }
  147. setup_irq(CONFIG_HD64465_IRQ, &irq0);
  148. #ifdef CONFIG_SERIAL
  149. /* wake up the UART from STANDBY at this point */
  150. smscr = inw(HD64465_REG_SMSCR);
  151. outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR);
  152. /* remap IO ports for first ISA serial port to HD64465 UART */
  153. hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1);
  154. #endif
  155. return 0;
  156. }
  157. module_init(setup_hd64465);