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/arch/sh/boards/se/7751/io.c

https://bitbucket.org/evzijst/gittest
C | 244 lines | 169 code | 31 blank | 44 comment | 40 complexity | b3f54b3ef6c177bf5e9fa4cf116a0686 MD5 | raw file
  1/* 
  2 * linux/arch/sh/kernel/io_7751se.c
  3 *
  4 * Copyright (C) 2001  Ian da Silva, Jeremy Siegel
  5 * Based largely on io_se.c.
  6 *
  7 * I/O routine for Hitachi 7751 SolutionEngine.
  8 *
  9 * Initial version only to support LAN access; some
 10 * placeholder code from io_se.c left in with the
 11 * expectation of later SuperIO and PCMCIA access.
 12 */
 13
 14#include <linux/kernel.h>
 15#include <linux/types.h>
 16#include <asm/io.h>
 17#include <asm/se7751/se7751.h>
 18#include <asm/addrspace.h>
 19
 20#include <linux/pci.h>
 21#include "../../../drivers/pci/pci-sh7751.h"
 22
 23#if 0
 24/******************************************************************
 25 * Variables from io_se.c, related to PCMCIA (not PCI); we're not
 26 * compiling them in, and have removed references from functions
 27 * which follow.  [Many checked for IO ports in the range bounded
 28 * by sh_pcic_io_start/stop, and used sh_pcic_io_wbase as offset.
 29 * As start/stop are uninitialized, only port 0x0 would match?]
 30 * When used, remember to adjust names to avoid clash with io_se?
 31 *****************************************************************/
 32/* SH pcmcia io window base, start and end.  */
 33int sh_pcic_io_wbase = 0xb8400000;
 34int sh_pcic_io_start;
 35int sh_pcic_io_stop;
 36int sh_pcic_io_type;
 37int sh_pcic_io_dummy;
 38/*************************************************************/
 39#endif
 40
 41/*
 42 * The 7751 Solution Engine uses the built-in PCI controller (PCIC)
 43 * of the 7751 processor, and has a SuperIO accessible via the PCI.
 44 * The board also includes a PCMCIA controller on its memory bus,
 45 * like the other Solution Engine boards.
 46 */ 
 47
 48#define PCIIOBR		(volatile long *)PCI_REG(SH7751_PCIIOBR)
 49#define PCIMBR          (volatile long *)PCI_REG(SH7751_PCIMBR)
 50#define PCI_IO_AREA	SH7751_PCI_IO_BASE
 51#define PCI_MEM_AREA	SH7751_PCI_CONFIG_BASE
 52
 53#define PCI_IOMAP(adr)	(PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
 54
 55#define maybebadio(name,port) \
 56  printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
 57	 #name, (port), (__u32) __builtin_return_address(0))
 58
 59static inline void delay(void)
 60{
 61	ctrl_inw(0xa0000000);
 62}
 63
 64static inline volatile __u16 *
 65port2adr(unsigned int port)
 66{
 67	if (port >= 0x2000)
 68		return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
 69#if 0
 70	else
 71		return (volatile __u16 *) (PA_SUPERIO + (port << 1));
 72#endif
 73	maybebadio(name,(unsigned long)port);
 74	return (volatile __u16*)port;
 75}
 76
 77#if 0
 78/* The 7751 Solution Engine seems to have everything hooked */
 79/* up pretty normally (nothing on high-bytes only...) so this */
 80/* shouldn't be needed */
 81static inline int
 82shifted_port(unsigned long port)
 83{
 84	/* For IDE registers, value is not shifted */
 85	if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
 86		return 0;
 87	else
 88		return 1;
 89}
 90#endif
 91
 92/* In case someone configures the kernel w/o PCI support: in that */
 93/* scenario, don't ever bother to check for PCI-window addresses */
 94
 95/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
 96#if defined(CONFIG_PCI)
 97#define CHECK_SH7751_PCIIO(port) \
 98  ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
 99#else
100#define CHECK_SH7751_PCIIO(port) (0)
101#endif
102
103/*
104 * General outline: remap really low stuff [eventually] to SuperIO,
105 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
106 * is mapped through the PCI IO window.  Stuff with high bits (PXSEG)
107 * should be way beyond the window, and is used  w/o translation for
108 * compatibility.
109 */
110unsigned char sh7751se_inb(unsigned long port)
111{
112	if (PXSEG(port))
113		return *(volatile unsigned char *)port;
114	else if (CHECK_SH7751_PCIIO(port))
115		return *(volatile unsigned char *)PCI_IOMAP(port);
116	else
117		return (*port2adr(port))&0xff; 
118}
119
120unsigned char sh7751se_inb_p(unsigned long port)
121{
122	unsigned char v;
123
124        if (PXSEG(port))
125                v = *(volatile unsigned char *)port;
126	else if (CHECK_SH7751_PCIIO(port))
127                v = *(volatile unsigned char *)PCI_IOMAP(port);
128	else
129		v = (*port2adr(port))&0xff; 
130	delay();
131	return v;
132}
133
134unsigned short sh7751se_inw(unsigned long port)
135{
136        if (PXSEG(port))
137                return *(volatile unsigned short *)port;
138	else if (CHECK_SH7751_PCIIO(port))
139                return *(volatile unsigned short *)PCI_IOMAP(port);
140	else if (port >= 0x2000)
141		return *port2adr(port);
142	else
143		maybebadio(inw, port);
144	return 0;
145}
146
147unsigned int sh7751se_inl(unsigned long port)
148{
149        if (PXSEG(port))
150                return *(volatile unsigned long *)port;
151	else if (CHECK_SH7751_PCIIO(port))
152                return *(volatile unsigned int *)PCI_IOMAP(port);
153	else if (port >= 0x2000)
154		return *port2adr(port);
155	else
156		maybebadio(inl, port);
157	return 0;
158}
159
160void sh7751se_outb(unsigned char value, unsigned long port)
161{
162
163        if (PXSEG(port))
164                *(volatile unsigned char *)port = value;
165	else if (CHECK_SH7751_PCIIO(port))
166        	*((unsigned char*)PCI_IOMAP(port)) = value;
167	else
168		*(port2adr(port)) = value;
169}
170
171void sh7751se_outb_p(unsigned char value, unsigned long port)
172{
173        if (PXSEG(port))
174                *(volatile unsigned char *)port = value;
175	else if (CHECK_SH7751_PCIIO(port))
176        	*((unsigned char*)PCI_IOMAP(port)) = value;
177	else
178		*(port2adr(port)) = value;
179	delay();
180}
181
182void sh7751se_outw(unsigned short value, unsigned long port)
183{
184        if (PXSEG(port))
185                *(volatile unsigned short *)port = value;
186	else if (CHECK_SH7751_PCIIO(port))
187        	*((unsigned short *)PCI_IOMAP(port)) = value;
188	else if (port >= 0x2000)
189		*port2adr(port) = value;
190	else
191		maybebadio(outw, port);
192}
193
194void sh7751se_outl(unsigned int value, unsigned long port)
195{
196        if (PXSEG(port))
197                *(volatile unsigned long *)port = value;
198	else if (CHECK_SH7751_PCIIO(port))
199        	*((unsigned long*)PCI_IOMAP(port)) = value;
200	else
201		maybebadio(outl, port);
202}
203
204void sh7751se_insl(unsigned long port, void *addr, unsigned long count)
205{
206	maybebadio(insl, port);
207}
208
209void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
210{
211	maybebadio(outsw, port);
212}
213
214/* Map ISA bus address to the real address. Only for PCMCIA.  */
215
216/* ISA page descriptor.  */
217static __u32 sh_isa_memmap[256];
218
219#if 0
220static int
221sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
222{
223	int idx;
224
225	if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
226		return -1;
227
228	idx = start >> 12;
229	sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
230	printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
231	       start, length, offset, idx, sh_isa_memmap[idx]);
232	return 0;
233}
234#endif
235
236unsigned long
237sh7751se_isa_port2addr(unsigned long offset)
238{
239	int idx;
240
241	idx = (offset >> 12) & 0xff;
242	offset &= 0xfff;
243	return sh_isa_memmap[idx] + offset;
244}