/arch/s390/kernel/head.S

https://bitbucket.org/evzijst/gittest · Assembly · 772 lines · 718 code · 26 blank · 28 comment · 11 complexity · 936838501794c4f08b16b7e5e45738dc MD5 · raw file 

    

  1. /*
    2. 

  2.  *  arch/s390/kernel/head.S
    3. 

  3.  *
    4. 

  4.  *  S390 version
    5. 

  5.  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
    6. 

  6.  *    Author(s): Hartmut Penner (hp@de.ibm.com),
    7. 

  7.  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
    8. 

  8.  *               Rob van der Heij (rvdhei@iae.nl)
    9. 

  9.  *
    10. 

  10.  * There are 5 different IPL methods
    11. 

  11.  *  1) load the image directly into ram at address 0 and do an PSW restart
    12. 

  12.  *  2) linload will load the image from address 0x10000 to memory 0x10000
    13. 

  13.  *     and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
    14. 

  14.  *  3) generate the tape ipl header, store the generated image on a tape
    15. 

  15.  *     and ipl from it
    16. 

  16.  *     In case of SL tape you need to IPL 5 times to get past VOL1 etc
    17. 

  17.  *  4) generate the vm reader ipl header, move the generated image to the
    18. 

  18.  *     VM reader (use option NOH!) and do a ipl from reader (VM only)
    19. 

  19.  *  5) direct call of start by the SALIPL loader
    20. 

  20.  *  We use the cpuid to distinguish between VM and native ipl
    21. 

  21.  *  params for kernel are pushed to 0x10400 (see setup.h)
    22. 

    23. 

  23.     Changes: 
    24. 

  24.     Okt 25 2000 <rvdheij@iae.nl>
    25. 

  25. 	added code to skip HDR and EOF to allow SL tape IPL (5 retries)
    26. 

  26. 	changed first CCW from rewind to backspace block
    27. 

    28. 

  28.  */
    29. 

  29. 

  30. #include <linux/config.h>
    31. 

  31. #include <asm/setup.h>
    32. 

  32. #include <asm/lowcore.h>
    33. 

  33. #include <asm/offsets.h>
    34. 

  34. #include <asm/thread_info.h>
    35. 

  35. #include <asm/page.h>
    36. 

  36. 

  37. #ifndef CONFIG_IPL
    38. 

  38.         .org   0
    39. 

  39.         .long  0x00080000,0x80000000+startup   # Just a restart PSW
    40. 

  40. #else
    41. 

  41. #ifdef CONFIG_IPL_TAPE
    42. 

  42. #define IPL_BS 1024
    43. 

  43.         .org   0
    44. 

  44.         .long  0x00080000,0x80000000+iplstart  # The first 24 bytes are loaded
    45. 

  45.         .long  0x27000000,0x60000001           # by ipl to addresses 0-23.
    46. 

  46.         .long  0x02000000,0x20000000+IPL_BS    # (a PSW and two CCWs).
    47. 

  47.         .long  0x00000000,0x00000000           # external old psw
    48. 

  48.         .long  0x00000000,0x00000000           # svc old psw
    49. 

  49.         .long  0x00000000,0x00000000           # program check old psw
    50. 

  50.         .long  0x00000000,0x00000000           # machine check old psw
    51. 

  51.         .long  0x00000000,0x00000000           # io old psw
    52. 

  52.         .long  0x00000000,0x00000000
    53. 

  53.         .long  0x00000000,0x00000000
    54. 

  54.         .long  0x00000000,0x00000000
    55. 

  55.         .long  0x000a0000,0x00000058           # external new psw
    56. 

  56.         .long  0x000a0000,0x00000060           # svc new psw
    57. 

  57.         .long  0x000a0000,0x00000068           # program check new psw
    58. 

  58.         .long  0x000a0000,0x00000070           # machine check new psw
    59. 

  59.         .long  0x00080000,0x80000000+.Lioint   # io new psw
    60. 

  60. 

  61.         .org   0x100
    62. 

  62. #
    63. 

  63. # subroutine for loading from tape
    64. 

  64. # Paramters:	
    65. 

  65. #  R1 = device number
    66. 

  66. #  R2 = load address
    67. 

  67. .Lloader:	
    68. 

  68.         st    %r14,.Lldret
    69. 

  69.         la    %r3,.Lorbread                    # r3 = address of orb 
    70. 

  70. 	la    %r5,.Lirb                        # r5 = address of irb
    71. 

  71.         st    %r2,.Lccwread+4                  # initialize CCW data addresses
    72. 

  72.         lctl  %c6,%c6,.Lcr6               
    73. 

  73.         slr   %r2,%r2
    74. 

  74. .Lldlp:
    75. 

  75.         la    %r6,3                            # 3 retries
    76. 

  76. .Lssch:
    77. 

  77.         ssch  0(%r3)                           # load chunk of IPL_BS bytes
    78. 

  78.         bnz   .Llderr
    79. 

  79. .Lw4end:
    80. 

  80.         bas   %r14,.Lwait4io
    81. 

  81.         tm    8(%r5),0x82                      # do we have a problem ?
    82. 

  82.         bnz   .Lrecov
    83. 

  83.         slr   %r7,%r7
    84. 

  84.         icm   %r7,3,10(%r5)                    # get residual count
    85. 

  85.         lcr   %r7,%r7
    86. 

  86.         la    %r7,IPL_BS(%r7)                  # IPL_BS-residual=#bytes read
    87. 

  87.         ar    %r2,%r7                          # add to total size
    88. 

  88.         tm    8(%r5),0x01                      # found a tape mark ?
    89. 

  89.         bnz   .Ldone
    90. 

  90.         l     %r0,.Lccwread+4                  # update CCW data addresses
    91. 

  91.         ar    %r0,%r7
    92. 

  92.         st    %r0,.Lccwread+4                
    93. 

  93.         b     .Lldlp
    94. 

  94. .Ldone:
    95. 

  95.         l     %r14,.Lldret
    96. 

  96.         br    %r14                             # r2 contains the total size
    97. 

  97. .Lrecov:
    98. 

  98.         bas   %r14,.Lsense                     # do the sensing
    99. 

  99.         bct   %r6,.Lssch                       # dec. retry count & branch
    100. 

  100.         b     .Llderr
    101. 

  101. #
    102. 

  102. # Sense subroutine
    103. 

  103. #
    104. 

  104. .Lsense:
    105. 

  105.         st    %r14,.Lsnsret
    106. 

  106.         la    %r7,.Lorbsense              
    107. 

  107.         ssch  0(%r7)                           # start sense command
    108. 

  108.         bnz   .Llderr
    109. 

  109.         bas   %r14,.Lwait4io
    110. 

  110.         l     %r14,.Lsnsret
    111. 

  111.         tm    8(%r5),0x82                      # do we have a problem ?
    112. 

  112.         bnz   .Llderr
    113. 

  113.         br    %r14
    114. 

  114. #
    115. 

  115. # Wait for interrupt subroutine
    116. 

  116. #
    117. 

  117. .Lwait4io:
    118. 

  118.         lpsw  .Lwaitpsw                 
    119. 

  119. .Lioint:
    120. 

  120.         c     %r1,0xb8                         # compare subchannel number
    121. 

  121.         bne   .Lwait4io
    122. 

  122.         tsch  0(%r5)
    123. 

  123.         slr   %r0,%r0
    124. 

  124.         tm    8(%r5),0x82                      # do we have a problem ?
    125. 

  125.         bnz   .Lwtexit
    126. 

  126.         tm    8(%r5),0x04                      # got device end ?
    127. 

  127.         bz    .Lwait4io
    128. 

  128. .Lwtexit:
    129. 

  129.         br    %r14
    130. 

  130. .Llderr:
    131. 

  131.         lpsw  .Lcrash              
    132. 

  132. 

  133.         .align 8
    134. 

  134. .Lorbread:
    135. 

  135. 	.long  0x00000000,0x0080ff00,.Lccwread
    136. 

  136.         .align 8
    137. 

  137. .Lorbsense:
    138. 

  138.         .long  0x00000000,0x0080ff00,.Lccwsense
    139. 

  139.         .align 8
    140. 

  140. .Lccwread:
    141. 

  141.         .long  0x02200000+IPL_BS,0x00000000
    142. 

  142. .Lccwsense:
    143. 

  143.         .long  0x04200001,0x00000000
    144. 

  144. .Lwaitpsw:
    145. 

  145. 	.long  0x020a0000,0x80000000+.Lioint
    146. 

  146. 

  147. .Lirb:	.long  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
    148. 

  148. .Lcr6:  .long  0xff000000
    149. 

  149.         .align 8
    150. 

  150. .Lcrash:.long  0x000a0000,0x00000000
    151. 

  151. .Lldret:.long  0
    152. 

  152. .Lsnsret: .long 0
    153. 

  153. #endif  /* CONFIG_IPL_TAPE */
    154. 

  154. 

  155. #ifdef CONFIG_IPL_VM
    156. 

  156. #define IPL_BS 0x730
    157. 

  157.         .org   0
    158. 

  158.         .long  0x00080000,0x80000000+iplstart  # The first 24 bytes are loaded
    159. 

  159.         .long  0x02000018,0x60000050           # by ipl to addresses 0-23.
    160. 

  160.         .long  0x02000068,0x60000050           # (a PSW and two CCWs).
    161. 

  161.         .fill  80-24,1,0x40                    # bytes 24-79 are discarded !!
    162. 

  162.         .long  0x020000f0,0x60000050           # The next 160 byte are loaded
    163. 

  163.         .long  0x02000140,0x60000050           # to addresses 0x18-0xb7
    164. 

  164.         .long  0x02000190,0x60000050           # They form the continuation
    165. 

  165.         .long  0x020001e0,0x60000050           # of the CCW program started
    166. 

  166.         .long  0x02000230,0x60000050           # by ipl and load the range
    167. 

  167.         .long  0x02000280,0x60000050           # 0x0f0-0x730 from the image
    168. 

  168.         .long  0x020002d0,0x60000050           # to the range 0x0f0-0x730
    169. 

  169.         .long  0x02000320,0x60000050           # in memory. At the end of
    170. 

  170.         .long  0x02000370,0x60000050           # the channel program the PSW
    171. 

  171.         .long  0x020003c0,0x60000050           # at location 0 is loaded.
    172. 

  172.         .long  0x02000410,0x60000050           # Initial processing starts
    173. 

  173.         .long  0x02000460,0x60000050           # at 0xf0 = iplstart.
    174. 

  174.         .long  0x020004b0,0x60000050
    175. 

  175.         .long  0x02000500,0x60000050
    176. 

  176.         .long  0x02000550,0x60000050
    177. 

  177.         .long  0x020005a0,0x60000050
    178. 

  178.         .long  0x020005f0,0x60000050
    179. 

  179.         .long  0x02000640,0x60000050
    180. 

  180.         .long  0x02000690,0x60000050
    181. 

  181.         .long  0x020006e0,0x20000050
    182. 

  182. 

  183.         .org   0xf0
    184. 

  184. #
    185. 

  185. # subroutine for loading cards from the reader
    186. 

  186. #
    187. 

  187. .Lloader:	
    188. 

  188. 	la    %r3,.Lorb                        # r2 = address of orb into r2
    189. 

  189. 	la    %r5,.Lirb                        # r4 = address of irb
    190. 

  190.         la    %r6,.Lccws              
    191. 

  191.         la    %r7,20
    192. 

  192. .Linit:
    193. 

  193.         st    %r2,4(%r6)                       # initialize CCW data addresses
    194. 

  194.         la    %r2,0x50(%r2)
    195. 

  195.         la    %r6,8(%r6)
    196. 

  196.         bct   7,.Linit
    197. 

  197. 

  198.         lctl  %c6,%c6,.Lcr6                    # set IO subclass mask
    199. 

  199. 	slr   %r2,%r2
    200. 

  200. .Lldlp:
    201. 

  201.         ssch  0(%r3)                           # load chunk of 1600 bytes
    202. 

  202.         bnz   .Llderr
    203. 

  203. .Lwait4irq:
    204. 

  204.         mvc   __LC_IO_NEW_PSW(8),.Lnewpsw      # set up IO interrupt psw
    205. 

  205.         lpsw  .Lwaitpsw              
    206. 

  206. .Lioint:
    207. 

  207.         c     %r1,0xb8                         # compare subchannel number
    208. 

  208. 	bne   .Lwait4irq
    209. 

  209. 	tsch  0(%r5)
    210. 

  210. 

  211. 	slr   %r0,%r0
    212. 

  212. 	ic    %r0,8(%r5)                       # get device status
    213. 

  213. 	chi   %r0,8                            # channel end ?
    214. 

  214. 	be    .Lcont
    215. 

  215. 	chi   %r0,12                           # channel end + device end ?
    216. 

  216. 	be    .Lcont
    217. 

  217. 

  218.         l     %r0,4(%r5)
    219. 

  219.         s     %r0,8(%r3)                       # r0/8 = number of ccws executed
    220. 

  220.         mhi   %r0,10                           # *10 = number of bytes in ccws
    221. 

  221.         lh    %r3,10(%r5)                      # get residual count
    222. 

  222.         sr    %r0,%r3                          # #ccws*80-residual=#bytes read
    223. 

  223. 	ar    %r2,%r0
    224. 

  224. 	
    225. 

  225.         br    %r14                             # r2 contains the total size
    226. 

  226. 

  227. .Lcont:
    228. 

  228. 	ahi   %r2,0x640                        # add 0x640 to total size
    229. 

  229.         la    %r6,.Lccws             
    230. 

  230.         la    %r7,20
    231. 

  231. .Lincr:
    232. 

  232.         l     %r0,4(%r6)                       # update CCW data addresses
    233. 

  233.         ahi   %r0,0x640
    234. 

  234.         st    %r0,4(%r6)
    235. 

  235.         ahi   %r6,8
    236. 

  236.         bct   7,.Lincr
    237. 

  237. 

  238.         b     .Lldlp
    239. 

  239. .Llderr:
    240. 

  240.         lpsw  .Lcrash              
    241. 

  241. 

  242.         .align 8
    243. 

  243. .Lorb:	.long  0x00000000,0x0080ff00,.Lccws
    244. 

  244. .Lirb:	.long  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
    245. 

  245. .Lcr6:  .long  0xff000000
    246. 

  246. .Lloadp:.long  0,0
    247. 

  247.         .align 8
    248. 

  248. .Lcrash:.long  0x000a0000,0x00000000
    249. 

  249. .Lnewpsw:
    250. 

  250.         .long  0x00080000,0x80000000+.Lioint
    251. 

  251. .Lwaitpsw:
    252. 

  252.         .long  0x020a0000,0x80000000+.Lioint
    253. 

  253. 

  254.         .align 8
    255. 

  255. .Lccws: .rept  19
    256. 

  256.         .long  0x02600050,0x00000000
    257. 

  257.         .endr
    258. 

  258.         .long  0x02200050,0x00000000
    259. 

  259. #endif  /* CONFIG_IPL_VM */
    260. 

  260. 

  261. iplstart:
    262. 

  262.         lh    %r1,0xb8                         # test if subchannel number
    263. 

  263.         bct   %r1,.Lnoload                     #  is valid
    264. 

  264. 	l     %r1,0xb8                         # load ipl subchannel number
    265. 

  265.         la    %r2,IPL_BS                       # load start address
    266. 

  266.         bas   %r14,.Lloader                    # load rest of ipl image
    267. 

  267.         l     %r12,.Lparm                      # pointer to parameter area
    268. 

  268.         st    %r1,IPL_DEVICE-PARMAREA(%r12)    # store ipl device number
    269. 

  269. 

  270. #
    271. 

  271. # load parameter file from ipl device
    272. 

  272. #
    273. 

  273. .Lagain1:
    274. 

  274.  	l     %r2,INITRD_START-PARMAREA(%r12)  # use ramdisk location as temp
    275. 

  275.         bas   %r14,.Lloader                    # load parameter file
    276. 

  276.         ltr   %r2,%r2                          # got anything ?
    277. 

  277.         bz    .Lnopf
    278. 

  278. 	chi   %r2,895
    279. 

  279. 	bnh   .Lnotrunc
    280. 

  280. 	la    %r2,895
    281. 

  281. .Lnotrunc:
    282. 

  282. 	l     %r4,INITRD_START-PARMAREA(%r12)
    283. 

  283. 	clc   0(3,%r4),.L_hdr		       # if it is HDRx
    284. 

  284. 	bz    .Lagain1			       # skip dataset header
    285. 

  285. 	clc   0(3,%r4),.L_eof		       # if it is EOFx
    286. 

  286. 	bz    .Lagain1			       # skip dateset trailer
    287. 

  287.         la    %r5,0(%r4,%r2)
    288. 

  288.         lr    %r3,%r2
    289. 

  289. .Lidebc:
    290. 

  290.         tm    0(%r5),0x80                      # high order bit set ?
    291. 

  291.         bo    .Ldocv                           #  yes -> convert from EBCDIC
    292. 

  292.         ahi   %r5,-1
    293. 

  293.         bct   %r3,.Lidebc
    294. 

  294.         b     .Lnocv
    295. 

  295. .Ldocv:
    296. 

  296.         l     %r3,.Lcvtab
    297. 

  297.         tr    0(256,%r4),0(%r3)                # convert parameters to ascii
    298. 

  298.         tr    256(256,%r4),0(%r3)
    299. 

  299.         tr    512(256,%r4),0(%r3)
    300. 

  300.         tr    768(122,%r4),0(%r3)
    301. 

  301. .Lnocv: la    %r3,COMMAND_LINE-PARMAREA(%r12)  # load adr. of command line
    302. 

  302. 	mvc   0(256,%r3),0(%r4)
    303. 

  303. 	mvc   256(256,%r3),256(%r4)
    304. 

  304. 	mvc   512(256,%r3),512(%r4)
    305. 

  305. 	mvc   768(122,%r3),768(%r4)
    306. 

  306.         slr   %r0,%r0
    307. 

  307.         b     .Lcntlp
    308. 

  308. .Ldelspc:
    309. 

  309.         ic    %r0,0(%r2,%r3)
    310. 

  310.         chi   %r0,0x20                         # is it a space ?
    311. 

  311.         be    .Lcntlp
    312. 

  312.         ahi   %r2,1
    313. 

  313.         b     .Leolp
    314. 

  314. .Lcntlp:
    315. 

  315.         brct  %r2,.Ldelspc
    316. 

  316. .Leolp:
    317. 

  317.         slr   %r0,%r0
    318. 

  318.         stc   %r0,0(%r2,%r3)                   # terminate buffer
    319. 

  319. .Lnopf:
    320. 

  320. 

  321. #
    322. 

  322. # load ramdisk from ipl device
    323. 

  323. #	
    324. 

  324. .Lagain2:
    325. 

  325.  	l     %r2,INITRD_START-PARMAREA(%r12)  # load adr. of ramdisk
    326. 

  326.         bas   %r14,.Lloader                    # load ramdisk
    327. 

  327.  	st    %r2,INITRD_SIZE-PARMAREA(%r12)   # store size of ramdisk
    328. 

  328.         ltr   %r2,%r2
    329. 

  329.         bnz   .Lrdcont
    330. 

  330.         st    %r2,INITRD_START-PARMAREA(%r12)  # no ramdisk found, null it
    331. 

  331. .Lrdcont:
    332. 

  332. 	l     %r2,INITRD_START-PARMAREA(%r12)
    333. 

  333. 

  334. 	clc   0(3,%r2),.L_hdr		       # skip HDRx and EOFx 
    335. 

  335. 	bz    .Lagain2
    336. 

  336. 	clc   0(3,%r2),.L_eof
    337. 

  337. 	bz    .Lagain2
    338. 

  338. 

  339. #ifdef CONFIG_IPL_VM
    340. 

  340. #
    341. 

  341. # reset files in VM reader
    342. 

  342. #
    343. 

  343.         stidp __LC_CPUID                       # store cpuid
    344. 

  344. 	tm    __LC_CPUID,0xff                  # running VM ?
    345. 

  345. 	bno   .Lnoreset
    346. 

  346.         la    %r2,.Lreset              
    347. 

  347.         lhi   %r3,26
    348. 

  348.         .long 0x83230008
    349. 

  349. .Lnoreset:
    350. 

  350. #endif
    351. 

  351. 	
    352. 

  352. #
    353. 

  353. # everything loaded, go for it
    354. 

  354. #
    355. 

  355. .Lnoload:
    356. 

  356.         l     %r1,.Lstartup
    357. 

  357.         br    %r1
    358. 

  358. 

  359. .Lparm:	.long  PARMAREA
    360. 

  360. .Lstartup: .long startup
    361. 

  361. .Lcvtab:.long  _ebcasc                         # ebcdic to ascii table
    362. 

  362. .Lreset:.byte  0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
    363. 

  363.         .byte  0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
    364. 

  364.         .byte  0xc8,0xd6,0xd3,0xc4             # "change rdr all keep nohold"
    365. 

  365. .L_eof: .long  0xc5d6c600       /* C'EOF' */
    366. 

  366. .L_hdr: .long  0xc8c4d900       /* C'HDR' */
    367. 

  367. 

  368. #endif  /* CONFIG_IPL */
    369. 

  369. 

  370. #
    371. 

  371. # SALIPL loader support. Based on a patch by Rob van der Heij.
    372. 

  372. # This entry point is called directly from the SALIPL loader and
    373. 

  373. # doesn't need a builtin ipl record.
    374. 

  374. #
    375. 

  375.         .org  0x800
    376. 

  376. 	.globl start
    377. 

  377. start:
    378. 

  378. 	stm   %r0,%r15,0x07b0		# store registers
    379. 

  379. 	basr  %r12,%r0
    380. 

  380. .base:
    381. 

  381. 	l     %r11,.parm
    382. 

  382. 	l     %r8,.cmd			# pointer to command buffer
    383. 

  383. 

  384. 	ltr   %r9,%r9			# do we have SALIPL parameters?
    385. 

  385. 	bp    .sk8x8
    386. 

  386. 

  387. 	mvc   0(64,%r8),0x00b0		# copy saved registers
    388. 

  388. 	xc    64(240-64,%r8),0(%r8)	# remainder of buffer
    389. 

  389. 	tr    0(64,%r8),.lowcase	
    390. 

  390. 	b     .gotr
    391. 

  391. .sk8x8:
    392. 

  392. 	mvc   0(240,%r8),0(%r9)		# copy iplparms into buffer
    393. 

  393. .gotr:
    394. 

  394. 	l     %r10,.tbl			# EBCDIC to ASCII table
    395. 

  395. 	tr    0(240,%r8),0(%r10)
    396. 

  396. 	stidp __LC_CPUID		# Are we running on VM maybe
    397. 

  397. 	cli   __LC_CPUID,0xff
    398. 

  398. 	bnz   .test
    399. 

  399. 	.long 0x83300060		# diag 3,0,x'0060' - storage size
    400. 

  400. 	b     .done
    401. 

  401. .test:
    402. 

  402. 	mvc   0x68(8),.pgmnw		# set up pgm check handler
    403. 

  403. 	l     %r2,.fourmeg
    404. 

  404. 	lr    %r3,%r2
    405. 

  405. 	bctr  %r3,%r0			# 4M-1
    406. 

  406. .loop:  iske  %r0,%r3
    407. 

  407. 	ar    %r3,%r2
    408. 

  408. .pgmx:
    409. 

  409. 	sr    %r3,%r2
    410. 

  410. 	la    %r3,1(%r3)
    411. 

  411. .done:
    412. 

  412.         l     %r1,.memsize
    413. 

  413. 	st    %r3,0(%r1)
    414. 

  414. 	slr   %r0,%r0
    415. 

  415. 	st    %r0,INITRD_SIZE-PARMAREA(%r11)
    416. 

  416. 	st    %r0,INITRD_START-PARMAREA(%r11)
    417. 

  417. 	j     startup                   # continue with startup
    418. 

  418. .tbl:	.long _ebcasc			# translate table
    419. 

  419. .cmd:	.long COMMAND_LINE		# address of command line buffer
    420. 

  420. .parm:	.long PARMAREA
    421. 

  421. .memsize: .long memory_size
    422. 

  422. .fourmeg: .long 0x00400000      	# 4M
    423. 

  423. .pgmnw:	.long 0x00080000,.pgmx
    424. 

  424. .lowcase:
    425. 

  425. 	.byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07 
    426. 

  426. 	.byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
    427. 

  427. 	.byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17 
    428. 

  428. 	.byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
    429. 

  429. 	.byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27 
    430. 

  430. 	.byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
    431. 

  431. 	.byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37 
    432. 

  432. 	.byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
    433. 

  433. 	.byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47 
    434. 

  434. 	.byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
    435. 

  435. 	.byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57 
    436. 

  436. 	.byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
    437. 

  437. 	.byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67 
    438. 

  438. 	.byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
    439. 

  439. 	.byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77 
    440. 

  440. 	.byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
    441. 

  441. 

  442. 	.byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87 
    443. 

  443. 	.byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
    444. 

  444. 	.byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97 
    445. 

  445. 	.byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
    446. 

  446. 	.byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 
    447. 

  447. 	.byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
    448. 

  448. 	.byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7 
    449. 

  449. 	.byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
    450. 

  450. 	.byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87	# .abcdefg 
    451. 

  451. 	.byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf	# hi
    452. 

  452. 	.byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 	# .jklmnop
    453. 

  453. 	.byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf	# qr
    454. 

  454. 	.byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7	# ..stuvwx
    455. 

  455. 	.byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef	# yz
    456. 

  456. 	.byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7 
    457. 

  457. 	.byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
    458. 

  458. 

  459. #
    460. 

  460. # startup-code at 0x10000, running in real mode
    461. 

  461. # this is called either by the ipl loader or directly by PSW restart
    462. 

  462. # or linload or SALIPL
    463. 

  463. #
    464. 

  464.         .org  0x10000
    465. 

  465. startup:basr  %r13,0                     # get base
    466. 

  466. .LPG1:  lctl  %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
    467. 

  467. 	la    %r12,_pstart-.LPG1(%r13)   # pointer to parameter area
    468. 

  468. 					 # move IPL device to lowcore
    469. 

  469.         mvc   __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
    470. 

  470. 	
    471. 

  471. #
    472. 

  472. # clear bss memory
    473. 

  473. #
    474. 

  474.         l     %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
    475. 

  475.         l     %r3,.Lbss_end-.LPG1(%r13) # end of bss
    476. 

  476.         sr    %r3,%r2                   # length of bss
    477. 

  477.         sr    %r4,%r4                   #
    478. 

  478.         sr    %r5,%r5                   # set src,length and pad to zero
    479. 

  479.         sr    %r0,%r0                   #
    480. 

  480.         mvcle %r2,%r4,0                 # clear mem
    481. 

  481.         jo    .-4                       # branch back, if not finish
    482. 

  482. 

  483. 	l     %r2,.Lrcp-.LPG1(%r13)	# Read SCP forced command word
    484. 

  484. .Lservicecall:
    485. 

  485. 	stosm .Lpmask-.LPG1(%r13),0x01	# authorize ext interrupts
    486. 

  486. 

  487. 	stctl %r0, %r0,.Lcr-.LPG1(%r13)	# get cr0
    488. 

  488. 	la    %r1,0x200			# set bit 22
    489. 

  489. 	o     %r1,.Lcr-.LPG1(%r13)	# or old cr0 with r1
    490. 

  490. 	st    %r1,.Lcr-.LPG1(%r13)
    491. 

  491. 	lctl  %r0, %r0,.Lcr-.LPG1(%r13)	# load modified cr0
    492. 

  492. 

  493. 	mvc   __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
    494. 

  494. 	la    %r1, .Lsclph-.LPG1(%r13)
    495. 

  495. 	a     %r1,__LC_EXT_NEW_PSW+4	# set handler
    496. 

  496. 	st    %r1,__LC_EXT_NEW_PSW+4
    497. 

  497. 

  498. 	la    %r4,_pstart-.LPG1(%r13)	# %r4 is our index for sccb stuff
    499. 

  499. 	la    %r1, .Lsccb-PARMAREA(%r4)	# our sccb
    500. 

  500. 	.insn rre,0xb2200000,%r2,%r1	# service call
    501. 

  501. 	ipm   %r1
    502. 

  502. 	srl   %r1,28			# get cc code
    503. 

  503. 	xr    %r3, %r3
    504. 

  504. 	chi   %r1,3
    505. 

  505. 	be    .Lfchunk-.LPG1(%r13)	# leave
    506. 

  506. 	chi   %r1,2
    507. 

  507. 	be    .Lservicecall-.LPG1(%r13)
    508. 

  508. 	lpsw  .Lwaitsclp-.LPG1(%r13)
    509. 

  509. .Lsclph:
    510. 

  510. 	lh    %r1,.Lsccbr-PARMAREA(%r4)
    511. 

  511. 	chi   %r1,0x10			# 0x0010 is the sucess code
    512. 

  512. 	je    .Lprocsccb		# let's process the sccb
    513. 

  513. 	chi   %r1,0x1f0
    514. 

  514. 	bne   .Lfchunk-.LPG1(%r13)	# unhandled error code
    515. 

  515. 	c     %r2, .Lrcp-.LPG1(%r13)	# Did we try Read SCP forced
    516. 

  516. 	bne   .Lfchunk-.LPG1(%r13)	# if no, give up
    517. 

  517. 	l     %r2, .Lrcp2-.LPG1(%r13)	# try with Read SCP
    518. 

  518. 	b     .Lservicecall-.LPG1(%r13)
    519. 

  519. .Lprocsccb:
    520. 

  520. 	lh    %r1,.Lscpincr1-PARMAREA(%r4) # use this one if != 0
    521. 

  521. 	chi   %r1,0x00
    522. 

  522. 	jne   .Lscnd
    523. 

  523. 	l     %r1,.Lscpincr2-PARMAREA(%r4) # otherwise use this one
    524. 

  524. .Lscnd:
    525. 

  525. 	xr    %r3,%r3			# same logic
    526. 

  526. 	ic    %r3,.Lscpa1-PARMAREA(%r4)
    527. 

  527. 	chi   %r3,0x00
    528. 

  528. 	jne   .Lcompmem
    529. 

  529. 	l     %r3,.Lscpa2-PARMAREA(%r13)
    530. 

  530. .Lcompmem:
    531. 

  531. 	mr    %r2,%r1			# mem in MB on 128-bit
    532. 

  532. 	l     %r1,.Lonemb-.LPG1(%r13)
    533. 

  533. 	mr    %r2,%r1			# mem size in bytes in %r3
    534. 

  534. 	b     .Lfchunk-.LPG1(%r13)
    535. 

  535. 

  536. .Lpmask:
    537. 

  537. 	.byte 0
    538. 

  538. .align 8
    539. 

  539. .Lpcext:.long  0x00080000,0x80000000
    540. 

  540. .Lcr:
    541. 

  541. 	.long 0x00			# place holder for cr0
    542. 

  542. .Lwaitsclp:
    543. 

  543. 	.long 0x020A0000
    544. 

  544. 	.long .Lsclph
    545. 

  545. .Lrcp:
    546. 

  546. 	.int 0x00120001			# Read SCP forced code
    547. 

  547. .Lrcp2:
    548. 

  548. 	.int 0x00020001			# Read SCP code
    549. 

  549. .Lonemb:
    550. 

  550. 	.int 0x100000
    551. 

  551. .Lfchunk:
    552. 

  552. 

  553. #
    554. 

  554. # find memory chunks.
    555. 

  555. #
    556. 

  556. 	lr    %r9,%r3			 # end of mem
    557. 

  557. 	mvc   __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
    558. 

  558. 	la    %r1,1                      # test in increments of 128KB
    559. 

  559. 	sll   %r1,17
    560. 

  560. 	l     %r3,.Lmchunk-.LPG1(%r13)   # get pointer to memory_chunk array
    561. 

  561. 	slr   %r4,%r4                    # set start of chunk to zero
    562. 

  562. 	slr   %r5,%r5                    # set end of chunk to zero
    563. 

  563. 	slr   %r6,%r6			 # set access code to zero
    564. 

  564. 	la    %r10, MEMORY_CHUNKS	 # number of chunks
    565. 

  565. .Lloop:
    566. 

  566. 	tprot 0(%r5),0			 # test protection of first byte
    567. 

  567. 	ipm   %r7
    568. 

  568. 	srl   %r7,28
    569. 

  569. 	clr   %r6,%r7			 # compare cc with last access code
    570. 

  570. 	be    .Lsame-.LPG1(%r13)
    571. 

  571. 	b     .Lchkmem-.LPG1(%r13)
    572. 

  572. .Lsame:
    573. 

  573. 	ar    %r5,%r1			 # add 128KB to end of chunk
    574. 

  574. 	bno   .Lloop-.LPG1(%r13)	 # r1 < 0x80000000 -> loop
    575. 

  575. .Lchkmem:				 # > 2GB or tprot got a program check
    576. 

  576. 	clr   %r4,%r5			 # chunk size > 0?
    577. 

  577. 	be    .Lchkloop-.LPG1(%r13)
    578. 

  578. 	st    %r4,0(%r3)		 # store start address of chunk
    579. 

  579. 	lr    %r0,%r5
    580. 

  580. 	slr   %r0,%r4
    581. 

  581. 	st    %r0,4(%r3)		 # store size of chunk
    582. 

  582. 	st    %r6,8(%r3)		 # store type of chunk
    583. 

  583. 	la    %r3,12(%r3)
    584. 

  584. 	l     %r4,.Lmemsize-.LPG1(%r13)	 # address of variable memory_size
    585. 

  585. 	st    %r5,0(%r4)		 # store last end to memory size
    586. 

  586. 	ahi   %r10,-1			 # update chunk number
    587. 

  587. .Lchkloop:
    588. 

  588. 	lr    %r6,%r7			 # set access code to last cc
    589. 

  589. 	# we got an exception or we're starting a new
    590. 

  590. 	# chunk , we must check if we should
    591. 

  591. 	# still try to find valid memory (if we detected
    592. 

  592. 	# the amount of available storage), and if we
    593. 

  593. 	# have chunks left
    594. 

  594. 	xr    %r0,%r0
    595. 

  595. 	clr   %r0,%r9			 # did we detect memory?
    596. 

  596. 	je    .Ldonemem			 # if not, leave
    597. 

  597. 	chi   %r10,0			 # do we have chunks left?
    598. 

  598. 	je    .Ldonemem
    599. 

  599. 	alr   %r5,%r1			 # add 128KB to end of chunk
    600. 

  600. 	lr    %r4,%r5			 # potential new chunk
    601. 

  601. 	clr    %r5,%r9			 # should we go on?
    602. 

  602. 	jl     .Lloop
    603. 

  603. .Ldonemem:		
    604. 

  604.         l      %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
    605. 

  605. #
    606. 

  606. # find out if we are running under VM
    607. 

  607. #
    608. 

  608.         stidp  __LC_CPUID               # store cpuid
    609. 

  609. 	tm     __LC_CPUID,0xff          # running under VM ?
    610. 

  610. 	bno    .Lnovm-.LPG1(%r13)
    611. 

  611.         oi     3(%r12),1                # set VM flag
    612. 

  612. .Lnovm:
    613. 

  613.         lh     %r0,__LC_CPUID+4         # get cpu version
    614. 

  614.         chi    %r0,0x7490               # running on a P/390 ?
    615. 

  615.         bne    .Lnop390-.LPG1(%r13)
    616. 

  616.         oi     3(%r12),4                # set P/390 flag
    617. 

  617. .Lnop390:
    618. 

  618. 

  619. #
    620. 

  620. # find out if we have an IEEE fpu
    621. 

  621. #
    622. 

  622.         mvc    __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
    623. 

  623. 	efpc   %r0,0                    # test IEEE extract fpc instruction
    624. 

  624.         oi     3(%r12),2                # set IEEE fpu flag
    625. 

  625. .Lchkfpu:
    626. 

  626. 

  627. #
    628. 

  628. # find out if we have the CSP instruction
    629. 

  629. #
    630. 

  630.        mvc    __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
    631. 

  631.        la     %r0,0
    632. 

  632.        lr     %r1,%r0
    633. 

  633.        la     %r2,4
    634. 

  634.        csp    %r0,%r2                   # Test CSP instruction
    635. 

  635.        oi     3(%r12),8                 # set CSP flag
    636. 

  636. .Lchkcsp:
    637. 

  637. 

  638. #
    639. 

  639. # find out if we have the MVPG instruction
    640. 

  640. #
    641. 

  641.        mvc    __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
    642. 

  642.        sr     %r0,%r0
    643. 

  643.        la     %r1,0
    644. 

  644.        la     %r2,0
    645. 

  645.        mvpg   %r1,%r2                   # Test CSP instruction
    646. 

  646.        oi     3(%r12),16                # set MVPG flag
    647. 

  647. .Lchkmvpg:
    648. 

  648. 

  649. #
    650. 

  650. # find out if we have the IDTE instruction
    651. 

  651. #
    652. 

  652. 	mvc	__LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
    653. 

  653. 	.long	0xb2b10000		# store facility list
    654. 

  654. 	tm	0xc8,0x08		# check bit for clearing-by-ASCE
    655. 

  655. 	bno	.Lchkidte-.LPG1(%r13)
    656. 

  656. 	lhi	%r1,2094
    657. 

  657. 	lhi	%r2,0
    658. 

  658. 	.long	0xb98e2001
    659. 

  659. 	oi	3(%r12),0x80		# set IDTE flag
    660. 

  660. .Lchkidte:
    661. 

  661. 

  662.         lpsw  .Lentry-.LPG1(13)         # jump to _stext in primary-space,
    663. 

  663.                                         # virtual and never return ...
    664. 

  664.         .align 8
    665. 

  665. .Lentry:.long  0x00080000,0x80000000 + _stext
    666. 

  666. .Lctl:  .long  0x04b50002               # cr0: various things
    667. 

  667.         .long  0                        # cr1: primary space segment table
    668. 

  668.         .long  .Lduct                   # cr2: dispatchable unit control table
    669. 

  669.         .long  0                        # cr3: instruction authorization
    670. 

  670.         .long  0                        # cr4: instruction authorization
    671. 

  671.         .long  0xffffffff               # cr5: primary-aste origin
    672. 

  672.         .long  0                        # cr6:  I/O interrupts
    673. 

  673.         .long  0                        # cr7:  secondary space segment table
    674. 

  674.         .long  0                        # cr8:  access registers translation
    675. 

  675.         .long  0                        # cr9:  tracing off
    676. 

  676.         .long  0                        # cr10: tracing off
    677. 

  677.         .long  0                        # cr11: tracing off
    678. 

  678.         .long  0                        # cr12: tracing off
    679. 

  679.         .long  0                        # cr13: home space segment table
    680. 

  680.         .long  0xc0000000               # cr14: machine check handling off
    681. 

  681.         .long  0                        # cr15: linkage stack operations
    682. 

  682. .Lpcmem:.long  0x00080000,0x80000000 + .Lchkmem
    683. 

  683. .Lpcfpu:.long  0x00080000,0x80000000 + .Lchkfpu
    684. 

  684. .Lpccsp:.long  0x00080000,0x80000000 + .Lchkcsp
    685. 

  685. .Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
    686. 

  686. .Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
    687. 

  687. .Lmemsize:.long memory_size
    688. 

  688. .Lmchunk:.long memory_chunk
    689. 

  689. .Lmflags:.long machine_flags
    690. 

  690. .Lbss_bgn:  .long  __bss_start
    691. 

  691. .Lbss_end:  .long  _end
    692. 

  692. 

  693. 	.org PARMAREA-64
    694. 

  694. .Lduct:	.long 0,0,0,0,0,0,0,0
    695. 

  695. 	.long 0,0,0,0,0,0,0,0
    696. 

  696. 

  697. #
    698. 

  698. # params at 10400 (setup.h)
    699. 

  699. #
    700. 

  700. 	.org   PARMAREA
    701. 

  701. 	.global _pstart
    702. 

  702. _pstart:	
    703. 

  703.         .long  0,0                      # IPL_DEVICE
    704. 

  704.         .long  0,RAMDISK_ORIGIN         # INITRD_START
    705. 

  705.         .long  0,RAMDISK_SIZE           # INITRD_SIZE
    706. 

  706. 

  707.         .org   COMMAND_LINE
    708. 

  708.     	.byte  "root=/dev/ram0 ro"
    709. 

  709.         .byte  0
    710. 

  710. 	.org   0x11000
    711. 

  711. .Lsccb:
    712. 

  712. 	.hword 0x1000			# length, one page
    713. 

  713. 	.byte 0x00,0x00,0x00
    714. 

  714. 	.byte 0x80			# variable response bit set
    715. 

  715. .Lsccbr:
    716. 

  716. 	.hword 0x00			# response code
    717. 

  717. .Lscpincr1:
    718. 

  718. 	.hword 0x00
    719. 

  719. .Lscpa1:
    720. 

  720. 	.byte 0x00
    721. 

  721. 	.fill 89,1,0
    722. 

  722. .Lscpa2:
    723. 

  723. 	.int 0x00
    724. 

  724. .Lscpincr2:
    725. 

  725. 	.quad 0x00
    726. 

  726. 	.fill 3984,1,0
    727. 

  727. 	.org 0x12000
    728. 

  728. 	.global _pend
    729. 

  729. _pend:	
    730. 

  730. 

  731. #ifdef CONFIG_SHARED_KERNEL
    732. 

  732. 	.org   0x100000
    733. 

  733. #endif
    734. 

  734. 

  735. #
    736. 

  736. # startup-code, running in virtual mode
    737. 

  737. #
    738. 

  738.         .globl _stext
    739. 

  739. _stext:	basr  %r13,0                    # get base
    740. 

  740. .LPG2:
    741. 

  741. #
    742. 

  742. # Setup stack
    743. 

  743. #
    744. 

  744.         l     %r15,.Linittu-.LPG2(%r13)
    745. 

  745. 	mvc   __LC_CURRENT(4),__TI_task(%r15)
    746. 

  746.         ahi   %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union + THREAD_SIZE
    747. 

  747.         st    %r15,__LC_KERNEL_STACK    # set end of kernel stack
    748. 

  748.         ahi   %r15,-96
    749. 

  749.         xc    __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
    750. 

  750. 

  751. # check control registers
    752. 

  752.         stctl  %c0,%c15,0(%r15)
    753. 

  753. 	oi     2(%r15),0x20             # enable sigp external interrupts
    754. 

  754. 	oi     0(%r15),0x10             # switch on low address protection
    755. 

  755.         lctl   %c0,%c15,0(%r15)
    756. 

  756. 

  757. #
    758. 

  758.         lam    0,15,.Laregs-.LPG2(%r13) # load access regs needed by uaccess
    759. 

  759.         l      %r14,.Lstart-.LPG2(%r13)
    760. 

  760.         basr   %r14,%r14                # call start_kernel
    761. 

  761. #
    762. 

  762. # We returned from start_kernel ?!? PANIK
    763. 

  763. #
    764. 

  764.         basr  %r13,0
    765. 

  765. 	lpsw  .Ldw-.(%r13)           # load disabled wait psw
    766. 

  766. #
    767. 

  767.             .align 8
    768. 

  768. .Ldw:	    .long  0x000a0000,0x00000000
    769. 

  769. .Linittu:   .long  init_thread_union
    770. 

  770. .Lstart:    .long  start_kernel
    771. 

  771. .Laregs:    .long  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
    772.