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/arch/ppc/platforms/prpmc800.c

https://bitbucket.org/evzijst/gittest
C | 477 lines | 338 code | 73 blank | 66 comment | 40 complexity | 2d52c1410e9b5b926fdbc80e49af12cb MD5 | raw file
  1/*
  2 * arch/ppc/platforms/prpmc800.c
  3 *
  4 * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
  5 *
  6 * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
  7 * the terms of the GNU General Public License version 2.  This program
  8 * is licensed "as is" without any warranty of any kind, whether express
  9 * or implied.
 10 */
 11
 12#include <linux/config.h>
 13#include <linux/stddef.h>
 14#include <linux/kernel.h>
 15#include <linux/init.h>
 16#include <linux/errno.h>
 17#include <linux/reboot.h>
 18#include <linux/pci.h>
 19#include <linux/kdev_t.h>
 20#include <linux/types.h>
 21#include <linux/major.h>
 22#include <linux/initrd.h>
 23#include <linux/console.h>
 24#include <linux/delay.h>
 25#include <linux/irq.h>
 26#include <linux/seq_file.h>
 27#include <linux/ide.h>
 28#include <linux/root_dev.h>
 29#include <linux/harrier_defs.h>
 30
 31#include <asm/byteorder.h>
 32#include <asm/system.h>
 33#include <asm/pgtable.h>
 34#include <asm/page.h>
 35#include <asm/dma.h>
 36#include <asm/io.h>
 37#include <asm/irq.h>
 38#include <asm/machdep.h>
 39#include <asm/time.h>
 40#include <asm/pci-bridge.h>
 41#include <asm/open_pic.h>
 42#include <asm/bootinfo.h>
 43#include <asm/harrier.h>
 44
 45#include "prpmc800.h"
 46
 47#define HARRIER_REVI_REG	(PRPMC800_HARRIER_XCSR_BASE+HARRIER_REVI_OFF)
 48#define HARRIER_UCTL_REG	(PRPMC800_HARRIER_XCSR_BASE+HARRIER_UCTL_OFF)
 49#define HARRIER_MISC_CSR_REG   (PRPMC800_HARRIER_XCSR_BASE+HARRIER_MISC_CSR_OFF)
 50#define HARRIER_IFEVP_REG    (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEVP_OFF)
 51#define HARRIER_IFEDE_REG    (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEDE_OFF)
 52#define HARRIER_FEEN_REG	(PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEEN_OFF)
 53#define HARRIER_FEMA_REG	(PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEMA_OFF)
 54
 55#define HARRIER_VENI_REG	(PRPMC800_HARRIER_XCSR_BASE + HARRIER_VENI_OFF)
 56#define HARRIER_MISC_CSR	(PRPMC800_HARRIER_XCSR_BASE + \
 57				 HARRIER_MISC_CSR_OFF)
 58
 59#define MONARCH	(monarch != 0)
 60#define NON_MONARCH (monarch == 0)
 61
 62extern int mpic_init(void);
 63extern unsigned long loops_per_jiffy;
 64extern void gen550_progress(char *, unsigned short);
 65
 66static int monarch = 0;
 67static int found_self = 0;
 68static int self = 0;
 69
 70static u_char prpmc800_openpic_initsenses[] __initdata =
 71{
 72   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_HOSTINT0 */
 73   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_UNUSED */
 74   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_DEBUGINT */
 75   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_HARRIER_WDT */
 76   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_UNUSED */
 77   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_UNUSED */
 78   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_HOSTINT1 */
 79   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_HOSTINT2 */
 80   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_HOSTINT3 */
 81   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_PMC_INTA */
 82   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_PMC_INTB */
 83   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_PMC_INTC */
 84   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_PMC_INTD */
 85   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_UNUSED */
 86   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_UNUSED */
 87   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_UNUSED */
 88   (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* PRPMC800_INT_HARRIER_INT (UARTS, ABORT, DMA) */
 89};
 90
 91/*
 92 * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
 93 * Combined irq tables.  Only Base has IDSEL 14, only Carrier has 21 and 22.
 94 */
 95static inline int
 96prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
 97{
 98	static char pci_irq_table[][4] =
 99	/*
100	 *      PCI IDSEL/INTPIN->INTLINE
101	 *      A       B       C       D
102	 */
103	{
104		{12,	0,	0,	0},  /* IDSEL 14 - Ethernet, base */
105		{0,	0,	0,	0},  /* IDSEL 15 - unused */
106		{10,	11,	12,	9},  /* IDSEL 16 - PMC A1, PMC1 */
107		{10,	11,	12,	9},  /* IDSEL 17 - PrPMC-A-B, PMC2-B */
108		{11,	12,	9,	10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
109		{0,	0,	0,	0},  /* IDSEL 19 - unused */
110		{9,	10,	11,	12}, /* IDSEL 20 - P2P Bridge */
111		{11,	12,	9,	10}, /* IDSEL 21 - PMC A2, carrier */
112		{12,	9,	10,	11}, /* IDSEL 22 - PMC A2-B, carrier */
113	};
114	const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
115	return PCI_IRQ_TABLE_LOOKUP;
116};
117
118static int
119prpmc_read_config_dword(struct pci_controller *hose, u8 bus, u8 devfn,
120			int offset, u32 * val)
121{
122	/* paranoia */
123	if ((hose == NULL) ||
124	    (hose->cfg_addr == NULL) || (hose->cfg_data == NULL))
125		return PCIBIOS_DEVICE_NOT_FOUND;
126
127	out_be32(hose->cfg_addr, ((offset & 0xfc) << 24) | (devfn << 16)
128		 | ((bus - hose->bus_offset) << 8) | 0x80);
129	*val = in_le32((u32 *) (hose->cfg_data + (offset & 3)));
130
131	return PCIBIOS_SUCCESSFUL;
132}
133
134#define HARRIER_PCI_VEND_DEV_ID	(PCI_VENDOR_ID_MOTOROLA | \
135				 (PCI_DEVICE_ID_MOTOROLA_HARRIER << 16))
136static int prpmc_self(u8 bus, u8 devfn)
137{
138	/*
139	 * Harriers always view themselves as being on bus 0. If we're not
140	 * looking at bus 0, we're not going to find ourselves.
141	 */
142	if (bus != 0)
143		return PCIBIOS_DEVICE_NOT_FOUND;
144	else {
145		int result;
146		int val;
147		struct pci_controller *hose;
148
149		hose = pci_bus_to_hose(bus);
150
151		/* See if target device is a Harrier */
152		result = prpmc_read_config_dword(hose, bus, devfn,
153						 PCI_VENDOR_ID, &val);
154		if ((result != PCIBIOS_SUCCESSFUL) ||
155		    (val != HARRIER_PCI_VEND_DEV_ID))
156			return PCIBIOS_DEVICE_NOT_FOUND;
157
158		/*
159		 * LBA bit is set if target Harrier == initiating Harrier
160		 * (i.e. if we are reading our own PCI header).
161		 */
162		result = prpmc_read_config_dword(hose, bus, devfn,
163						 HARRIER_LBA_OFF, &val);
164		if ((result != PCIBIOS_SUCCESSFUL) ||
165		    ((val & HARRIER_LBA_MSK) != HARRIER_LBA_MSK))
166			return PCIBIOS_DEVICE_NOT_FOUND;
167
168		/* It's us, save our location for later */
169		self = devfn;
170		found_self = 1;
171		return PCIBIOS_SUCCESSFUL;
172	}
173}
174
175static int prpmc_exclude_device(u8 bus, u8 devfn)
176{
177	/*
178	 * Monarch is allowed to access all PCI devices. Non-monarch is
179	 * only allowed to access its own Harrier.
180	 */
181
182	if (MONARCH)
183		return PCIBIOS_SUCCESSFUL;
184	if (found_self)
185		if ((bus == 0) && (devfn == self))
186			return PCIBIOS_SUCCESSFUL;
187		else
188			return PCIBIOS_DEVICE_NOT_FOUND;
189	else
190		return prpmc_self(bus, devfn);
191}
192
193void __init prpmc800_find_bridges(void)
194{
195	struct pci_controller *hose;
196	int host_bridge;
197
198	hose = pcibios_alloc_controller();
199	if (!hose)
200		return;
201
202	hose->first_busno = 0;
203	hose->last_busno = 0xff;
204
205	ppc_md.pci_exclude_device = prpmc_exclude_device;
206	ppc_md.pcibios_fixup = NULL;
207	ppc_md.pcibios_fixup_bus = NULL;
208	ppc_md.pci_swizzle = common_swizzle;
209	ppc_md.pci_map_irq = prpmc_map_irq;
210
211	setup_indirect_pci(hose,
212			   PRPMC800_PCI_CONFIG_ADDR, PRPMC800_PCI_CONFIG_DATA);
213
214	/* Get host bridge vendor/dev id */
215
216	host_bridge = in_be32((uint *) (HARRIER_VENI_REG));
217
218	if (host_bridge != HARRIER_VEND_DEV_ID) {
219		printk(KERN_CRIT "Host bridge 0x%x not supported\n",
220				host_bridge);
221		return;
222	}
223
224	monarch = in_be32((uint *) HARRIER_MISC_CSR) & HARRIER_SYSCON;
225
226	printk(KERN_INFO "Running as %s.\n",
227			MONARCH ? "Monarch" : "Non-Monarch");
228
229	hose->io_space.start = PRPMC800_PCI_IO_START;
230	hose->io_space.end = PRPMC800_PCI_IO_END;
231	hose->io_base_virt = (void *)PRPMC800_ISA_IO_BASE;
232	hose->pci_mem_offset = PRPMC800_PCI_PHY_MEM_OFFSET;
233
234	pci_init_resource(&hose->io_resource,
235			  PRPMC800_PCI_IO_START, PRPMC800_PCI_IO_END,
236			  IORESOURCE_IO, "PCI host bridge");
237
238	if (MONARCH) {
239		hose->mem_space.start = PRPMC800_PCI_MEM_START;
240		hose->mem_space.end = PRPMC800_PCI_MEM_END;
241
242		pci_init_resource(&hose->mem_resources[0],
243				  PRPMC800_PCI_MEM_START,
244				  PRPMC800_PCI_MEM_END,
245				  IORESOURCE_MEM, "PCI host bridge");
246
247		if (harrier_init(hose,
248				 PRPMC800_HARRIER_XCSR_BASE,
249				 PRPMC800_PROC_PCI_MEM_START,
250				 PRPMC800_PROC_PCI_MEM_END,
251				 PRPMC800_PROC_PCI_IO_START,
252				 PRPMC800_PROC_PCI_IO_END,
253				 PRPMC800_HARRIER_MPIC_BASE) != 0)
254			printk(KERN_CRIT "Could not initialize HARRIER "
255					 "bridge\n");
256
257		harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
258		harrier_wait_eready(PRPMC800_HARRIER_XCSR_BASE);
259		hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
260
261	} else {
262		pci_init_resource(&hose->mem_resources[0],
263				  PRPMC800_NM_PCI_MEM_START,
264				  PRPMC800_NM_PCI_MEM_END,
265				  IORESOURCE_MEM, "PCI host bridge");
266
267		hose->mem_space.start = PRPMC800_NM_PCI_MEM_START;
268		hose->mem_space.end = PRPMC800_NM_PCI_MEM_END;
269
270		if (harrier_init(hose,
271				 PRPMC800_HARRIER_XCSR_BASE,
272				 PRPMC800_NM_PROC_PCI_MEM_START,
273				 PRPMC800_NM_PROC_PCI_MEM_END,
274				 PRPMC800_PROC_PCI_IO_START,
275				 PRPMC800_PROC_PCI_IO_END,
276				 PRPMC800_HARRIER_MPIC_BASE) != 0)
277			printk(KERN_CRIT "Could not initialize HARRIER "
278					 "bridge\n");
279
280		harrier_setup_nonmonarch(PRPMC800_HARRIER_XCSR_BASE,
281					 HARRIER_ITSZ_1MB);
282		harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
283	}
284}
285
286static int prpmc800_show_cpuinfo(struct seq_file *m)
287{
288	seq_printf(m, "machine\t\t: PrPMC800\n");
289
290	return 0;
291}
292
293static void __init prpmc800_setup_arch(void)
294{
295	/* init to some ~sane value until calibrate_delay() runs */
296	loops_per_jiffy = 50000000 / HZ;
297
298	/* Lookup PCI host bridges */
299	prpmc800_find_bridges();
300
301#ifdef CONFIG_BLK_DEV_INITRD
302	if (initrd_start)
303		ROOT_DEV = Root_RAM0;
304	else
305#endif
306#ifdef CONFIG_ROOT_NFS
307		ROOT_DEV = Root_NFS;
308#else
309		ROOT_DEV = Root_SDA2;
310#endif
311
312	printk(KERN_INFO "Port by MontaVista Software, Inc. "
313			 "(source@mvista.com)\n");
314}
315
316/*
317 * Compute the PrPMC800's tbl frequency using the baud clock as a reference.
318 */
319static void __init prpmc800_calibrate_decr(void)
320{
321	unsigned long tbl_start, tbl_end;
322	unsigned long current_state, old_state, tb_ticks_per_second;
323	unsigned int count;
324	unsigned int harrier_revision;
325
326	harrier_revision = readb(HARRIER_REVI_REG);
327	if (harrier_revision < 2) {
328		/* XTAL64 was broken in harrier revision 1 */
329		printk(KERN_INFO "time_init: Harrier revision %d, assuming "
330				 "100 Mhz bus\n", harrier_revision);
331		tb_ticks_per_second = 100000000 / 4;
332		tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
333		tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
334		return;
335	}
336
337	/*
338	 * The XTAL64 bit oscillates at the 1/64 the base baud clock
339	 * Set count to XTAL64 cycles per second.  Since we'll count
340	 * half-cycles, we'll reach the count in half a second.
341	 */
342	count = PRPMC800_BASE_BAUD / 64;
343
344	/* Find the first edge of the baud clock */
345	old_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
346	do {
347		current_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
348	} while (old_state == current_state);
349
350	old_state = current_state;
351
352	/* Get the starting time base value */
353	tbl_start = get_tbl();
354
355	/*
356	 * Loop until we have found a number of edges (half-cycles)
357	 * equal to the count (half a second)
358	 */
359	do {
360		do {
361			current_state = readb(HARRIER_UCTL_REG) &
362			    HARRIER_XTAL64_MASK;
363		} while (old_state == current_state);
364		old_state = current_state;
365	} while (--count);
366
367	/* Get the ending time base value */
368	tbl_end = get_tbl();
369
370	/* We only counted for half a second, so double to get ticks/second */
371	tb_ticks_per_second = (tbl_end - tbl_start) * 2;
372	tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
373	tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
374}
375
376static void prpmc800_restart(char *cmd)
377{
378	ulong temp;
379
380	local_irq_disable();
381	temp = in_be32((uint *) HARRIER_MISC_CSR_REG);
382	temp |= HARRIER_RSTOUT;
383	out_be32((uint *) HARRIER_MISC_CSR_REG, temp);
384	while (1) ;
385}
386
387static void prpmc800_halt(void)
388{
389	local_irq_disable();
390	while (1) ;
391}
392
393static void prpmc800_power_off(void)
394{
395	prpmc800_halt();
396}
397
398static void __init prpmc800_init_IRQ(void)
399{
400	OpenPIC_InitSenses = prpmc800_openpic_initsenses;
401	OpenPIC_NumInitSenses = sizeof(prpmc800_openpic_initsenses);
402
403	/* Setup external interrupt sources. */
404	openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
405	/* Setup internal UART interrupt source. */
406	openpic_set_sources(16, 1, OpenPIC_Addr + 0x10200);
407
408	/* Do the MPIC initialization based on the above settings. */
409	openpic_init(0);
410
411	/* enable functional exceptions for uarts and abort */
412	out_8((u8 *) HARRIER_FEEN_REG, (HARRIER_FE_UA0 | HARRIER_FE_UA1));
413	out_8((u8 *) HARRIER_FEMA_REG, ~(HARRIER_FE_UA0 | HARRIER_FE_UA1));
414}
415
416/*
417 * Set BAT 3 to map 0xf0000000 to end of physical memory space.
418 */
419static __inline__ void prpmc800_set_bat(void)
420{
421	mb();
422	mtspr(SPRN_DBAT1U, 0xf0001ffe);
423	mtspr(SPRN_DBAT1L, 0xf000002a);
424	mb();
425}
426
427/*
428 * We need to read the Harrier memory controller
429 * to properly determine this value
430 */
431static unsigned long __init prpmc800_find_end_of_memory(void)
432{
433	/* Read the memory size from the Harrier XCSR */
434	return harrier_get_mem_size(PRPMC800_HARRIER_XCSR_BASE);
435}
436
437static void __init prpmc800_map_io(void)
438{
439	io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
440	io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
441}
442
443void __init
444platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
445	      unsigned long r6, unsigned long r7)
446{
447	parse_bootinfo(find_bootinfo());
448
449	prpmc800_set_bat();
450
451	isa_io_base = PRPMC800_ISA_IO_BASE;
452	isa_mem_base = PRPMC800_ISA_MEM_BASE;
453	pci_dram_offset = PRPMC800_PCI_DRAM_OFFSET;
454
455	ppc_md.setup_arch = prpmc800_setup_arch;
456	ppc_md.show_cpuinfo = prpmc800_show_cpuinfo;
457	ppc_md.init_IRQ = prpmc800_init_IRQ;
458	ppc_md.get_irq = openpic_get_irq;
459
460	ppc_md.find_end_of_memory = prpmc800_find_end_of_memory;
461	ppc_md.setup_io_mappings = prpmc800_map_io;
462
463	ppc_md.restart = prpmc800_restart;
464	ppc_md.power_off = prpmc800_power_off;
465	ppc_md.halt = prpmc800_halt;
466
467	/* PrPMC800 has no timekeeper part */
468	ppc_md.time_init = NULL;
469	ppc_md.get_rtc_time = NULL;
470	ppc_md.set_rtc_time = NULL;
471	ppc_md.calibrate_decr = prpmc800_calibrate_decr;
472#ifdef  CONFIG_SERIAL_TEXT_DEBUG
473	ppc_md.progress = gen550_progress;
474#else				/* !CONFIG_SERIAL_TEXT_DEBUG */
475	ppc_md.progress = NULL;
476#endif				/* CONFIG_SERIAL_TEXT_DEBUG */
477}