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/arch/ppc/platforms/85xx/mpc8560_ads.c

https://bitbucket.org/evzijst/gittest
C | 210 lines | 135 code | 35 blank | 40 comment | 7 complexity | 4a8bd01c0cd20069426bd12a414ae7ab MD5 | raw file
  1/*
  2 * arch/ppc/platforms/85xx/mpc8560_ads.c
  3 *
  4 * MPC8560ADS board specific routines
  5 *
  6 * Maintainer: Kumar Gala <kumar.gala@freescale.com>
  7 *
  8 * Copyright 2004 Freescale Semiconductor Inc.
  9 *
 10 * This program is free software; you can redistribute  it and/or modify it
 11 * under  the terms of  the GNU General  Public License as published by the
 12 * Free Software Foundation;  either version 2 of the  License, or (at your
 13 * option) any later version.
 14 */
 15
 16#include <linux/config.h>
 17#include <linux/stddef.h>
 18#include <linux/kernel.h>
 19#include <linux/init.h>
 20#include <linux/errno.h>
 21#include <linux/reboot.h>
 22#include <linux/pci.h>
 23#include <linux/kdev_t.h>
 24#include <linux/major.h>
 25#include <linux/console.h>
 26#include <linux/delay.h>
 27#include <linux/irq.h>
 28#include <linux/seq_file.h>
 29#include <linux/root_dev.h>
 30#include <linux/serial.h>
 31#include <linux/tty.h>	/* for linux/serial_core.h */
 32#include <linux/serial_core.h>
 33#include <linux/initrd.h>
 34#include <linux/module.h>
 35#include <linux/fsl_devices.h>
 36
 37#include <asm/system.h>
 38#include <asm/pgtable.h>
 39#include <asm/page.h>
 40#include <asm/atomic.h>
 41#include <asm/time.h>
 42#include <asm/io.h>
 43#include <asm/machdep.h>
 44#include <asm/prom.h>
 45#include <asm/open_pic.h>
 46#include <asm/bootinfo.h>
 47#include <asm/pci-bridge.h>
 48#include <asm/mpc85xx.h>
 49#include <asm/irq.h>
 50#include <asm/immap_85xx.h>
 51#include <asm/kgdb.h>
 52#include <asm/ppc_sys.h>
 53#include <asm/cpm2.h>
 54#include <mm/mmu_decl.h>
 55
 56#include <syslib/cpm2_pic.h>
 57#include <syslib/ppc85xx_common.h>
 58#include <syslib/ppc85xx_setup.h>
 59
 60extern void cpm2_reset(void);
 61
 62/* ************************************************************************
 63 *
 64 * Setup the architecture
 65 *
 66 */
 67
 68static void __init
 69mpc8560ads_setup_arch(void)
 70{
 71	bd_t *binfo = (bd_t *) __res;
 72	unsigned int freq;
 73	struct gianfar_platform_data *pdata;
 74
 75	cpm2_reset();
 76
 77	/* get the core frequency */
 78	freq = binfo->bi_intfreq;
 79
 80	if (ppc_md.progress)
 81		ppc_md.progress("mpc8560ads_setup_arch()", 0);
 82
 83	/* Set loops_per_jiffy to a half-way reasonable value,
 84	   for use until calibrate_delay gets called. */
 85	loops_per_jiffy = freq / HZ;
 86
 87#ifdef CONFIG_PCI
 88	/* setup PCI host bridges */
 89	mpc85xx_setup_hose();
 90#endif
 91
 92	/* setup the board related information for the enet controllers */
 93	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
 94	pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
 95	pdata->interruptPHY = MPC85xx_IRQ_EXT5;
 96	pdata->phyid = 0;
 97	/* fixup phy address */
 98	pdata->phy_reg_addr += binfo->bi_immr_base;
 99	memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
100
101	pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
102	pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
103	pdata->interruptPHY = MPC85xx_IRQ_EXT5;
104	pdata->phyid = 1;
105	/* fixup phy address */
106	pdata->phy_reg_addr += binfo->bi_immr_base;
107	memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
108
109#ifdef CONFIG_BLK_DEV_INITRD
110	if (initrd_start)
111		ROOT_DEV = Root_RAM0;
112	else
113#endif
114#ifdef  CONFIG_ROOT_NFS
115		ROOT_DEV = Root_NFS;
116#else
117		ROOT_DEV = Root_HDA1;
118#endif
119}
120
121static irqreturn_t cpm2_cascade(int irq, void *dev_id, struct pt_regs *regs)
122{
123	while ((irq = cpm2_get_irq(regs)) >= 0)
124		__do_IRQ(irq, regs);
125	return IRQ_HANDLED;
126}
127
128static struct irqaction cpm2_irqaction = {
129	.handler = cpm2_cascade,
130	.flags = SA_INTERRUPT,
131	.mask = CPU_MASK_NONE,
132	.name = "cpm2_cascade",
133};
134
135static void __init
136mpc8560_ads_init_IRQ(void)
137{
138	/* Setup OpenPIC */
139	mpc85xx_ads_init_IRQ();
140
141	/* Setup CPM2 PIC */
142        cpm2_init_IRQ();
143
144	setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
145
146	return;
147}
148
149
150
151/* ************************************************************************ */
152void __init
153platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
154	      unsigned long r6, unsigned long r7)
155{
156	/* parse_bootinfo must always be called first */
157	parse_bootinfo(find_bootinfo());
158
159	/*
160	 * If we were passed in a board information, copy it into the
161	 * residual data area.
162	 */
163	if (r3) {
164		memcpy((void *) __res, (void *) (r3 + KERNELBASE),
165		       sizeof (bd_t));
166
167	}
168#if defined(CONFIG_BLK_DEV_INITRD)
169	/*
170	 * If the init RAM disk has been configured in, and there's a valid
171	 * starting address for it, set it up.
172	 */
173	if (r4) {
174		initrd_start = r4 + KERNELBASE;
175		initrd_end = r5 + KERNELBASE;
176	}
177#endif				/* CONFIG_BLK_DEV_INITRD */
178
179	/* Copy the kernel command line arguments to a safe place. */
180
181	if (r6) {
182		*(char *) (r7 + KERNELBASE) = 0;
183		strcpy(cmd_line, (char *) (r6 + KERNELBASE));
184	}
185
186	identify_ppc_sys_by_id(mfspr(SPRN_SVR));
187
188	/* setup the PowerPC module struct */
189	ppc_md.setup_arch = mpc8560ads_setup_arch;
190	ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
191
192	ppc_md.init_IRQ = mpc8560_ads_init_IRQ;
193	ppc_md.get_irq = openpic_get_irq;
194
195	ppc_md.restart = mpc85xx_restart;
196	ppc_md.power_off = mpc85xx_power_off;
197	ppc_md.halt = mpc85xx_halt;
198
199	ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
200
201	ppc_md.time_init = NULL;
202	ppc_md.set_rtc_time = NULL;
203	ppc_md.get_rtc_time = NULL;
204	ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
205
206	if (ppc_md.progress)
207		ppc_md.progress("mpc8560ads_init(): exit", 0);
208
209	return;
210}