/arch/ppc/platforms/83xx/mpc834x_sys.c

https://bitbucket.org/evzijst/gittest · C · 289 lines · 193 code · 49 blank · 47 comment · 7 complexity · 2e6339501d5734761e0ccfce2ef3eba9 MD5 · raw file

  1. /*
  2. * arch/ppc/platforms/83xx/mpc834x_sys.c
  3. *
  4. * MPC834x SYS board specific routines
  5. *
  6. * Maintainer: Kumar Gala <kumar.gala@freescale.com>
  7. *
  8. * Copyright 2005 Freescale Semiconductor Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. */
  15. #include <linux/config.h>
  16. #include <linux/stddef.h>
  17. #include <linux/kernel.h>
  18. #include <linux/init.h>
  19. #include <linux/errno.h>
  20. #include <linux/reboot.h>
  21. #include <linux/pci.h>
  22. #include <linux/kdev_t.h>
  23. #include <linux/major.h>
  24. #include <linux/console.h>
  25. #include <linux/delay.h>
  26. #include <linux/irq.h>
  27. #include <linux/seq_file.h>
  28. #include <linux/root_dev.h>
  29. #include <linux/serial.h>
  30. #include <linux/tty.h> /* for linux/serial_core.h */
  31. #include <linux/serial_core.h>
  32. #include <linux/initrd.h>
  33. #include <linux/module.h>
  34. #include <linux/fsl_devices.h>
  35. #include <asm/system.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/page.h>
  38. #include <asm/atomic.h>
  39. #include <asm/time.h>
  40. #include <asm/io.h>
  41. #include <asm/machdep.h>
  42. #include <asm/prom.h>
  43. #include <asm/ipic.h>
  44. #include <asm/bootinfo.h>
  45. #include <asm/pci-bridge.h>
  46. #include <asm/mpc83xx.h>
  47. #include <asm/irq.h>
  48. #include <asm/kgdb.h>
  49. #include <asm/ppc_sys.h>
  50. #include <mm/mmu_decl.h>
  51. #include <syslib/ppc83xx_setup.h>
  52. #ifndef CONFIG_PCI
  53. unsigned long isa_io_base = 0;
  54. unsigned long isa_mem_base = 0;
  55. #endif
  56. extern unsigned long total_memory; /* in mm/init */
  57. unsigned char __res[sizeof (bd_t)];
  58. #ifdef CONFIG_PCI
  59. #error "PCI is not supported"
  60. /* NEED mpc83xx_map_irq & mpc83xx_exclude_device
  61. see platforms/85xx/mpc85xx_ads_common.c */
  62. #endif /* CONFIG_PCI */
  63. /* ************************************************************************
  64. *
  65. * Setup the architecture
  66. *
  67. */
  68. static void __init
  69. mpc834x_sys_setup_arch(void)
  70. {
  71. bd_t *binfo = (bd_t *) __res;
  72. unsigned int freq;
  73. struct gianfar_platform_data *pdata;
  74. /* get the core frequency */
  75. freq = binfo->bi_intfreq;
  76. /* Set loops_per_jiffy to a half-way reasonable value,
  77. for use until calibrate_delay gets called. */
  78. loops_per_jiffy = freq / HZ;
  79. #ifdef CONFIG_PCI
  80. /* setup PCI host bridges */
  81. mpc83xx_sys_setup_hose();
  82. #endif
  83. mpc83xx_early_serial_map();
  84. /* setup the board related information for the enet controllers */
  85. pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
  86. pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
  87. pdata->interruptPHY = MPC83xx_IRQ_EXT1;
  88. pdata->phyid = 0;
  89. /* fixup phy address */
  90. pdata->phy_reg_addr += binfo->bi_immr_base;
  91. memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
  92. pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
  93. pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
  94. pdata->interruptPHY = MPC83xx_IRQ_EXT2;
  95. pdata->phyid = 1;
  96. /* fixup phy address */
  97. pdata->phy_reg_addr += binfo->bi_immr_base;
  98. memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
  99. #ifdef CONFIG_BLK_DEV_INITRD
  100. if (initrd_start)
  101. ROOT_DEV = Root_RAM0;
  102. else
  103. #endif
  104. #ifdef CONFIG_ROOT_NFS
  105. ROOT_DEV = Root_NFS;
  106. #else
  107. ROOT_DEV = Root_HDA1;
  108. #endif
  109. }
  110. static void __init
  111. mpc834x_sys_map_io(void)
  112. {
  113. /* we steal the lowest ioremap addr for virt space */
  114. io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
  115. io_block_mapping(BCSR_VIRT_ADDR, BCSR_PHYS_ADDR, BCSR_SIZE, _PAGE_IO);
  116. }
  117. int
  118. mpc834x_sys_show_cpuinfo(struct seq_file *m)
  119. {
  120. uint pvid, svid, phid1;
  121. bd_t *binfo = (bd_t *) __res;
  122. unsigned int freq;
  123. /* get the core frequency */
  124. freq = binfo->bi_intfreq;
  125. pvid = mfspr(SPRN_PVR);
  126. svid = mfspr(SPRN_SVR);
  127. seq_printf(m, "Vendor\t\t: Freescale Inc.\n");
  128. seq_printf(m, "Machine\t\t: mpc%s sys\n", cur_ppc_sys_spec->ppc_sys_name);
  129. seq_printf(m, "core clock\t: %d MHz\n"
  130. "bus clock\t: %d MHz\n",
  131. (int)(binfo->bi_intfreq / 1000000),
  132. (int)(binfo->bi_busfreq / 1000000));
  133. seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
  134. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  135. /* Display cpu Pll setting */
  136. phid1 = mfspr(SPRN_HID1);
  137. seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
  138. /* Display the amount of memory */
  139. seq_printf(m, "Memory\t\t: %d MB\n", (int)(binfo->bi_memsize / (1024 * 1024)));
  140. return 0;
  141. }
  142. void __init
  143. mpc834x_sys_init_IRQ(void)
  144. {
  145. bd_t *binfo = (bd_t *) __res;
  146. u8 senses[8] = {
  147. 0, /* EXT 0 */
  148. IRQ_SENSE_LEVEL, /* EXT 1 */
  149. IRQ_SENSE_LEVEL, /* EXT 2 */
  150. 0, /* EXT 3 */
  151. 0, /* EXT 4 */
  152. 0, /* EXT 5 */
  153. 0, /* EXT 6 */
  154. 0, /* EXT 7 */
  155. };
  156. ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
  157. /* Initialize the default interrupt mapping priorities,
  158. * in case the boot rom changed something on us.
  159. */
  160. ipic_set_default_priority();
  161. }
  162. static __inline__ void
  163. mpc834x_sys_set_bat(void)
  164. {
  165. /* we steal the lowest ioremap addr for virt space */
  166. mb();
  167. mtspr(SPRN_DBAT1U, VIRT_IMMRBAR | 0x1e);
  168. mtspr(SPRN_DBAT1L, immrbar | 0x2a);
  169. mb();
  170. }
  171. void __init
  172. platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
  173. unsigned long r6, unsigned long r7)
  174. {
  175. bd_t *binfo = (bd_t *) __res;
  176. /* parse_bootinfo must always be called first */
  177. parse_bootinfo(find_bootinfo());
  178. /*
  179. * If we were passed in a board information, copy it into the
  180. * residual data area.
  181. */
  182. if (r3) {
  183. memcpy((void *) __res, (void *) (r3 + KERNELBASE),
  184. sizeof (bd_t));
  185. }
  186. #if defined(CONFIG_BLK_DEV_INITRD)
  187. /*
  188. * If the init RAM disk has been configured in, and there's a valid
  189. * starting address for it, set it up.
  190. */
  191. if (r4) {
  192. initrd_start = r4 + KERNELBASE;
  193. initrd_end = r5 + KERNELBASE;
  194. }
  195. #endif /* CONFIG_BLK_DEV_INITRD */
  196. /* Copy the kernel command line arguments to a safe place. */
  197. if (r6) {
  198. *(char *) (r7 + KERNELBASE) = 0;
  199. strcpy(cmd_line, (char *) (r6 + KERNELBASE));
  200. }
  201. immrbar = binfo->bi_immr_base;
  202. mpc834x_sys_set_bat();
  203. #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
  204. {
  205. struct uart_port p;
  206. memset(&p, 0, sizeof (p));
  207. p.iotype = SERIAL_IO_MEM;
  208. p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
  209. p.uartclk = binfo->bi_busfreq;
  210. gen550_init(0, &p);
  211. memset(&p, 0, sizeof (p));
  212. p.iotype = SERIAL_IO_MEM;
  213. p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
  214. p.uartclk = binfo->bi_busfreq;
  215. gen550_init(1, &p);
  216. }
  217. #endif
  218. identify_ppc_sys_by_id(mfspr(SPRN_SVR));
  219. /* setup the PowerPC module struct */
  220. ppc_md.setup_arch = mpc834x_sys_setup_arch;
  221. ppc_md.show_cpuinfo = mpc834x_sys_show_cpuinfo;
  222. ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
  223. ppc_md.get_irq = ipic_get_irq;
  224. ppc_md.restart = mpc83xx_restart;
  225. ppc_md.power_off = mpc83xx_power_off;
  226. ppc_md.halt = mpc83xx_halt;
  227. ppc_md.find_end_of_memory = mpc83xx_find_end_of_memory;
  228. ppc_md.setup_io_mappings = mpc834x_sys_map_io;
  229. ppc_md.time_init = mpc83xx_time_init;
  230. ppc_md.set_rtc_time = NULL;
  231. ppc_md.get_rtc_time = NULL;
  232. ppc_md.calibrate_decr = mpc83xx_calibrate_decr;
  233. ppc_md.early_serial_map = mpc83xx_early_serial_map;
  234. #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
  235. ppc_md.progress = gen550_progress;
  236. #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
  237. if (ppc_md.progress)
  238. ppc_md.progress("mpc834x_sys_init(): exit", 0);
  239. return;
  240. }