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/arch/ppc/platforms/4xx/luan.h

https://bitbucket.org/evzijst/gittest
C Header | 80 lines | 43 code | 13 blank | 24 comment | 0 complexity | 4942519781de57a6ba97b688c56ade79 MD5 | raw file
 1/*
 2 * arch/ppc/platforms/4xx/luan.h
 3 *
 4 * Luan board definitions
 5 *
 6 * Matt Porter <mporter@kernel.crashing.org>
 7 *
 8 * Copyright 2004-2005 MontaVista Software Inc.
 9 *
10 * This program is free software; you can redistribute  it and/or modify it
11 * under  the terms of  the GNU General  Public License as published by the
12 * Free Software Foundation;  either version 2 of the  License, or (at your
13 * option) any later version.
14 *
15 */
16
17#ifdef __KERNEL__
18#ifndef __ASM_LUAN_H__
19#define __ASM_LUAN_H__
20
21#include <linux/config.h>
22#include <platforms/4xx/ibm440sp.h>
23
24/* F/W TLB mapping used in bootloader glue to reset EMAC */
25#define PPC44x_EMAC0_MR0	0xa0000800
26
27/* Location of MAC addresses in PIBS image */
28#define PIBS_FLASH_BASE		0xffe00000
29#define PIBS_MAC_BASE		(PIBS_FLASH_BASE+0x1b0400)
30
31/* External timer clock frequency */
32#define LUAN_TMR_CLK		25000000
33
34/* Flash */
35#define LUAN_FPGA_REG_0			0x0000000148300000ULL
36#define LUAN_BOOT_LARGE_FLASH(x)	(x & 0x40)
37#define LUAN_SMALL_FLASH_LOW		0x00000001ff900000ULL
38#define LUAN_SMALL_FLASH_HIGH		0x00000001ffe00000ULL
39#define LUAN_SMALL_FLASH_SIZE		0x100000
40#define LUAN_LARGE_FLASH_LOW		0x00000001ff800000ULL
41#define LUAN_LARGE_FLASH_HIGH		0x00000001ffc00000ULL
42#define LUAN_LARGE_FLASH_SIZE		0x400000
43
44/*
45 * Serial port defines
46 */
47#define RS_TABLE_SIZE	3
48
49/* PIBS defined UART mappings, used before early_serial_setup */
50#define UART0_IO_BASE	0xa0000200
51#define UART1_IO_BASE	0xa0000300
52#define UART2_IO_BASE	0xa0000600
53
54#define BASE_BAUD	11059200
55#define STD_UART_OP(num)					\
56	{ 0, BASE_BAUD, 0, UART##num##_INT,			\
57		(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST),	\
58		iomem_base: UART##num##_IO_BASE,		\
59		io_type: SERIAL_IO_MEM},
60
61#define SERIAL_PORT_DFNS	\
62	STD_UART_OP(0)		\
63	STD_UART_OP(1)		\
64	STD_UART_OP(2)
65
66/* PCI support */
67#define LUAN_PCIX_LOWER_IO	0x00000000
68#define LUAN_PCIX_UPPER_IO	0x0000ffff
69#define LUAN_PCIX0_LOWER_MEM	0x80000000
70#define LUAN_PCIX0_UPPER_MEM	0x9fffffff
71#define LUAN_PCIX1_LOWER_MEM	0xa0000000
72#define LUAN_PCIX1_UPPER_MEM	0xbfffffff
73#define LUAN_PCIX2_LOWER_MEM	0xc0000000
74#define LUAN_PCIX2_UPPER_MEM	0xdfffffff
75
76#define LUAN_PCIX_MEM_SIZE	0x20000000
77#define LUAN_PCIX_MEM_OFFSET	0x00000000
78
79#endif				/* __ASM_LUAN_H__ */
80#endif				/* __KERNEL__ */