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/arch/mips/sgi-ip27/ip27-console.c

https://bitbucket.org/evzijst/gittest
C | 76 lines | 52 code | 13 blank | 11 comment | 3 complexity | ffaa4d4fc01fa5352e273bd2b68749f2 MD5 | raw file
 1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 2001, 2002 Ralf Baechle
 7 */
 8#include <linux/init.h>
 9#include <linux/console.h>
10#include <linux/kdev_t.h>
11#include <linux/major.h>
12#include <linux/termios.h>
13#include <linux/sched.h>
14#include <linux/tty.h>
15
16#include <asm/page.h>
17#include <asm/semaphore.h>
18#include <asm/sn/addrs.h>
19#include <asm/sn/sn0/hub.h>
20#include <asm/sn/klconfig.h>
21#include <asm/sn/ioc3.h>
22#include <asm/sn/sn_private.h>
23
24#include <linux/serial.h>
25#include <linux/serial_core.h>
26
27#define IOC3_CLK	(22000000 / 3)
28#define IOC3_FLAGS	(0)
29
30static inline struct ioc3_uartregs *console_uart(void)
31{
32	struct ioc3 *ioc3;
33
34	ioc3 = (struct ioc3 *)KL_CONFIG_CH_CONS_INFO(get_nasid())->memory_base;
35
36	return &ioc3->sregs.uarta;
37}
38
39void prom_putchar(char c)
40{
41	struct ioc3_uartregs *uart = console_uart();
42
43	while ((uart->iu_lsr & 0x20) == 0);
44	uart->iu_thr = c;
45}
46
47char __init prom_getchar(void)
48{
49	return 0;
50}
51
52static void inline ioc3_console_probe(void)
53{
54	struct uart_port up;
55
56	/*
57	 * Register to interrupt zero because we share the interrupt with
58	 * the serial driver which we don't properly support yet.
59	 */
60	memset(&up, 0, sizeof(up));
61	up.membase	= (unsigned char *) console_uart();
62	up.irq		= 0;
63	up.uartclk	= IOC3_CLK;
64	up.regshift	= 0;
65	up.iotype	= UPIO_MEM;
66	up.flags	= IOC3_FLAGS;
67	up.line		= 0;
68
69	if (early_serial_setup(&up))
70		printk(KERN_ERR "Early serial init of port 0 failed\n");
71}
72
73__init void ip27_setup_console(void)
74{
75	ioc3_console_probe();
76}