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/arch/mips/pci/fixup-ocelot3.c

https://bitbucket.org/evzijst/gittest
C | 41 lines | 22 code | 4 blank | 15 comment | 16 complexity | 7e427761b9e8318ac0810c8a611494e3 MD5 | raw file
 1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 2004 Montavista Software Inc.
 7 * Author: Manish Lachwani (mlachwani@mvista.com)
 8 *
 9 * Looking at the schematics for the Ocelot-3 board, there are
10 * two PCI busses and each bus has two PCI slots.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <asm/mipsregs.h>
16
17/*
18 * Do platform specific device initialization at
19 * pci_enable_device() time
20 */
21int pcibios_plat_dev_init(struct pci_dev *dev)
22{
23	return 0;
24}
25
26int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
27{
28	int bus = dev->bus->number;
29
30	if (bus == 0 && slot == 1)
31		return 2;	/* PCI-X A */
32	if (bus == 0 && slot == 2)
33		return 3;	/* PCI-X B */
34	if (bus == 1 && slot == 1)
35		return 4;	/* PCI A */
36	if (bus == 1 && slot == 2)
37		return 5;	/* PCI B */
38
39return 0;
40	panic("Whooops in pcibios_map_irq");
41}