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/arch/mips/lib-64/watch.S

https://bitbucket.org/evzijst/gittest
Assembly | 57 lines | 52 code | 5 blank | 0 comment | 2 complexity | 8ffa191916ea8cec538d8a780fd7394f MD5 | raw file
 1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Kernel debug stuff to use the Watch registers.
 7 * Useful to find stack overflows, dangling pointers etc.
 8 *
 9 * Copyright (C) 1995, 1996, 1999, 2001 by Ralf Baechle
10 */
11#include <asm/asm.h>
12#include <asm/mipsregs.h>
13#include <asm/regdef.h>
14
15		.set	noreorder
16/*
17 * Parameter: a0 - physical address to watch
18 *            a1 - set bit #1 to trap on load references
19 *                     bit #0 to trap on store references
20 * Results  : none
21 */
22		LEAF(__watch_set)
23		ori	a0, 7
24		xori	a0, 7
25		or	a0, a1
26		mtc0	a0, CP0_WATCHLO
27		sd	a0, watch_savelo
28		dsrl32	a0, a0, 0
29
30		jr	ra
31		 mtc0	zero, CP0_WATCHHI
32		END(__watch_set)
33
34/*
35 * Parameter: none
36 * Results  : none
37 */
38		LEAF(__watch_clear)
39		jr	ra
40		 mtc0	zero, CP0_WATCHLO
41		END(__watch_clear)
42
43/*
44 * Parameter: none
45 * Results  : none
46 */
47		LEAF(__watch_reenable)
48		ld	t0, watch_savelo
49		jr	ra
50		 mtc0	t0, CP0_WATCHLO
51		END(__watch_reenable)
52
53/*
54 * Saved value of the c0_watchlo register for watch_reenable()
55 */
56		.local	watch_savelo
57		.comm	watch_savelo, 8, 8