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/arch/mips/lasat/lasatIRQ.S

https://bitbucket.org/evzijst/gittest
Assembly | 69 lines | 60 code | 9 blank | 0 comment | 2 complexity | 75f70f064e22f8918ef6b30d86156bfb MD5 | raw file
 1/*
 2 * Carsten Langgaard, carstenl@mips.com
 3 * Copyright (C) 1999, 2000 MIPS Technologies, Inc.  All rights reserved.
 4 *
 5 *  This program is free software; you can distribute it and/or modify it
 6 *  under the terms of the GNU General Public License (Version 2) as
 7 *  published by the Free Software Foundation.
 8 *
 9 *  This program is distributed in the hope it will be useful, but WITHOUT
10 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 *  for more details.
13 *
14 *  You should have received a copy of the GNU General Public License along
15 *  with this program; if not, write to the Free Software Foundation, Inc.,
16 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Interrupt exception dispatch code.
19 */
20#include <asm/asm.h>
21#include <asm/mipsregs.h>
22#include <asm/regdef.h>
23#include <asm/stackframe.h>
24
25	.text
26	.set	noreorder
27	.align	5
28	NESTED(lasatIRQ, PT_SIZE, sp)
29	.set	noat
30	SAVE_ALL
31	CLI
32	.set	at
33	.set	noreorder
34
35	mfc0	s0, CP0_CAUSE		# get irq mask
36
37	/* First we check for r4k counter/timer IRQ. */
38	andi	a0, s0, CAUSEF_IP7
39	beq	a0, zero, 1f
40	 andi	a0, s0, CAUSEF_IP2	# delay slot, check hw0 interrupt
41
42	/* Wheee, a timer interrupt. */
43	li	a0, 7
44	jal	ll_timer_interrupt
45	 move	a1, sp
46
47	j	ret_from_irq
48	 nop
49
501:
51	/* Wheee, combined hardware level zero interrupt. */
52	jal	lasat_hw0_irqdispatch
53	 move	a0, sp			# delay slot
54
55	j	ret_from_irq
56	 nop				# delay slot
57
581:
59	/*
60	 * Here by mistake?  This is possible, what can happen is that by the
61	 * time we take the exception the IRQ pin goes low, so just leave if
62	 * this is the case.
63	 */
64	move	a1,s0
65	mfc0	a1, CP0_EPC
66
67	j	ret_from_irq
68	 nop
69	END(lasatIRQ)