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/arch/m32r/boot/compressed/head.S

https://bitbucket.org/evzijst/gittest
Assembly | 172 lines | 153 code | 17 blank | 2 comment | 2 complexity | 4b31367f32f63f6300acb10c9f81c863 MD5 | raw file
  1/*
  2 *  linux/arch/m32r/boot/compressed/head.S
  3 *
  4 *  Copyright (c) 2001-2003	Hiroyuki Kondo, Hirokazu Takata,
  5 *				Hitoshi Yamamoto, Takeo Takahashi
  6 *  Copyright (c) 2004		Hirokazu Takata
  7 */
  8
  9	.text
 10#include <linux/config.h>
 11#include <linux/linkage.h>
 12#include <asm/addrspace.h>
 13#include <asm/page.h>
 14#include <asm/assembler.h>
 15
 16	/*
 17	 * This code can be loaded anywhere, as long as output will not
 18	 * overlap it.
 19	 *
 20	 * NOTE: This head.S should *NOT* be compiled with -fpic.
 21	 *
 22	 */
 23
 24	.global	startup
 25	.global __bss_start, _ebss, end, zimage_data, zimage_len
 26	__ALIGN
 27startup:
 28	ldi	r0, #0x0000			/* SPI, disable EI */
 29	mvtc	r0, psw
 30
 31	ldi	r12, #-8
 32	bl	1f
 33	.fillinsn
 341:
 35	seth	r1, #high(CONFIG_MEMORY_START + 0x00400000) /* Start address */
 36	add	r12, r14				/* Real address */
 37	sub	r12, r1					/* difference */
 38
 39	.global got_len
 40	seth	r3, #high(_GLOBAL_OFFSET_TABLE_+8)
 41	or3	r3, r3, #low(_GLOBAL_OFFSET_TABLE_+12)
 42	add	r3, r14
 43
 44	/* Update the contents of global offset table */
 45	ldi	r1, #low(got_len)
 46	srli	r1, #2
 47	beqz	r1, 2f
 48	.fillinsn
 491:
 50	ld	r2, @r3
 51	add	r2, r12
 52	st	r2, @r3
 53	addi	r3, #4
 54	addi	r1, #-1
 55	bnez	r1, 1b
 56	.fillinsn
 572:
 58	/* XXX: resolve plt */
 59
 60/*
 61 * Clear BSS first so that there are no surprises...
 62 */
 63#ifdef CONFIG_ISA_DUAL_ISSUE
 64	seth	r2, #high(__bss_start)
 65	or3	r2, r2, #low(__bss_start)
 66	add	r2, r12
 67	seth	r3, #high(_ebss)
 68	or3	r3, r3, #low(_ebss)
 69	add	r3, r12
 70	sub	r3, r2
 71
 72	; R4 = BSS size in longwords (rounded down)
 73	mv	r4, r3		    ||	ldi	r1, #0
 74	srli	r4, #4		    ||	addi	r2, #-4
 75	beqz	r4, .Lendloop1
 76.Lloop1:
 77#ifndef CONFIG_CHIP_M32310
 78	; Touch memory for the no-write-allocating cache.
 79	ld	r0, @(4,r2)
 80#endif
 81	st	r1, @+r2	    ||	addi	r4, #-1
 82	st	r1, @+r2
 83	st	r1, @+r2
 84	st	r1, @+r2	    ||	cmpeq	r1, r4	; R4 = 0?
 85	bnc	.Lloop1
 86.Lendloop1:
 87	and3	r4, r3, #15
 88	addi	r2, #4
 89	beqz	r4, .Lendloop2
 90.Lloop2:
 91	stb	r1, @r2		    ||	addi	r4, #-1
 92	addi	r2, #1
 93	bnez	r4, .Lloop2
 94.Lendloop2:
 95
 96#else /* not CONFIG_ISA_DUAL_ISSUE */
 97	seth	r2, #high(__bss_start)
 98	or3	r2, r2, #low(__bss_start)
 99	add	r2, r12
100	seth	r3, #high(_ebss)
101	or3	r3, r3, #low(_ebss)
102	add	r3, r12
103	sub	r3, r2
104	mv	r4, r3
105	srli	r4, #2		; R4 = BSS size in longwords (rounded down)
106	ldi	r1, #0		; clear R1 for longwords store
107	addi	r2, #-4		; account for pre-inc store
108	beqz	r4, .Lendloop1	; any more to go?
109.Lloop1:
110	st	r1, @+r2	; yep, zero out another longword
111	addi	r4, #-1		; decrement count
112	bnez	r4, .Lloop1	; go do some more
113.Lendloop1:
114
115#endif /* not CONFIG_ISA_DUAL_ISSUE */
116
117	seth	r1, #high(end)
118	or3	r1, r1, #low(end)
119	add	r1, r12
120	mv	sp, r1
121
122/*
123 * decompress the kernel
124 */
125	mv	r0, sp
126	srli	r0, 31				/* MMU is ON or OFF */
127        seth	r1, #high(zimage_data)
128        or3	r1, r1, #low(zimage_data)
129	add	r1, r12
130        seth	r2, #high(zimage_len)
131        or3	r2, r2, #low(zimage_len)
132	mv	r3, sp
133
134	bl	decompress_kernel
135
136#if defined(CONFIG_CHIP_M32700) || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_VDEC2)
137	/* Cache flush */
138	ldi	r0, -1
139	ldi	r1, 0xd0	; invalidate i-cache, copy back d-cache
140	stb	r1, @r0
141#elif defined(CONFIG_CHIP_M32102)
142	/* Cache flush */
143	ldi	r0, -2
144	ldi	r1, 0x0100	; invalidate
145	stb	r1, @r0
146#else
147#error "put your cache flush function, please"
148#endif
149
150	mv	r0, sp
151	srli	r0, 31				/* MMU is ON or OFF */
152	slli	r0, 31
153	or3	r0, r0, #0x2000
154	seth	r1, #high(CONFIG_MEMORY_START)
155	or	r0, r1
156	jmp	r0
157
158	.balign 512
159fake_headers_as_bzImage:
160	.short	0
161	.ascii	"HdrS"
162	.short	0x0202
163	.short	0
164	.short	0
165	.byte	0x00, 0x10
166	.short	0
167	.byte	0
168	.byte	1
169	.byte	0x00, 0x80
170	.long	0
171	.long	0
172