/arch/i386/pci/pci.h

 1/*
 2 *	Low-Level PCI Access for i386 machines.
 3 *
 4 *	(c) 1999 Martin Mares <mj@ucw.cz>
 5 */
 6
 7#undef DEBUG
 8
 9#ifdef DEBUG
10#define DBG(x...) printk(x)
11#else
12#define DBG(x...)
13#endif
14
15#define PCI_PROBE_BIOS		0x0001
16#define PCI_PROBE_CONF1		0x0002
17#define PCI_PROBE_CONF2		0x0004
18#define PCI_PROBE_MMCONF	0x0008
19#define PCI_PROBE_MASK		0x000f
20
21#define PCI_NO_SORT		0x0100
22#define PCI_BIOS_SORT		0x0200
23#define PCI_NO_CHECKS		0x0400
24#define PCI_USE_PIRQ_MASK	0x0800
25#define PCI_ASSIGN_ROMS		0x1000
26#define PCI_BIOS_IRQ_SCAN	0x2000
27#define PCI_ASSIGN_ALL_BUSSES	0x4000
28
29extern unsigned int pci_probe;
30
31/* pci-i386.c */
32
33extern unsigned int pcibios_max_latency;
34
35void pcibios_resource_survey(void);
36int pcibios_enable_resources(struct pci_dev *, int);
37
38/* pci-pc.c */
39
40extern int pcibios_last_bus;
41extern struct pci_bus *pci_root_bus;
42extern struct pci_ops pci_root_ops;
43
44/* pci-irq.c */
45
46struct irq_info {
47	u8 bus, devfn;			/* Bus, device and function */
48	struct {
49		u8 link;		/* IRQ line ID, chipset dependent, 0=not routed */
50		u16 bitmap;		/* Available IRQs */
51	} __attribute__((packed)) irq[4];
52	u8 slot;			/* Slot number, 0=onboard */
53	u8 rfu;
54} __attribute__((packed));
55
56struct irq_routing_table {
57	u32 signature;			/* PIRQ_SIGNATURE should be here */
58	u16 version;			/* PIRQ_VERSION */
59	u16 size;			/* Table size in bytes */
60	u8 rtr_bus, rtr_devfn;		/* Where the interrupt router lies */
61	u16 exclusive_irqs;		/* IRQs devoted exclusively to PCI usage */
62	u16 rtr_vendor, rtr_device;	/* Vendor and device ID of interrupt router */
63	u32 miniport_data;		/* Crap */
64	u8 rfu[11];
65	u8 checksum;			/* Modulo 256 checksum must give zero */
66	struct irq_info slots[0];
67} __attribute__((packed));
68
69extern unsigned int pcibios_irq_mask;
70
71extern int pcibios_scanned;
72extern spinlock_t pci_config_lock;
73
74extern int (*pcibios_enable_irq)(struct pci_dev *dev);