/arch/i386/pci/common.c

https://bitbucket.org/evzijst/gittest · C · 251 lines · 188 code · 34 blank · 29 comment · 64 complexity · 27317eed4bde9766a9b065dcf28010ce MD5 · raw file

  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <asm/acpi.h>
  11. #include <asm/segment.h>
  12. #include <asm/io.h>
  13. #include <asm/smp.h>
  14. #include "pci.h"
  15. #ifdef CONFIG_PCI_BIOS
  16. extern void pcibios_sort(void);
  17. #endif
  18. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  19. PCI_PROBE_MMCONF;
  20. int pci_routeirq;
  21. int pcibios_last_bus = -1;
  22. struct pci_bus *pci_root_bus = NULL;
  23. struct pci_raw_ops *raw_pci_ops;
  24. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  25. {
  26. return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
  27. }
  28. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  29. {
  30. return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
  31. }
  32. struct pci_ops pci_root_ops = {
  33. .read = pci_read,
  34. .write = pci_write,
  35. };
  36. /*
  37. * legacy, numa, and acpi all want to call pcibios_scan_root
  38. * from their initcalls. This flag prevents that.
  39. */
  40. int pcibios_scanned;
  41. /*
  42. * This interrupt-safe spinlock protects all accesses to PCI
  43. * configuration space.
  44. */
  45. DEFINE_SPINLOCK(pci_config_lock);
  46. /*
  47. * Several buggy motherboards address only 16 devices and mirror
  48. * them to next 16 IDs. We try to detect this `feature' on all
  49. * primary buses (those containing host bridges as they are
  50. * expected to be unique) and remove the ghost devices.
  51. */
  52. static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
  53. {
  54. struct list_head *ln, *mn;
  55. struct pci_dev *d, *e;
  56. int mirror = PCI_DEVFN(16,0);
  57. int seen_host_bridge = 0;
  58. int i;
  59. DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
  60. list_for_each(ln, &b->devices) {
  61. d = pci_dev_b(ln);
  62. if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
  63. seen_host_bridge++;
  64. for (mn=ln->next; mn != &b->devices; mn=mn->next) {
  65. e = pci_dev_b(mn);
  66. if (e->devfn != d->devfn + mirror ||
  67. e->vendor != d->vendor ||
  68. e->device != d->device ||
  69. e->class != d->class)
  70. continue;
  71. for(i=0; i<PCI_NUM_RESOURCES; i++)
  72. if (e->resource[i].start != d->resource[i].start ||
  73. e->resource[i].end != d->resource[i].end ||
  74. e->resource[i].flags != d->resource[i].flags)
  75. continue;
  76. break;
  77. }
  78. if (mn == &b->devices)
  79. return;
  80. }
  81. if (!seen_host_bridge)
  82. return;
  83. printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
  84. ln = &b->devices;
  85. while (ln->next != &b->devices) {
  86. d = pci_dev_b(ln->next);
  87. if (d->devfn >= mirror) {
  88. list_del(&d->global_list);
  89. list_del(&d->bus_list);
  90. kfree(d);
  91. } else
  92. ln = ln->next;
  93. }
  94. }
  95. /*
  96. * Called after each bus is probed, but before its children
  97. * are examined.
  98. */
  99. void __devinit pcibios_fixup_bus(struct pci_bus *b)
  100. {
  101. pcibios_fixup_ghosts(b);
  102. pci_read_bridge_bases(b);
  103. }
  104. struct pci_bus * __devinit pcibios_scan_root(int busnum)
  105. {
  106. struct pci_bus *bus = NULL;
  107. while ((bus = pci_find_next_bus(bus)) != NULL) {
  108. if (bus->number == busnum) {
  109. /* Already scanned */
  110. return bus;
  111. }
  112. }
  113. printk("PCI: Probing PCI hardware (bus %02x)\n", busnum);
  114. return pci_scan_bus(busnum, &pci_root_ops, NULL);
  115. }
  116. extern u8 pci_cache_line_size;
  117. static int __init pcibios_init(void)
  118. {
  119. struct cpuinfo_x86 *c = &boot_cpu_data;
  120. if (!raw_pci_ops) {
  121. printk("PCI: System does not support PCI\n");
  122. return 0;
  123. }
  124. /*
  125. * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
  126. * and P4. It's also good for 386/486s (which actually have 16)
  127. * as quite a few PCI devices do not support smaller values.
  128. */
  129. pci_cache_line_size = 32 >> 2;
  130. if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
  131. pci_cache_line_size = 64 >> 2; /* K7 & K8 */
  132. else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
  133. pci_cache_line_size = 128 >> 2; /* P4 */
  134. pcibios_resource_survey();
  135. #ifdef CONFIG_PCI_BIOS
  136. if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
  137. pcibios_sort();
  138. #endif
  139. return 0;
  140. }
  141. subsys_initcall(pcibios_init);
  142. char * __devinit pcibios_setup(char *str)
  143. {
  144. if (!strcmp(str, "off")) {
  145. pci_probe = 0;
  146. return NULL;
  147. }
  148. #ifdef CONFIG_PCI_BIOS
  149. else if (!strcmp(str, "bios")) {
  150. pci_probe = PCI_PROBE_BIOS;
  151. return NULL;
  152. } else if (!strcmp(str, "nobios")) {
  153. pci_probe &= ~PCI_PROBE_BIOS;
  154. return NULL;
  155. } else if (!strcmp(str, "nosort")) {
  156. pci_probe |= PCI_NO_SORT;
  157. return NULL;
  158. } else if (!strcmp(str, "biosirq")) {
  159. pci_probe |= PCI_BIOS_IRQ_SCAN;
  160. return NULL;
  161. }
  162. #endif
  163. #ifdef CONFIG_PCI_DIRECT
  164. else if (!strcmp(str, "conf1")) {
  165. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  166. return NULL;
  167. }
  168. else if (!strcmp(str, "conf2")) {
  169. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  170. return NULL;
  171. }
  172. #endif
  173. #ifdef CONFIG_PCI_MMCONFIG
  174. else if (!strcmp(str, "nommconf")) {
  175. pci_probe &= ~PCI_PROBE_MMCONF;
  176. return NULL;
  177. }
  178. #endif
  179. else if (!strcmp(str, "noacpi")) {
  180. acpi_noirq_set();
  181. return NULL;
  182. }
  183. #ifndef CONFIG_X86_VISWS
  184. else if (!strcmp(str, "usepirqmask")) {
  185. pci_probe |= PCI_USE_PIRQ_MASK;
  186. return NULL;
  187. } else if (!strncmp(str, "irqmask=", 8)) {
  188. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  189. return NULL;
  190. } else if (!strncmp(str, "lastbus=", 8)) {
  191. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  192. return NULL;
  193. }
  194. #endif
  195. else if (!strcmp(str, "rom")) {
  196. pci_probe |= PCI_ASSIGN_ROMS;
  197. return NULL;
  198. } else if (!strcmp(str, "assign-busses")) {
  199. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  200. return NULL;
  201. } else if (!strcmp(str, "routeirq")) {
  202. pci_routeirq = 1;
  203. return NULL;
  204. }
  205. return str;
  206. }
  207. unsigned int pcibios_assign_all_busses(void)
  208. {
  209. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  210. }
  211. int pcibios_enable_device(struct pci_dev *dev, int mask)
  212. {
  213. int err;
  214. if ((err = pcibios_enable_resources(dev, mask)) < 0)
  215. return err;
  216. return pcibios_enable_irq(dev);
  217. }