PageRenderTime 21ms CodeModel.GetById 7ms app.highlight 11ms RepoModel.GetById 1ms app.codeStats 0ms

/arch/i386/pci/common.c

https://bitbucket.org/evzijst/gittest
C | 251 lines | 188 code | 34 blank | 29 comment | 64 complexity | 27317eed4bde9766a9b065dcf28010ce MD5 | raw file
  1/*
  2 *	Low-Level PCI Support for PC
  3 *
  4 *	(c) 1999--2000 Martin Mares <mj@ucw.cz>
  5 */
  6
  7#include <linux/sched.h>
  8#include <linux/pci.h>
  9#include <linux/ioport.h>
 10#include <linux/init.h>
 11
 12#include <asm/acpi.h>
 13#include <asm/segment.h>
 14#include <asm/io.h>
 15#include <asm/smp.h>
 16
 17#include "pci.h"
 18
 19#ifdef CONFIG_PCI_BIOS
 20extern  void pcibios_sort(void);
 21#endif
 22
 23unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
 24				PCI_PROBE_MMCONF;
 25
 26int pci_routeirq;
 27int pcibios_last_bus = -1;
 28struct pci_bus *pci_root_bus = NULL;
 29struct pci_raw_ops *raw_pci_ops;
 30
 31static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
 32{
 33	return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
 34}
 35
 36static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
 37{
 38	return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
 39}
 40
 41struct pci_ops pci_root_ops = {
 42	.read = pci_read,
 43	.write = pci_write,
 44};
 45
 46/*
 47 * legacy, numa, and acpi all want to call pcibios_scan_root
 48 * from their initcalls. This flag prevents that.
 49 */
 50int pcibios_scanned;
 51
 52/*
 53 * This interrupt-safe spinlock protects all accesses to PCI
 54 * configuration space.
 55 */
 56DEFINE_SPINLOCK(pci_config_lock);
 57
 58/*
 59 * Several buggy motherboards address only 16 devices and mirror
 60 * them to next 16 IDs. We try to detect this `feature' on all
 61 * primary buses (those containing host bridges as they are
 62 * expected to be unique) and remove the ghost devices.
 63 */
 64
 65static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
 66{
 67	struct list_head *ln, *mn;
 68	struct pci_dev *d, *e;
 69	int mirror = PCI_DEVFN(16,0);
 70	int seen_host_bridge = 0;
 71	int i;
 72
 73	DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
 74	list_for_each(ln, &b->devices) {
 75		d = pci_dev_b(ln);
 76		if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
 77			seen_host_bridge++;
 78		for (mn=ln->next; mn != &b->devices; mn=mn->next) {
 79			e = pci_dev_b(mn);
 80			if (e->devfn != d->devfn + mirror ||
 81			    e->vendor != d->vendor ||
 82			    e->device != d->device ||
 83			    e->class != d->class)
 84				continue;
 85			for(i=0; i<PCI_NUM_RESOURCES; i++)
 86				if (e->resource[i].start != d->resource[i].start ||
 87				    e->resource[i].end != d->resource[i].end ||
 88				    e->resource[i].flags != d->resource[i].flags)
 89					continue;
 90			break;
 91		}
 92		if (mn == &b->devices)
 93			return;
 94	}
 95	if (!seen_host_bridge)
 96		return;
 97	printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
 98
 99	ln = &b->devices;
100	while (ln->next != &b->devices) {
101		d = pci_dev_b(ln->next);
102		if (d->devfn >= mirror) {
103			list_del(&d->global_list);
104			list_del(&d->bus_list);
105			kfree(d);
106		} else
107			ln = ln->next;
108	}
109}
110
111/*
112 *  Called after each bus is probed, but before its children
113 *  are examined.
114 */
115
116void __devinit  pcibios_fixup_bus(struct pci_bus *b)
117{
118	pcibios_fixup_ghosts(b);
119	pci_read_bridge_bases(b);
120}
121
122
123struct pci_bus * __devinit pcibios_scan_root(int busnum)
124{
125	struct pci_bus *bus = NULL;
126
127	while ((bus = pci_find_next_bus(bus)) != NULL) {
128		if (bus->number == busnum) {
129			/* Already scanned */
130			return bus;
131		}
132	}
133
134	printk("PCI: Probing PCI hardware (bus %02x)\n", busnum);
135
136	return pci_scan_bus(busnum, &pci_root_ops, NULL);
137}
138
139extern u8 pci_cache_line_size;
140
141static int __init pcibios_init(void)
142{
143	struct cpuinfo_x86 *c = &boot_cpu_data;
144
145	if (!raw_pci_ops) {
146		printk("PCI: System does not support PCI\n");
147		return 0;
148	}
149
150	/*
151	 * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
152	 * and P4. It's also good for 386/486s (which actually have 16)
153	 * as quite a few PCI devices do not support smaller values.
154	 */
155	pci_cache_line_size = 32 >> 2;
156	if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
157		pci_cache_line_size = 64 >> 2;	/* K7 & K8 */
158	else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
159		pci_cache_line_size = 128 >> 2;	/* P4 */
160
161	pcibios_resource_survey();
162
163#ifdef CONFIG_PCI_BIOS
164	if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
165		pcibios_sort();
166#endif
167	return 0;
168}
169
170subsys_initcall(pcibios_init);
171
172char * __devinit  pcibios_setup(char *str)
173{
174	if (!strcmp(str, "off")) {
175		pci_probe = 0;
176		return NULL;
177	}
178#ifdef CONFIG_PCI_BIOS
179	else if (!strcmp(str, "bios")) {
180		pci_probe = PCI_PROBE_BIOS;
181		return NULL;
182	} else if (!strcmp(str, "nobios")) {
183		pci_probe &= ~PCI_PROBE_BIOS;
184		return NULL;
185	} else if (!strcmp(str, "nosort")) {
186		pci_probe |= PCI_NO_SORT;
187		return NULL;
188	} else if (!strcmp(str, "biosirq")) {
189		pci_probe |= PCI_BIOS_IRQ_SCAN;
190		return NULL;
191	}
192#endif
193#ifdef CONFIG_PCI_DIRECT
194	else if (!strcmp(str, "conf1")) {
195		pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
196		return NULL;
197	}
198	else if (!strcmp(str, "conf2")) {
199		pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
200		return NULL;
201	}
202#endif
203#ifdef CONFIG_PCI_MMCONFIG
204	else if (!strcmp(str, "nommconf")) {
205		pci_probe &= ~PCI_PROBE_MMCONF;
206		return NULL;
207	}
208#endif
209	else if (!strcmp(str, "noacpi")) {
210		acpi_noirq_set();
211		return NULL;
212	}
213#ifndef CONFIG_X86_VISWS
214	else if (!strcmp(str, "usepirqmask")) {
215		pci_probe |= PCI_USE_PIRQ_MASK;
216		return NULL;
217	} else if (!strncmp(str, "irqmask=", 8)) {
218		pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
219		return NULL;
220	} else if (!strncmp(str, "lastbus=", 8)) {
221		pcibios_last_bus = simple_strtol(str+8, NULL, 0);
222		return NULL;
223	}
224#endif
225	else if (!strcmp(str, "rom")) {
226		pci_probe |= PCI_ASSIGN_ROMS;
227		return NULL;
228	} else if (!strcmp(str, "assign-busses")) {
229		pci_probe |= PCI_ASSIGN_ALL_BUSSES;
230		return NULL;
231	} else if (!strcmp(str, "routeirq")) {
232		pci_routeirq = 1;
233		return NULL;
234	}
235	return str;
236}
237
238unsigned int pcibios_assign_all_busses(void)
239{
240	return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
241}
242
243int pcibios_enable_device(struct pci_dev *dev, int mask)
244{
245	int err;
246
247	if ((err = pcibios_enable_resources(dev, mask)) < 0)
248		return err;
249
250	return pcibios_enable_irq(dev);
251}