PageRenderTime 6ms CodeModel.GetById 1ms app.highlight 1ms RepoModel.GetById 1ms app.codeStats 0ms

/arch/i386/math-emu/control_w.h

https://bitbucket.org/evzijst/gittest
C Header | 45 lines | 26 code | 8 blank | 11 comment | 0 complexity | 208bbee1b75b38e22001e45f1d4d926e MD5 | raw file
 1/*---------------------------------------------------------------------------+
 2 |  control_w.h                                                              |
 3 |                                                                           |
 4 | Copyright (C) 1992,1993                                                   |
 5 |                       W. Metzenthen, 22 Parker St, Ormond, Vic 3163,      |
 6 |                       Australia.  E-mail   billm@vaxc.cc.monash.edu.au    |
 7 |                                                                           |
 8 +---------------------------------------------------------------------------*/
 9
10#ifndef _CONTROLW_H_
11#define _CONTROLW_H_
12
13#ifdef __ASSEMBLY__
14#define	_Const_(x)	$##x
15#else
16#define	_Const_(x)	x
17#endif
18
19#define CW_RC		_Const_(0x0C00)	/* rounding control */
20#define CW_PC		_Const_(0x0300)	/* precision control */
21
22#define CW_Precision	Const_(0x0020)	/* loss of precision mask */
23#define CW_Underflow	Const_(0x0010)	/* underflow mask */
24#define CW_Overflow	Const_(0x0008)	/* overflow mask */
25#define CW_ZeroDiv	Const_(0x0004)	/* divide by zero mask */
26#define CW_Denormal	Const_(0x0002)	/* denormalized operand mask */
27#define CW_Invalid	Const_(0x0001)	/* invalid operation mask */
28
29#define CW_Exceptions  	_Const_(0x003f)	/* all masks */
30
31#define RC_RND		_Const_(0x0000)
32#define RC_DOWN		_Const_(0x0400)
33#define RC_UP		_Const_(0x0800)
34#define RC_CHOP		_Const_(0x0C00)
35
36/* p 15-5: Precision control bits affect only the following:
37   ADD, SUB(R), MUL, DIV(R), and SQRT */
38#define PR_24_BITS        _Const_(0x000)
39#define PR_53_BITS        _Const_(0x200)
40#define PR_64_BITS        _Const_(0x300)
41#define PR_RESERVED_BITS  _Const_(0x100)
42/* FULL_PRECISION simulates all exceptions masked */
43#define FULL_PRECISION  (PR_64_BITS | RC_RND | 0x3f)
44
45#endif /* _CONTROLW_H_ */