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/arch/i386/kernel/irq.c

https://bitbucket.org/evzijst/gittest
C | 261 lines | 173 code | 42 blank | 46 comment | 22 complexity | c277caa279746f58f29f972ae5140c21 MD5 | raw file
  1/*
  2 *	linux/arch/i386/kernel/irq.c
  3 *
  4 *	Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
  5 *
  6 * This file contains the lowest level x86-specific interrupt
  7 * entry, irq-stacks and irq statistics code. All the remaining
  8 * irq logic is done by the generic kernel/irq/ code and
  9 * by the x86-specific irq controller code. (e.g. i8259.c and
 10 * io_apic.c.)
 11 */
 12
 13#include <asm/uaccess.h>
 14#include <linux/module.h>
 15#include <linux/seq_file.h>
 16#include <linux/interrupt.h>
 17#include <linux/kernel_stat.h>
 18
 19DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_maxaligned_in_smp;
 20EXPORT_PER_CPU_SYMBOL(irq_stat);
 21
 22#ifndef CONFIG_X86_LOCAL_APIC
 23/*
 24 * 'what should we do if we get a hw irq event on an illegal vector'.
 25 * each architecture has to answer this themselves.
 26 */
 27void ack_bad_irq(unsigned int irq)
 28{
 29	printk("unexpected IRQ trap at vector %02x\n", irq);
 30}
 31#endif
 32
 33#ifdef CONFIG_4KSTACKS
 34/*
 35 * per-CPU IRQ handling contexts (thread information and stack)
 36 */
 37union irq_ctx {
 38	struct thread_info      tinfo;
 39	u32                     stack[THREAD_SIZE/sizeof(u32)];
 40};
 41
 42static union irq_ctx *hardirq_ctx[NR_CPUS];
 43static union irq_ctx *softirq_ctx[NR_CPUS];
 44#endif
 45
 46/*
 47 * do_IRQ handles all normal device IRQ's (the special
 48 * SMP cross-CPU interrupts have their own specific
 49 * handlers).
 50 */
 51fastcall unsigned int do_IRQ(struct pt_regs *regs)
 52{	
 53	/* high bits used in ret_from_ code */
 54	int irq = regs->orig_eax & 0xff;
 55#ifdef CONFIG_4KSTACKS
 56	union irq_ctx *curctx, *irqctx;
 57	u32 *isp;
 58#endif
 59
 60	irq_enter();
 61#ifdef CONFIG_DEBUG_STACKOVERFLOW
 62	/* Debugging check for stack overflow: is there less than 1KB free? */
 63	{
 64		long esp;
 65
 66		__asm__ __volatile__("andl %%esp,%0" :
 67					"=r" (esp) : "0" (THREAD_SIZE - 1));
 68		if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
 69			printk("do_IRQ: stack overflow: %ld\n",
 70				esp - sizeof(struct thread_info));
 71			dump_stack();
 72		}
 73	}
 74#endif
 75
 76#ifdef CONFIG_4KSTACKS
 77
 78	curctx = (union irq_ctx *) current_thread_info();
 79	irqctx = hardirq_ctx[smp_processor_id()];
 80
 81	/*
 82	 * this is where we switch to the IRQ stack. However, if we are
 83	 * already using the IRQ stack (because we interrupted a hardirq
 84	 * handler) we can't do that and just have to keep using the
 85	 * current stack (which is the irq stack already after all)
 86	 */
 87	if (curctx != irqctx) {
 88		int arg1, arg2, ebx;
 89
 90		/* build the stack frame on the IRQ stack */
 91		isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
 92		irqctx->tinfo.task = curctx->tinfo.task;
 93		irqctx->tinfo.previous_esp = current_stack_pointer;
 94
 95		asm volatile(
 96			"       xchgl   %%ebx,%%esp      \n"
 97			"       call    __do_IRQ         \n"
 98			"       movl   %%ebx,%%esp      \n"
 99			: "=a" (arg1), "=d" (arg2), "=b" (ebx)
100			:  "0" (irq),   "1" (regs),  "2" (isp)
101			: "memory", "cc", "ecx"
102		);
103	} else
104#endif
105		__do_IRQ(irq, regs);
106
107	irq_exit();
108
109	return 1;
110}
111
112#ifdef CONFIG_4KSTACKS
113
114/*
115 * These should really be __section__(".bss.page_aligned") as well, but
116 * gcc's 3.0 and earlier don't handle that correctly.
117 */
118static char softirq_stack[NR_CPUS * THREAD_SIZE]
119		__attribute__((__aligned__(THREAD_SIZE)));
120
121static char hardirq_stack[NR_CPUS * THREAD_SIZE]
122		__attribute__((__aligned__(THREAD_SIZE)));
123
124/*
125 * allocate per-cpu stacks for hardirq and for softirq processing
126 */
127void irq_ctx_init(int cpu)
128{
129	union irq_ctx *irqctx;
130
131	if (hardirq_ctx[cpu])
132		return;
133
134	irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
135	irqctx->tinfo.task              = NULL;
136	irqctx->tinfo.exec_domain       = NULL;
137	irqctx->tinfo.cpu               = cpu;
138	irqctx->tinfo.preempt_count     = HARDIRQ_OFFSET;
139	irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
140
141	hardirq_ctx[cpu] = irqctx;
142
143	irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
144	irqctx->tinfo.task              = NULL;
145	irqctx->tinfo.exec_domain       = NULL;
146	irqctx->tinfo.cpu               = cpu;
147	irqctx->tinfo.preempt_count     = SOFTIRQ_OFFSET;
148	irqctx->tinfo.addr_limit        = MAKE_MM_SEG(0);
149
150	softirq_ctx[cpu] = irqctx;
151
152	printk("CPU %u irqstacks, hard=%p soft=%p\n",
153		cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
154}
155
156extern asmlinkage void __do_softirq(void);
157
158asmlinkage void do_softirq(void)
159{
160	unsigned long flags;
161	struct thread_info *curctx;
162	union irq_ctx *irqctx;
163	u32 *isp;
164
165	if (in_interrupt())
166		return;
167
168	local_irq_save(flags);
169
170	if (local_softirq_pending()) {
171		curctx = current_thread_info();
172		irqctx = softirq_ctx[smp_processor_id()];
173		irqctx->tinfo.task = curctx->task;
174		irqctx->tinfo.previous_esp = current_stack_pointer;
175
176		/* build the stack frame on the softirq stack */
177		isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
178
179		asm volatile(
180			"       xchgl   %%ebx,%%esp     \n"
181			"       call    __do_softirq    \n"
182			"       movl    %%ebx,%%esp     \n"
183			: "=b"(isp)
184			: "0"(isp)
185			: "memory", "cc", "edx", "ecx", "eax"
186		);
187	}
188
189	local_irq_restore(flags);
190}
191
192EXPORT_SYMBOL(do_softirq);
193#endif
194
195/*
196 * Interrupt statistics:
197 */
198
199atomic_t irq_err_count;
200
201/*
202 * /proc/interrupts printing:
203 */
204
205int show_interrupts(struct seq_file *p, void *v)
206{
207	int i = *(loff_t *) v, j;
208	struct irqaction * action;
209	unsigned long flags;
210
211	if (i == 0) {
212		seq_printf(p, "           ");
213		for (j=0; j<NR_CPUS; j++)
214			if (cpu_online(j))
215				seq_printf(p, "CPU%d       ",j);
216		seq_putc(p, '\n');
217	}
218
219	if (i < NR_IRQS) {
220		spin_lock_irqsave(&irq_desc[i].lock, flags);
221		action = irq_desc[i].action;
222		if (!action)
223			goto skip;
224		seq_printf(p, "%3d: ",i);
225#ifndef CONFIG_SMP
226		seq_printf(p, "%10u ", kstat_irqs(i));
227#else
228		for (j = 0; j < NR_CPUS; j++)
229			if (cpu_online(j))
230				seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
231#endif
232		seq_printf(p, " %14s", irq_desc[i].handler->typename);
233		seq_printf(p, "  %s", action->name);
234
235		for (action=action->next; action; action = action->next)
236			seq_printf(p, ", %s", action->name);
237
238		seq_putc(p, '\n');
239skip:
240		spin_unlock_irqrestore(&irq_desc[i].lock, flags);
241	} else if (i == NR_IRQS) {
242		seq_printf(p, "NMI: ");
243		for (j = 0; j < NR_CPUS; j++)
244			if (cpu_online(j))
245				seq_printf(p, "%10u ", nmi_count(j));
246		seq_putc(p, '\n');
247#ifdef CONFIG_X86_LOCAL_APIC
248		seq_printf(p, "LOC: ");
249		for (j = 0; j < NR_CPUS; j++)
250			if (cpu_online(j))
251				seq_printf(p, "%10u ",
252					per_cpu(irq_stat,j).apic_timer_irqs);
253		seq_putc(p, '\n');
254#endif
255		seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
256#if defined(CONFIG_X86_IO_APIC)
257		seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
258#endif
259	}
260	return 0;
261}