/arch/i386/kernel/irq.c

https://bitbucket.org/evzijst/gittest · C · 261 lines · 173 code · 42 blank · 46 comment · 22 complexity · c277caa279746f58f29f972ae5140c21 MD5 · raw file

  1. /*
  2. * linux/arch/i386/kernel/irq.c
  3. *
  4. * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
  5. *
  6. * This file contains the lowest level x86-specific interrupt
  7. * entry, irq-stacks and irq statistics code. All the remaining
  8. * irq logic is done by the generic kernel/irq/ code and
  9. * by the x86-specific irq controller code. (e.g. i8259.c and
  10. * io_apic.c.)
  11. */
  12. #include <asm/uaccess.h>
  13. #include <linux/module.h>
  14. #include <linux/seq_file.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. DEFINE_PER_CPU(irq_cpustat_t, irq_stat) ____cacheline_maxaligned_in_smp;
  18. EXPORT_PER_CPU_SYMBOL(irq_stat);
  19. #ifndef CONFIG_X86_LOCAL_APIC
  20. /*
  21. * 'what should we do if we get a hw irq event on an illegal vector'.
  22. * each architecture has to answer this themselves.
  23. */
  24. void ack_bad_irq(unsigned int irq)
  25. {
  26. printk("unexpected IRQ trap at vector %02x\n", irq);
  27. }
  28. #endif
  29. #ifdef CONFIG_4KSTACKS
  30. /*
  31. * per-CPU IRQ handling contexts (thread information and stack)
  32. */
  33. union irq_ctx {
  34. struct thread_info tinfo;
  35. u32 stack[THREAD_SIZE/sizeof(u32)];
  36. };
  37. static union irq_ctx *hardirq_ctx[NR_CPUS];
  38. static union irq_ctx *softirq_ctx[NR_CPUS];
  39. #endif
  40. /*
  41. * do_IRQ handles all normal device IRQ's (the special
  42. * SMP cross-CPU interrupts have their own specific
  43. * handlers).
  44. */
  45. fastcall unsigned int do_IRQ(struct pt_regs *regs)
  46. {
  47. /* high bits used in ret_from_ code */
  48. int irq = regs->orig_eax & 0xff;
  49. #ifdef CONFIG_4KSTACKS
  50. union irq_ctx *curctx, *irqctx;
  51. u32 *isp;
  52. #endif
  53. irq_enter();
  54. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  55. /* Debugging check for stack overflow: is there less than 1KB free? */
  56. {
  57. long esp;
  58. __asm__ __volatile__("andl %%esp,%0" :
  59. "=r" (esp) : "0" (THREAD_SIZE - 1));
  60. if (unlikely(esp < (sizeof(struct thread_info) + STACK_WARN))) {
  61. printk("do_IRQ: stack overflow: %ld\n",
  62. esp - sizeof(struct thread_info));
  63. dump_stack();
  64. }
  65. }
  66. #endif
  67. #ifdef CONFIG_4KSTACKS
  68. curctx = (union irq_ctx *) current_thread_info();
  69. irqctx = hardirq_ctx[smp_processor_id()];
  70. /*
  71. * this is where we switch to the IRQ stack. However, if we are
  72. * already using the IRQ stack (because we interrupted a hardirq
  73. * handler) we can't do that and just have to keep using the
  74. * current stack (which is the irq stack already after all)
  75. */
  76. if (curctx != irqctx) {
  77. int arg1, arg2, ebx;
  78. /* build the stack frame on the IRQ stack */
  79. isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
  80. irqctx->tinfo.task = curctx->tinfo.task;
  81. irqctx->tinfo.previous_esp = current_stack_pointer;
  82. asm volatile(
  83. " xchgl %%ebx,%%esp \n"
  84. " call __do_IRQ \n"
  85. " movl %%ebx,%%esp \n"
  86. : "=a" (arg1), "=d" (arg2), "=b" (ebx)
  87. : "0" (irq), "1" (regs), "2" (isp)
  88. : "memory", "cc", "ecx"
  89. );
  90. } else
  91. #endif
  92. __do_IRQ(irq, regs);
  93. irq_exit();
  94. return 1;
  95. }
  96. #ifdef CONFIG_4KSTACKS
  97. /*
  98. * These should really be __section__(".bss.page_aligned") as well, but
  99. * gcc's 3.0 and earlier don't handle that correctly.
  100. */
  101. static char softirq_stack[NR_CPUS * THREAD_SIZE]
  102. __attribute__((__aligned__(THREAD_SIZE)));
  103. static char hardirq_stack[NR_CPUS * THREAD_SIZE]
  104. __attribute__((__aligned__(THREAD_SIZE)));
  105. /*
  106. * allocate per-cpu stacks for hardirq and for softirq processing
  107. */
  108. void irq_ctx_init(int cpu)
  109. {
  110. union irq_ctx *irqctx;
  111. if (hardirq_ctx[cpu])
  112. return;
  113. irqctx = (union irq_ctx*) &hardirq_stack[cpu*THREAD_SIZE];
  114. irqctx->tinfo.task = NULL;
  115. irqctx->tinfo.exec_domain = NULL;
  116. irqctx->tinfo.cpu = cpu;
  117. irqctx->tinfo.preempt_count = HARDIRQ_OFFSET;
  118. irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
  119. hardirq_ctx[cpu] = irqctx;
  120. irqctx = (union irq_ctx*) &softirq_stack[cpu*THREAD_SIZE];
  121. irqctx->tinfo.task = NULL;
  122. irqctx->tinfo.exec_domain = NULL;
  123. irqctx->tinfo.cpu = cpu;
  124. irqctx->tinfo.preempt_count = SOFTIRQ_OFFSET;
  125. irqctx->tinfo.addr_limit = MAKE_MM_SEG(0);
  126. softirq_ctx[cpu] = irqctx;
  127. printk("CPU %u irqstacks, hard=%p soft=%p\n",
  128. cpu,hardirq_ctx[cpu],softirq_ctx[cpu]);
  129. }
  130. extern asmlinkage void __do_softirq(void);
  131. asmlinkage void do_softirq(void)
  132. {
  133. unsigned long flags;
  134. struct thread_info *curctx;
  135. union irq_ctx *irqctx;
  136. u32 *isp;
  137. if (in_interrupt())
  138. return;
  139. local_irq_save(flags);
  140. if (local_softirq_pending()) {
  141. curctx = current_thread_info();
  142. irqctx = softirq_ctx[smp_processor_id()];
  143. irqctx->tinfo.task = curctx->task;
  144. irqctx->tinfo.previous_esp = current_stack_pointer;
  145. /* build the stack frame on the softirq stack */
  146. isp = (u32*) ((char*)irqctx + sizeof(*irqctx));
  147. asm volatile(
  148. " xchgl %%ebx,%%esp \n"
  149. " call __do_softirq \n"
  150. " movl %%ebx,%%esp \n"
  151. : "=b"(isp)
  152. : "0"(isp)
  153. : "memory", "cc", "edx", "ecx", "eax"
  154. );
  155. }
  156. local_irq_restore(flags);
  157. }
  158. EXPORT_SYMBOL(do_softirq);
  159. #endif
  160. /*
  161. * Interrupt statistics:
  162. */
  163. atomic_t irq_err_count;
  164. /*
  165. * /proc/interrupts printing:
  166. */
  167. int show_interrupts(struct seq_file *p, void *v)
  168. {
  169. int i = *(loff_t *) v, j;
  170. struct irqaction * action;
  171. unsigned long flags;
  172. if (i == 0) {
  173. seq_printf(p, " ");
  174. for (j=0; j<NR_CPUS; j++)
  175. if (cpu_online(j))
  176. seq_printf(p, "CPU%d ",j);
  177. seq_putc(p, '\n');
  178. }
  179. if (i < NR_IRQS) {
  180. spin_lock_irqsave(&irq_desc[i].lock, flags);
  181. action = irq_desc[i].action;
  182. if (!action)
  183. goto skip;
  184. seq_printf(p, "%3d: ",i);
  185. #ifndef CONFIG_SMP
  186. seq_printf(p, "%10u ", kstat_irqs(i));
  187. #else
  188. for (j = 0; j < NR_CPUS; j++)
  189. if (cpu_online(j))
  190. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  191. #endif
  192. seq_printf(p, " %14s", irq_desc[i].handler->typename);
  193. seq_printf(p, " %s", action->name);
  194. for (action=action->next; action; action = action->next)
  195. seq_printf(p, ", %s", action->name);
  196. seq_putc(p, '\n');
  197. skip:
  198. spin_unlock_irqrestore(&irq_desc[i].lock, flags);
  199. } else if (i == NR_IRQS) {
  200. seq_printf(p, "NMI: ");
  201. for (j = 0; j < NR_CPUS; j++)
  202. if (cpu_online(j))
  203. seq_printf(p, "%10u ", nmi_count(j));
  204. seq_putc(p, '\n');
  205. #ifdef CONFIG_X86_LOCAL_APIC
  206. seq_printf(p, "LOC: ");
  207. for (j = 0; j < NR_CPUS; j++)
  208. if (cpu_online(j))
  209. seq_printf(p, "%10u ",
  210. per_cpu(irq_stat,j).apic_timer_irqs);
  211. seq_putc(p, '\n');
  212. #endif
  213. seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
  214. #if defined(CONFIG_X86_IO_APIC)
  215. seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
  216. #endif
  217. }
  218. return 0;
  219. }