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/arch/frv/kernel/irq-mb93091.c

https://bitbucket.org/evzijst/gittest
C | 116 lines | 86 code | 16 blank | 14 comment | 2 complexity | a3ac123266dc77460b1cc241edc769c2 MD5 | raw file
  1/* irq-mb93091.c: MB93091 FPGA interrupt handling
  2 *
  3 * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
  4 * Written by David Howells (dhowells@redhat.com)
  5 *
  6 * This program is free software; you can redistribute it and/or
  7 * modify it under the terms of the GNU General Public License
  8 * as published by the Free Software Foundation; either version
  9 * 2 of the License, or (at your option) any later version.
 10 */
 11
 12#include <linux/config.h>
 13#include <linux/ptrace.h>
 14#include <linux/errno.h>
 15#include <linux/signal.h>
 16#include <linux/sched.h>
 17#include <linux/ioport.h>
 18#include <linux/interrupt.h>
 19#include <linux/init.h>
 20#include <linux/irq.h>
 21
 22#include <asm/io.h>
 23#include <asm/system.h>
 24#include <asm/bitops.h>
 25#include <asm/delay.h>
 26#include <asm/irq.h>
 27#include <asm/irc-regs.h>
 28#include <asm/irq-routing.h>
 29
 30#define __reg16(ADDR) (*(volatile unsigned short *)(ADDR))
 31
 32#define __get_IMR()	({ __reg16(0xffc00004); })
 33#define __set_IMR(M)	do { __reg16(0xffc00004) = (M); wmb(); } while(0)
 34#define __get_IFR()	({ __reg16(0xffc0000c); })
 35#define __clr_IFR(M)	do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0)
 36
 37static void frv_fpga_doirq(struct irq_source *source);
 38static void frv_fpga_control(struct irq_group *group, int irq, int on);
 39
 40/*****************************************************************************/
 41/*
 42 * FPGA IRQ multiplexor
 43 */
 44static struct irq_source frv_fpga[4] = {
 45#define __FPGA(X, M)					\
 46	[X] = {						\
 47		.muxname	= "fpga."#X,		\
 48		.irqmask	= M,			\
 49		.doirq		= frv_fpga_doirq,	\
 50	}
 51
 52	__FPGA(0, 0x0028),
 53	__FPGA(1, 0x0050),
 54	__FPGA(2, 0x1c00),
 55	__FPGA(3, 0x6386),
 56};
 57
 58static struct irq_group frv_fpga_irqs = {
 59	.first_irq	= IRQ_BASE_FPGA,
 60	.control	= frv_fpga_control,
 61	.sources = {
 62		[ 1] = &frv_fpga[3],
 63		[ 2] = &frv_fpga[3],
 64		[ 3] = &frv_fpga[0],
 65		[ 4] = &frv_fpga[1],
 66		[ 5] = &frv_fpga[0],
 67		[ 6] = &frv_fpga[1],
 68		[ 7] = &frv_fpga[3],
 69		[ 8] = &frv_fpga[3],
 70		[ 9] = &frv_fpga[3],
 71		[10] = &frv_fpga[2],
 72		[11] = &frv_fpga[2],
 73		[12] = &frv_fpga[2],
 74		[13] = &frv_fpga[3],
 75		[14] = &frv_fpga[3],
 76	},
 77};
 78
 79
 80static void frv_fpga_control(struct irq_group *group, int index, int on)
 81{
 82	uint16_t imr = __get_IMR();
 83
 84	if (on)
 85		imr &= ~(1 << index);
 86	else
 87		imr |= 1 << index;
 88
 89	__set_IMR(imr);
 90}
 91
 92static void frv_fpga_doirq(struct irq_source *source)
 93{
 94	uint16_t mask, imr;
 95
 96	imr = __get_IMR();
 97	mask = source->irqmask & ~imr & __get_IFR();
 98	if (mask) {
 99		__set_IMR(imr | mask);
100		__clr_IFR(mask);
101		distribute_irqs(&frv_fpga_irqs, mask);
102		__set_IMR(imr);
103	}
104}
105
106void __init fpga_init(void)
107{
108	__set_IMR(0x7ffe);
109	__clr_IFR(0x0000);
110
111	frv_irq_route_external(&frv_fpga[0], IRQ_CPU_EXTERNAL0);
112	frv_irq_route_external(&frv_fpga[1], IRQ_CPU_EXTERNAL1);
113	frv_irq_route_external(&frv_fpga[2], IRQ_CPU_EXTERNAL2);
114	frv_irq_route_external(&frv_fpga[3], IRQ_CPU_EXTERNAL3);
115	frv_irq_set_group(&frv_fpga_irqs);
116}