/arch/cris/arch-v10/drivers/eeprom.c

https://bitbucket.org/evzijst/gittest · C · 945 lines · 628 code · 123 blank · 194 comment · 104 complexity · 2d7024d6876b0738f6ff1141f0c2f6ae MD5 · raw file

  1. /*!*****************************************************************************
  2. *!
  3. *! Implements an interface for i2c compatible eeproms to run under linux.
  4. *! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustents by
  5. *! Johan.Adolfsson@axis.com
  6. *!
  7. *! Probing results:
  8. *! 8k or not is detected (the assumes 2k or 16k)
  9. *! 2k or 16k detected using test reads and writes.
  10. *!
  11. *!------------------------------------------------------------------------
  12. *! HISTORY
  13. *!
  14. *! DATE NAME CHANGES
  15. *! ---- ---- -------
  16. *! Aug 28 1999 Edgar Iglesias Initial Version
  17. *! Aug 31 1999 Edgar Iglesias Allow simultaneous users.
  18. *! Sep 03 1999 Edgar Iglesias Updated probe.
  19. *! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
  20. *! in the spin-lock.
  21. *!
  22. *! $Log: eeprom.c,v $
  23. *! Revision 1.10 2003/09/11 07:29:48 starvik
  24. *! Merge of Linux 2.6.0-test5
  25. *!
  26. *! Revision 1.9 2003/07/04 08:27:37 starvik
  27. *! Merge of Linux 2.5.74
  28. *!
  29. *! Revision 1.8 2003/04/09 05:20:47 starvik
  30. *! Merge of Linux 2.5.67
  31. *!
  32. *! Revision 1.6 2003/02/10 07:19:28 starvik
  33. *! Removed misplaced ;
  34. *!
  35. *! Revision 1.5 2002/12/11 13:13:57 starvik
  36. *! Added arch/ to v10 specific includes
  37. *! Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
  38. *!
  39. *! Revision 1.4 2002/11/20 11:56:10 starvik
  40. *! Merge of Linux 2.5.48
  41. *!
  42. *! Revision 1.3 2002/11/18 13:16:06 starvik
  43. *! Linux 2.5 port of latest 2.4 drivers
  44. *!
  45. *! Revision 1.8 2001/06/15 13:24:29 jonashg
  46. *! * Added verification of pointers from userspace in read and write.
  47. *! * Made busy counter volatile.
  48. *! * Added define for inital write delay.
  49. *! * Removed warnings by using loff_t instead of unsigned long.
  50. *!
  51. *! Revision 1.7 2001/06/14 15:26:54 jonashg
  52. *! Removed test because condition is always true.
  53. *!
  54. *! Revision 1.6 2001/06/14 15:18:20 jonashg
  55. *! Kb -> kB (makes quite a difference if you don't know if you have 2k or 16k).
  56. *!
  57. *! Revision 1.5 2001/06/14 14:39:51 jonashg
  58. *! Forgot to use name when registering the driver.
  59. *!
  60. *! Revision 1.4 2001/06/14 14:35:47 jonashg
  61. *! * Gave driver a name and used it in printk's.
  62. *! * Cleanup.
  63. *!
  64. *! Revision 1.3 2001/03/19 16:04:46 markusl
  65. *! Fixed init of fops struct
  66. *!
  67. *! Revision 1.2 2001/03/19 10:35:07 markusl
  68. *! 2.4 port of eeprom driver
  69. *!
  70. *! Revision 1.8 2000/05/18 10:42:25 edgar
  71. *! Make sure to end write cycle on _every_ write
  72. *!
  73. *! Revision 1.7 2000/01/17 17:41:01 johana
  74. *! Adjusted probing and return -ENOSPC when writing outside EEPROM
  75. *!
  76. *! Revision 1.6 2000/01/17 15:50:36 johana
  77. *! Added adaptive timing adjustments and fixed autoprobing for 2k and 16k(?)
  78. *! EEPROMs
  79. *!
  80. *! Revision 1.5 1999/09/03 15:07:37 edgar
  81. *! Added bail-out check to the spinlock
  82. *!
  83. *! Revision 1.4 1999/09/03 12:11:17 bjornw
  84. *! Proper atomicity (need to use spinlocks, not if's). users -> busy.
  85. *!
  86. *!
  87. *! (c) 1999 Axis Communications AB, Lund, Sweden
  88. *!*****************************************************************************/
  89. #include <linux/config.h>
  90. #include <linux/kernel.h>
  91. #include <linux/sched.h>
  92. #include <linux/fs.h>
  93. #include <linux/init.h>
  94. #include <linux/delay.h>
  95. #include <linux/interrupt.h>
  96. #include <asm/uaccess.h>
  97. #include "i2c.h"
  98. #define D(x)
  99. /* If we should use adaptive timing or not: */
  100. //#define EEPROM_ADAPTIVE_TIMING
  101. #define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
  102. #define EEPROM_MINOR_NR 0
  103. /* Empirical sane initial value of the delay, the value will be adapted to
  104. * what the chip needs when using EEPROM_ADAPTIVE_TIMING.
  105. */
  106. #define INITIAL_WRITEDELAY_US 4000
  107. #define MAX_WRITEDELAY_US 10000 /* 10 ms according to spec for 2KB EEPROM */
  108. /* This one defines how many times to try when eeprom fails. */
  109. #define EEPROM_RETRIES 10
  110. #define EEPROM_2KB (2 * 1024)
  111. /*#define EEPROM_4KB (4 * 1024)*/ /* Exists but not used in Axis products */
  112. #define EEPROM_8KB (8 * 1024 - 1 ) /* Last byte has write protection bit */
  113. #define EEPROM_16KB (16 * 1024)
  114. #define i2c_delay(x) udelay(x)
  115. /*
  116. * This structure describes the attached eeprom chip.
  117. * The values are probed for.
  118. */
  119. struct eeprom_type
  120. {
  121. unsigned long size;
  122. unsigned long sequential_write_pagesize;
  123. unsigned char select_cmd;
  124. unsigned long usec_delay_writecycles; /* Min time between write cycles
  125. (up to 10ms for some models) */
  126. unsigned long usec_delay_step; /* For adaptive algorithm */
  127. int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */
  128. /* this one is to keep the read/write operations atomic */
  129. wait_queue_head_t wait_q;
  130. volatile int busy;
  131. int retry_cnt_addr; /* Used to keep track of number of retries for
  132. adaptive timing adjustments */
  133. int retry_cnt_read;
  134. };
  135. static int eeprom_open(struct inode * inode, struct file * file);
  136. static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig);
  137. static ssize_t eeprom_read(struct file * file, char * buf, size_t count,
  138. loff_t *off);
  139. static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
  140. loff_t *off);
  141. static int eeprom_close(struct inode * inode, struct file * file);
  142. static int eeprom_address(unsigned long addr);
  143. static int read_from_eeprom(char * buf, int count);
  144. static int eeprom_write_buf(loff_t addr, const char * buf, int count);
  145. static int eeprom_read_buf(loff_t addr, char * buf, int count);
  146. static void eeprom_disable_write_protect(void);
  147. static const char eeprom_name[] = "eeprom";
  148. /* chip description */
  149. static struct eeprom_type eeprom;
  150. /* This is the exported file-operations structure for this device. */
  151. struct file_operations eeprom_fops =
  152. {
  153. .llseek = eeprom_lseek,
  154. .read = eeprom_read,
  155. .write = eeprom_write,
  156. .open = eeprom_open,
  157. .release = eeprom_close
  158. };
  159. /* eeprom init call. Probes for different eeprom models. */
  160. int __init eeprom_init(void)
  161. {
  162. init_waitqueue_head(&eeprom.wait_q);
  163. eeprom.busy = 0;
  164. #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
  165. #define EETEXT "Found"
  166. #else
  167. #define EETEXT "Assuming"
  168. #endif
  169. if (register_chrdev(EEPROM_MAJOR_NR, eeprom_name, &eeprom_fops))
  170. {
  171. printk(KERN_INFO "%s: unable to get major %d for eeprom device\n",
  172. eeprom_name, EEPROM_MAJOR_NR);
  173. return -1;
  174. }
  175. printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
  176. /*
  177. * Note: Most of this probing method was taken from the printserver (5470e)
  178. * codebase. It did not contain a way of finding the 16kB chips
  179. * (M24128 or variants). The method used here might not work
  180. * for all models. If you encounter problems the easiest way
  181. * is probably to define your model within #ifdef's, and hard-
  182. * code it.
  183. */
  184. eeprom.size = 0;
  185. eeprom.usec_delay_writecycles = INITIAL_WRITEDELAY_US;
  186. eeprom.usec_delay_step = 128;
  187. eeprom.adapt_state = 0;
  188. #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
  189. i2c_start();
  190. i2c_outbyte(0x80);
  191. if(!i2c_getack())
  192. {
  193. /* It's not 8k.. */
  194. int success = 0;
  195. unsigned char buf_2k_start[16];
  196. /* Im not sure this will work... :) */
  197. /* assume 2kB, if failure go for 16kB */
  198. /* Test with 16kB settings.. */
  199. /* If it's a 2kB EEPROM and we address it outside it's range
  200. * it will mirror the address space:
  201. * 1. We read two locations (that are mirrored),
  202. * if the content differs * it's a 16kB EEPROM.
  203. * 2. if it doesn't differ - write different value to one of the locations,
  204. * check the other - if content still is the same it's a 2k EEPROM,
  205. * restore original data.
  206. */
  207. #define LOC1 8
  208. #define LOC2 (0x1fb) /*1fb, 3ed, 5df, 7d1 */
  209. /* 2k settings */
  210. i2c_stop();
  211. eeprom.size = EEPROM_2KB;
  212. eeprom.select_cmd = 0xA0;
  213. eeprom.sequential_write_pagesize = 16;
  214. if( eeprom_read_buf( 0, buf_2k_start, 16 ) == 16 )
  215. {
  216. D(printk("2k start: '%16.16s'\n", buf_2k_start));
  217. }
  218. else
  219. {
  220. printk(KERN_INFO "%s: Failed to read in 2k mode!\n", eeprom_name);
  221. }
  222. /* 16k settings */
  223. eeprom.size = EEPROM_16KB;
  224. eeprom.select_cmd = 0xA0;
  225. eeprom.sequential_write_pagesize = 64;
  226. {
  227. unsigned char loc1[4], loc2[4], tmp[4];
  228. if( eeprom_read_buf(LOC2, loc2, 4) == 4)
  229. {
  230. if( eeprom_read_buf(LOC1, loc1, 4) == 4)
  231. {
  232. D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
  233. LOC1, loc1, LOC2, loc2));
  234. #if 0
  235. if (memcmp(loc1, loc2, 4) != 0 )
  236. {
  237. /* It's 16k */
  238. printk(KERN_INFO "%s: 16k detected in step 1\n", eeprom_name);
  239. eeprom.size = EEPROM_16KB;
  240. success = 1;
  241. }
  242. else
  243. #endif
  244. {
  245. /* Do step 2 check */
  246. /* Invert value */
  247. loc1[0] = ~loc1[0];
  248. if (eeprom_write_buf(LOC1, loc1, 1) == 1)
  249. {
  250. /* If 2k EEPROM this write will actually write 10 bytes
  251. * from pos 0
  252. */
  253. D(printk("1 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
  254. LOC1, loc1, LOC2, loc2));
  255. if( eeprom_read_buf(LOC1, tmp, 4) == 4)
  256. {
  257. D(printk("2 loc1: (%i) '%4.4s' tmp '%4.4s'\n",
  258. LOC1, loc1, tmp));
  259. if (memcmp(loc1, tmp, 4) != 0 )
  260. {
  261. printk(KERN_INFO "%s: read and write differs! Not 16kB\n",
  262. eeprom_name);
  263. loc1[0] = ~loc1[0];
  264. if (eeprom_write_buf(LOC1, loc1, 1) == 1)
  265. {
  266. success = 1;
  267. }
  268. else
  269. {
  270. printk(KERN_INFO "%s: Restore 2k failed during probe,"
  271. " EEPROM might be corrupt!\n", eeprom_name);
  272. }
  273. i2c_stop();
  274. /* Go to 2k mode and write original data */
  275. eeprom.size = EEPROM_2KB;
  276. eeprom.select_cmd = 0xA0;
  277. eeprom.sequential_write_pagesize = 16;
  278. if( eeprom_write_buf(0, buf_2k_start, 16) == 16)
  279. {
  280. }
  281. else
  282. {
  283. printk(KERN_INFO "%s: Failed to write back 2k start!\n",
  284. eeprom_name);
  285. }
  286. eeprom.size = EEPROM_2KB;
  287. }
  288. }
  289. if(!success)
  290. {
  291. if( eeprom_read_buf(LOC2, loc2, 1) == 1)
  292. {
  293. D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
  294. LOC1, loc1, LOC2, loc2));
  295. if (memcmp(loc1, loc2, 4) == 0 )
  296. {
  297. /* Data the same, must be mirrored -> 2k */
  298. /* Restore data */
  299. printk(KERN_INFO "%s: 2k detected in step 2\n", eeprom_name);
  300. loc1[0] = ~loc1[0];
  301. if (eeprom_write_buf(LOC1, loc1, 1) == 1)
  302. {
  303. success = 1;
  304. }
  305. else
  306. {
  307. printk(KERN_INFO "%s: Restore 2k failed during probe,"
  308. " EEPROM might be corrupt!\n", eeprom_name);
  309. }
  310. eeprom.size = EEPROM_2KB;
  311. }
  312. else
  313. {
  314. printk(KERN_INFO "%s: 16k detected in step 2\n",
  315. eeprom_name);
  316. loc1[0] = ~loc1[0];
  317. /* Data differs, assume 16k */
  318. /* Restore data */
  319. if (eeprom_write_buf(LOC1, loc1, 1) == 1)
  320. {
  321. success = 1;
  322. }
  323. else
  324. {
  325. printk(KERN_INFO "%s: Restore 16k failed during probe,"
  326. " EEPROM might be corrupt!\n", eeprom_name);
  327. }
  328. eeprom.size = EEPROM_16KB;
  329. }
  330. }
  331. }
  332. }
  333. } /* read LOC1 */
  334. } /* address LOC1 */
  335. if (!success)
  336. {
  337. printk(KERN_INFO "%s: Probing failed!, using 2KB!\n", eeprom_name);
  338. eeprom.size = EEPROM_2KB;
  339. }
  340. } /* read */
  341. }
  342. }
  343. else
  344. {
  345. i2c_outbyte(0x00);
  346. if(!i2c_getack())
  347. {
  348. /* No 8k */
  349. eeprom.size = EEPROM_2KB;
  350. }
  351. else
  352. {
  353. i2c_start();
  354. i2c_outbyte(0x81);
  355. if (!i2c_getack())
  356. {
  357. eeprom.size = EEPROM_2KB;
  358. }
  359. else
  360. {
  361. /* It's a 8kB */
  362. i2c_inbyte();
  363. eeprom.size = EEPROM_8KB;
  364. }
  365. }
  366. }
  367. i2c_stop();
  368. #elif defined(CONFIG_ETRAX_I2C_EEPROM_16KB)
  369. eeprom.size = EEPROM_16KB;
  370. #elif defined(CONFIG_ETRAX_I2C_EEPROM_8KB)
  371. eeprom.size = EEPROM_8KB;
  372. #elif defined(CONFIG_ETRAX_I2C_EEPROM_2KB)
  373. eeprom.size = EEPROM_2KB;
  374. #endif
  375. switch(eeprom.size)
  376. {
  377. case (EEPROM_2KB):
  378. printk("%s: " EETEXT " i2c compatible 2kB eeprom.\n", eeprom_name);
  379. eeprom.sequential_write_pagesize = 16;
  380. eeprom.select_cmd = 0xA0;
  381. break;
  382. case (EEPROM_8KB):
  383. printk("%s: " EETEXT " i2c compatible 8kB eeprom.\n", eeprom_name);
  384. eeprom.sequential_write_pagesize = 16;
  385. eeprom.select_cmd = 0x80;
  386. break;
  387. case (EEPROM_16KB):
  388. printk("%s: " EETEXT " i2c compatible 16kB eeprom.\n", eeprom_name);
  389. eeprom.sequential_write_pagesize = 64;
  390. eeprom.select_cmd = 0xA0;
  391. break;
  392. default:
  393. eeprom.size = 0;
  394. printk("%s: Did not find a supported eeprom\n", eeprom_name);
  395. break;
  396. }
  397. eeprom_disable_write_protect();
  398. return 0;
  399. }
  400. /* Opens the device. */
  401. static int eeprom_open(struct inode * inode, struct file * file)
  402. {
  403. if(MINOR(inode->i_rdev) != EEPROM_MINOR_NR)
  404. return -ENXIO;
  405. if(MAJOR(inode->i_rdev) != EEPROM_MAJOR_NR)
  406. return -ENXIO;
  407. if( eeprom.size > 0 )
  408. {
  409. /* OK */
  410. return 0;
  411. }
  412. /* No EEprom found */
  413. return -EFAULT;
  414. }
  415. /* Changes the current file position. */
  416. static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig)
  417. {
  418. /*
  419. * orig 0: position from begning of eeprom
  420. * orig 1: relative from current position
  421. * orig 2: position from last eeprom address
  422. */
  423. switch (orig)
  424. {
  425. case 0:
  426. file->f_pos = offset;
  427. break;
  428. case 1:
  429. file->f_pos += offset;
  430. break;
  431. case 2:
  432. file->f_pos = eeprom.size - offset;
  433. break;
  434. default:
  435. return -EINVAL;
  436. }
  437. /* truncate position */
  438. if (file->f_pos < 0)
  439. {
  440. file->f_pos = 0;
  441. return(-EOVERFLOW);
  442. }
  443. if (file->f_pos >= eeprom.size)
  444. {
  445. file->f_pos = eeprom.size - 1;
  446. return(-EOVERFLOW);
  447. }
  448. return ( file->f_pos );
  449. }
  450. /* Reads data from eeprom. */
  451. static int eeprom_read_buf(loff_t addr, char * buf, int count)
  452. {
  453. struct file f;
  454. f.f_pos = addr;
  455. return eeprom_read(&f, buf, count, &addr);
  456. }
  457. /* Reads data from eeprom. */
  458. static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off)
  459. {
  460. int read=0;
  461. unsigned long p = file->f_pos;
  462. unsigned char page;
  463. if(p >= eeprom.size) /* Address i 0 - (size-1) */
  464. {
  465. return -EFAULT;
  466. }
  467. while(eeprom.busy)
  468. {
  469. interruptible_sleep_on(&eeprom.wait_q);
  470. /* bail out if we get interrupted */
  471. if (signal_pending(current))
  472. return -EINTR;
  473. }
  474. eeprom.busy++;
  475. page = (unsigned char) (p >> 8);
  476. if(!eeprom_address(p))
  477. {
  478. printk(KERN_INFO "%s: Read failed to address the eeprom: "
  479. "0x%08X (%i) page: %i\n", eeprom_name, (int)p, (int)p, page);
  480. i2c_stop();
  481. /* don't forget to wake them up */
  482. eeprom.busy--;
  483. wake_up_interruptible(&eeprom.wait_q);
  484. return -EFAULT;
  485. }
  486. if( (p + count) > eeprom.size)
  487. {
  488. /* truncate count */
  489. count = eeprom.size - p;
  490. }
  491. /* stop dummy write op and initiate the read op */
  492. i2c_start();
  493. /* special case for small eeproms */
  494. if(eeprom.size < EEPROM_16KB)
  495. {
  496. i2c_outbyte( eeprom.select_cmd | 1 | (page << 1) );
  497. }
  498. /* go on with the actual read */
  499. read = read_from_eeprom( buf, count);
  500. if(read > 0)
  501. {
  502. file->f_pos += read;
  503. }
  504. eeprom.busy--;
  505. wake_up_interruptible(&eeprom.wait_q);
  506. return read;
  507. }
  508. /* Writes data to eeprom. */
  509. static int eeprom_write_buf(loff_t addr, const char * buf, int count)
  510. {
  511. struct file f;
  512. f.f_pos = addr;
  513. return eeprom_write(&f, buf, count, &addr);
  514. }
  515. /* Writes data to eeprom. */
  516. static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
  517. loff_t *off)
  518. {
  519. int i, written, restart=1;
  520. unsigned long p;
  521. if (!access_ok(VERIFY_READ, buf, count))
  522. {
  523. return -EFAULT;
  524. }
  525. while(eeprom.busy)
  526. {
  527. interruptible_sleep_on(&eeprom.wait_q);
  528. /* bail out if we get interrupted */
  529. if (signal_pending(current))
  530. return -EINTR;
  531. }
  532. eeprom.busy++;
  533. for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++)
  534. {
  535. restart = 0;
  536. written = 0;
  537. p = file->f_pos;
  538. while( (written < count) && (p < eeprom.size))
  539. {
  540. /* address the eeprom */
  541. if(!eeprom_address(p))
  542. {
  543. printk(KERN_INFO "%s: Write failed to address the eeprom: "
  544. "0x%08X (%i) \n", eeprom_name, (int)p, (int)p);
  545. i2c_stop();
  546. /* don't forget to wake them up */
  547. eeprom.busy--;
  548. wake_up_interruptible(&eeprom.wait_q);
  549. return -EFAULT;
  550. }
  551. #ifdef EEPROM_ADAPTIVE_TIMING
  552. /* Adaptive algorithm to adjust timing */
  553. if (eeprom.retry_cnt_addr > 0)
  554. {
  555. /* To Low now */
  556. D(printk(">D=%i d=%i\n",
  557. eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
  558. if (eeprom.usec_delay_step < 4)
  559. {
  560. eeprom.usec_delay_step++;
  561. eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
  562. }
  563. else
  564. {
  565. if (eeprom.adapt_state > 0)
  566. {
  567. /* To Low before */
  568. eeprom.usec_delay_step *= 2;
  569. if (eeprom.usec_delay_step > 2)
  570. {
  571. eeprom.usec_delay_step--;
  572. }
  573. eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
  574. }
  575. else if (eeprom.adapt_state < 0)
  576. {
  577. /* To High before (toggle dir) */
  578. eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
  579. if (eeprom.usec_delay_step > 1)
  580. {
  581. eeprom.usec_delay_step /= 2;
  582. eeprom.usec_delay_step--;
  583. }
  584. }
  585. }
  586. eeprom.adapt_state = 1;
  587. }
  588. else
  589. {
  590. /* To High (or good) now */
  591. D(printk("<D=%i d=%i\n",
  592. eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
  593. if (eeprom.adapt_state < 0)
  594. {
  595. /* To High before */
  596. if (eeprom.usec_delay_step > 1)
  597. {
  598. eeprom.usec_delay_step *= 2;
  599. eeprom.usec_delay_step--;
  600. if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
  601. {
  602. eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
  603. }
  604. }
  605. }
  606. else if (eeprom.adapt_state > 0)
  607. {
  608. /* To Low before (toggle dir) */
  609. if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
  610. {
  611. eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
  612. }
  613. if (eeprom.usec_delay_step > 1)
  614. {
  615. eeprom.usec_delay_step /= 2;
  616. eeprom.usec_delay_step--;
  617. }
  618. eeprom.adapt_state = -1;
  619. }
  620. if (eeprom.adapt_state > -100)
  621. {
  622. eeprom.adapt_state--;
  623. }
  624. else
  625. {
  626. /* Restart adaption */
  627. D(printk("#Restart\n"));
  628. eeprom.usec_delay_step++;
  629. }
  630. }
  631. #endif /* EEPROM_ADAPTIVE_TIMING */
  632. /* write until we hit a page boundary or count */
  633. do
  634. {
  635. i2c_outbyte(buf[written]);
  636. if(!i2c_getack())
  637. {
  638. restart=1;
  639. printk(KERN_INFO "%s: write error, retrying. %d\n", eeprom_name, i);
  640. i2c_stop();
  641. break;
  642. }
  643. written++;
  644. p++;
  645. } while( written < count && ( p % eeprom.sequential_write_pagesize ));
  646. /* end write cycle */
  647. i2c_stop();
  648. i2c_delay(eeprom.usec_delay_writecycles);
  649. } /* while */
  650. } /* for */
  651. eeprom.busy--;
  652. wake_up_interruptible(&eeprom.wait_q);
  653. if (written == 0 && file->f_pos >= eeprom.size){
  654. return -ENOSPC;
  655. }
  656. file->f_pos += written;
  657. return written;
  658. }
  659. /* Closes the device. */
  660. static int eeprom_close(struct inode * inode, struct file * file)
  661. {
  662. /* do nothing for now */
  663. return 0;
  664. }
  665. /* Sets the current address of the eeprom. */
  666. static int eeprom_address(unsigned long addr)
  667. {
  668. int i;
  669. unsigned char page, offset;
  670. page = (unsigned char) (addr >> 8);
  671. offset = (unsigned char) addr;
  672. for(i = 0; i < EEPROM_RETRIES; i++)
  673. {
  674. /* start a dummy write for addressing */
  675. i2c_start();
  676. if(eeprom.size == EEPROM_16KB)
  677. {
  678. i2c_outbyte( eeprom.select_cmd );
  679. i2c_getack();
  680. i2c_outbyte(page);
  681. }
  682. else
  683. {
  684. i2c_outbyte( eeprom.select_cmd | (page << 1) );
  685. }
  686. if(!i2c_getack())
  687. {
  688. /* retry */
  689. i2c_stop();
  690. /* Must have a delay here.. 500 works, >50, 100->works 5th time*/
  691. i2c_delay(MAX_WRITEDELAY_US / EEPROM_RETRIES * i);
  692. /* The chip needs up to 10 ms from write stop to next start */
  693. }
  694. else
  695. {
  696. i2c_outbyte(offset);
  697. if(!i2c_getack())
  698. {
  699. /* retry */
  700. i2c_stop();
  701. }
  702. else
  703. break;
  704. }
  705. }
  706. eeprom.retry_cnt_addr = i;
  707. D(printk("%i\n", eeprom.retry_cnt_addr));
  708. if(eeprom.retry_cnt_addr == EEPROM_RETRIES)
  709. {
  710. /* failed */
  711. return 0;
  712. }
  713. return 1;
  714. }
  715. /* Reads from current address. */
  716. static int read_from_eeprom(char * buf, int count)
  717. {
  718. int i, read=0;
  719. for(i = 0; i < EEPROM_RETRIES; i++)
  720. {
  721. if(eeprom.size == EEPROM_16KB)
  722. {
  723. i2c_outbyte( eeprom.select_cmd | 1 );
  724. }
  725. if(i2c_getack())
  726. {
  727. break;
  728. }
  729. }
  730. if(i == EEPROM_RETRIES)
  731. {
  732. printk(KERN_INFO "%s: failed to read from eeprom\n", eeprom_name);
  733. i2c_stop();
  734. return -EFAULT;
  735. }
  736. while( (read < count))
  737. {
  738. if (put_user(i2c_inbyte(), &buf[read++]))
  739. {
  740. i2c_stop();
  741. return -EFAULT;
  742. }
  743. /*
  744. * make sure we don't ack last byte or you will get very strange
  745. * results!
  746. */
  747. if(read < count)
  748. {
  749. i2c_sendack();
  750. }
  751. }
  752. /* stop the operation */
  753. i2c_stop();
  754. return read;
  755. }
  756. /* Disables write protection if applicable. */
  757. #define DBP_SAVE(x)
  758. #define ax_printf printk
  759. static void eeprom_disable_write_protect(void)
  760. {
  761. /* Disable write protect */
  762. if (eeprom.size == EEPROM_8KB)
  763. {
  764. /* Step 1 Set WEL = 1 (write 00000010 to address 1FFFh */
  765. i2c_start();
  766. i2c_outbyte(0xbe);
  767. if(!i2c_getack())
  768. {
  769. DBP_SAVE(ax_printf("Get ack returns false\n"));
  770. }
  771. i2c_outbyte(0xFF);
  772. if(!i2c_getack())
  773. {
  774. DBP_SAVE(ax_printf("Get ack returns false 2\n"));
  775. }
  776. i2c_outbyte(0x02);
  777. if(!i2c_getack())
  778. {
  779. DBP_SAVE(ax_printf("Get ack returns false 3\n"));
  780. }
  781. i2c_stop();
  782. i2c_delay(1000);
  783. /* Step 2 Set RWEL = 1 (write 00000110 to address 1FFFh */
  784. i2c_start();
  785. i2c_outbyte(0xbe);
  786. if(!i2c_getack())
  787. {
  788. DBP_SAVE(ax_printf("Get ack returns false 55\n"));
  789. }
  790. i2c_outbyte(0xFF);
  791. if(!i2c_getack())
  792. {
  793. DBP_SAVE(ax_printf("Get ack returns false 52\n"));
  794. }
  795. i2c_outbyte(0x06);
  796. if(!i2c_getack())
  797. {
  798. DBP_SAVE(ax_printf("Get ack returns false 53\n"));
  799. }
  800. i2c_stop();
  801. /* Step 3 Set BP1, BP0, and/or WPEN bits (write 00000110 to address 1FFFh */
  802. i2c_start();
  803. i2c_outbyte(0xbe);
  804. if(!i2c_getack())
  805. {
  806. DBP_SAVE(ax_printf("Get ack returns false 56\n"));
  807. }
  808. i2c_outbyte(0xFF);
  809. if(!i2c_getack())
  810. {
  811. DBP_SAVE(ax_printf("Get ack returns false 57\n"));
  812. }
  813. i2c_outbyte(0x06);
  814. if(!i2c_getack())
  815. {
  816. DBP_SAVE(ax_printf("Get ack returns false 58\n"));
  817. }
  818. i2c_stop();
  819. /* Write protect disabled */
  820. }
  821. }
  822. module_init(eeprom_init);