/arch/arm/mm/fault-armv.c

https://bitbucket.org/evzijst/gittest · C · 223 lines · 141 code · 26 blank · 56 comment · 25 complexity · b824190aeb7e7e0e1e487d141c9e7db6 MD5 · raw file

  1. /*
  2. * linux/arch/arm/mm/fault-armv.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Modifications for ARM processor (c) 1995-2002 Russell King
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/sched.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mm.h>
  15. #include <linux/bitops.h>
  16. #include <linux/vmalloc.h>
  17. #include <linux/init.h>
  18. #include <linux/pagemap.h>
  19. #include <asm/cacheflush.h>
  20. #include <asm/pgtable.h>
  21. #include <asm/tlbflush.h>
  22. static unsigned long shared_pte_mask = L_PTE_CACHEABLE;
  23. /*
  24. * We take the easy way out of this problem - we make the
  25. * PTE uncacheable. However, we leave the write buffer on.
  26. */
  27. static int adjust_pte(struct vm_area_struct *vma, unsigned long address)
  28. {
  29. pgd_t *pgd;
  30. pmd_t *pmd;
  31. pte_t *pte, entry;
  32. int ret = 0;
  33. pgd = pgd_offset(vma->vm_mm, address);
  34. if (pgd_none(*pgd))
  35. goto no_pgd;
  36. if (pgd_bad(*pgd))
  37. goto bad_pgd;
  38. pmd = pmd_offset(pgd, address);
  39. if (pmd_none(*pmd))
  40. goto no_pmd;
  41. if (pmd_bad(*pmd))
  42. goto bad_pmd;
  43. pte = pte_offset_map(pmd, address);
  44. entry = *pte;
  45. /*
  46. * If this page isn't present, or is already setup to
  47. * fault (ie, is old), we can safely ignore any issues.
  48. */
  49. if (pte_present(entry) && pte_val(entry) & shared_pte_mask) {
  50. flush_cache_page(vma, address, pte_pfn(entry));
  51. pte_val(entry) &= ~shared_pte_mask;
  52. set_pte(pte, entry);
  53. flush_tlb_page(vma, address);
  54. ret = 1;
  55. }
  56. pte_unmap(pte);
  57. return ret;
  58. bad_pgd:
  59. pgd_ERROR(*pgd);
  60. pgd_clear(pgd);
  61. no_pgd:
  62. return 0;
  63. bad_pmd:
  64. pmd_ERROR(*pmd);
  65. pmd_clear(pmd);
  66. no_pmd:
  67. return 0;
  68. }
  69. static void
  70. make_coherent(struct vm_area_struct *vma, unsigned long addr, struct page *page, int dirty)
  71. {
  72. struct address_space *mapping = page_mapping(page);
  73. struct mm_struct *mm = vma->vm_mm;
  74. struct vm_area_struct *mpnt;
  75. struct prio_tree_iter iter;
  76. unsigned long offset;
  77. pgoff_t pgoff;
  78. int aliases = 0;
  79. if (!mapping)
  80. return;
  81. pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
  82. /*
  83. * If we have any shared mappings that are in the same mm
  84. * space, then we need to handle them specially to maintain
  85. * cache coherency.
  86. */
  87. flush_dcache_mmap_lock(mapping);
  88. vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
  89. /*
  90. * If this VMA is not in our MM, we can ignore it.
  91. * Note that we intentionally mask out the VMA
  92. * that we are fixing up.
  93. */
  94. if (mpnt->vm_mm != mm || mpnt == vma)
  95. continue;
  96. if (!(mpnt->vm_flags & VM_MAYSHARE))
  97. continue;
  98. offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
  99. aliases += adjust_pte(mpnt, mpnt->vm_start + offset);
  100. }
  101. flush_dcache_mmap_unlock(mapping);
  102. if (aliases)
  103. adjust_pte(vma, addr);
  104. else
  105. flush_cache_page(vma, addr, page_to_pfn(page));
  106. }
  107. /*
  108. * Take care of architecture specific things when placing a new PTE into
  109. * a page table, or changing an existing PTE. Basically, there are two
  110. * things that we need to take care of:
  111. *
  112. * 1. If PG_dcache_dirty is set for the page, we need to ensure
  113. * that any cache entries for the kernels virtual memory
  114. * range are written back to the page.
  115. * 2. If we have multiple shared mappings of the same space in
  116. * an object, we need to deal with the cache aliasing issues.
  117. *
  118. * Note that the page_table_lock will be held.
  119. */
  120. void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
  121. {
  122. unsigned long pfn = pte_pfn(pte);
  123. struct page *page;
  124. if (!pfn_valid(pfn))
  125. return;
  126. page = pfn_to_page(pfn);
  127. if (page_mapping(page)) {
  128. int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
  129. if (dirty) {
  130. /*
  131. * This is our first userspace mapping of this page.
  132. * Ensure that the physical page is coherent with
  133. * the kernel mapping.
  134. *
  135. * FIXME: only need to do this on VIVT and aliasing
  136. * VIPT cache architectures. We can do that
  137. * by choosing whether to set this bit...
  138. */
  139. __cpuc_flush_dcache_page(page_address(page));
  140. }
  141. if (cache_is_vivt())
  142. make_coherent(vma, addr, page, dirty);
  143. }
  144. }
  145. /*
  146. * Check whether the write buffer has physical address aliasing
  147. * issues. If it has, we need to avoid them for the case where
  148. * we have several shared mappings of the same object in user
  149. * space.
  150. */
  151. static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
  152. {
  153. register unsigned long zero = 0, one = 1, val;
  154. local_irq_disable();
  155. mb();
  156. *p1 = one;
  157. mb();
  158. *p2 = zero;
  159. mb();
  160. val = *p1;
  161. mb();
  162. local_irq_enable();
  163. return val != zero;
  164. }
  165. void __init check_writebuffer_bugs(void)
  166. {
  167. struct page *page;
  168. const char *reason;
  169. unsigned long v = 1;
  170. printk(KERN_INFO "CPU: Testing write buffer coherency: ");
  171. page = alloc_page(GFP_KERNEL);
  172. if (page) {
  173. unsigned long *p1, *p2;
  174. pgprot_t prot = __pgprot(L_PTE_PRESENT|L_PTE_YOUNG|
  175. L_PTE_DIRTY|L_PTE_WRITE|
  176. L_PTE_BUFFERABLE);
  177. p1 = vmap(&page, 1, VM_IOREMAP, prot);
  178. p2 = vmap(&page, 1, VM_IOREMAP, prot);
  179. if (p1 && p2) {
  180. v = check_writebuffer(p1, p2);
  181. reason = "enabling work-around";
  182. } else {
  183. reason = "unable to map memory\n";
  184. }
  185. vunmap(p1);
  186. vunmap(p2);
  187. put_page(page);
  188. } else {
  189. reason = "unable to grab page\n";
  190. }
  191. if (v) {
  192. printk("failed, %s\n", reason);
  193. shared_pte_mask |= L_PTE_BUFFERABLE;
  194. } else {
  195. printk("ok\n");
  196. }
  197. }