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/arch/arm/mm/copypage-v4mc.S

https://bitbucket.org/evzijst/gittest
Assembly | 80 lines | 76 code | 4 blank | 0 comment | 0 complexity | 20222811280c7b768000edb036946a50 MD5 | raw file
 1/*
 2 *  linux/arch/arm/lib/copy_page-armv4mc.S
 3 *
 4 *  Copyright (C) 1995-2001 Russell King
 5 *
 6 * This program is free software; you can redistribute it and/or modify
 7 * it under the terms of the GNU General Public License version 2 as
 8 * published by the Free Software Foundation.
 9 *
10 *  ASM optimised string functions
11 */
12#include <linux/linkage.h>
13#include <linux/init.h>
14#include <asm/constants.h>
15
16	.text
17	.align	5
18/*
19 * ARMv4 mini-dcache optimised copy_user_page
20 *
21 * We flush the destination cache lines just before we write the data into the
22 * corresponding address.  Since the Dcache is read-allocate, this removes the
23 * Dcache aliasing issue.  The writes will be forwarded to the write buffer,
24 * and merged as appropriate.
25 *
26 * Note: We rely on all ARMv4 processors implementing the "invalidate D line"
27 * instruction.  If your processor does not supply this, you have to write your
28 * own copy_user_page that does the right thing.
29 */
30ENTRY(v4_mc_copy_user_page)
31	stmfd	sp!, {r4, lr}			@ 2
32	mov	r4, r0
33	mov	r0, r1
34	bl	map_page_minicache
35	mov	r1, #PAGE_SZ/64			@ 1
36	ldmia	r0!, {r2, r3, ip, lr}		@ 4
371:	mcr	p15, 0, r4, c7, c6, 1		@ 1   invalidate D line
38	stmia	r4!, {r2, r3, ip, lr}		@ 4
39	ldmia	r0!, {r2, r3, ip, lr}		@ 4+1
40	stmia	r4!, {r2, r3, ip, lr}		@ 4
41	ldmia	r0!, {r2, r3, ip, lr}		@ 4
42	mcr	p15, 0, r4, c7, c6, 1		@ 1   invalidate D line
43	stmia	r4!, {r2, r3, ip, lr}		@ 4
44	ldmia	r0!, {r2, r3, ip, lr}		@ 4
45	subs	r1, r1, #1			@ 1
46	stmia	r4!, {r2, r3, ip, lr}		@ 4
47	ldmneia	r0!, {r2, r3, ip, lr}		@ 4
48	bne	1b				@ 1
49	ldmfd	sp!, {r4, pc}			@ 3
50
51	.align	5
52/*
53 * ARMv4 optimised clear_user_page
54 *
55 * Same story as above.
56 */
57ENTRY(v4_mc_clear_user_page)
58	str	lr, [sp, #-4]!
59	mov	r1, #PAGE_SZ/64			@ 1
60	mov	r2, #0				@ 1
61	mov	r3, #0				@ 1
62	mov	ip, #0				@ 1
63	mov	lr, #0				@ 1
641:	mcr	p15, 0, r0, c7, c6, 1		@ 1   invalidate D line
65	stmia	r0!, {r2, r3, ip, lr}		@ 4
66	stmia	r0!, {r2, r3, ip, lr}		@ 4
67	mcr	p15, 0, r0, c7, c6, 1		@ 1   invalidate D line
68	stmia	r0!, {r2, r3, ip, lr}		@ 4
69	stmia	r0!, {r2, r3, ip, lr}		@ 4
70	subs	r1, r1, #1			@ 1
71	bne	1b				@ 1
72	ldr	pc, [sp], #4
73
74	__INITDATA
75
76	.type	v4_mc_user_fns, #object
77ENTRY(v4_mc_user_fns)
78	.long	v4_mc_clear_user_page
79	.long	v4_mc_copy_user_page
80	.size	v4_mc_user_fns, . - v4_mc_user_fns