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/arch/arm/mach-s3c2410/time.c

https://bitbucket.org/evzijst/gittest
C | 256 lines | 125 code | 57 blank | 74 comment | 8 complexity | 6325b6376301c34a8eb0013a9e412ce3 MD5 | raw file
  1/* linux/arch/arm/mach-s3c2410/time.c
  2 *
  3 * Copyright (C) 2003-2005 Simtec Electronics
  4 *	Ben Dooks, <ben@simtec.co.uk>
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License as published by
  8 * the Free Software Foundation; either version 2 of the License, or
  9 * (at your option) any later version.
 10 *
 11 * This program is distributed in the hope that it will be useful,
 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14 * GNU General Public License for more details.
 15 *
 16 * You should have received a copy of the GNU General Public License
 17 * along with this program; if not, write to the Free Software
 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 19 */
 20
 21#include <linux/config.h>
 22#include <linux/kernel.h>
 23#include <linux/sched.h>
 24#include <linux/init.h>
 25#include <linux/interrupt.h>
 26#include <linux/err.h>
 27
 28#include <asm/system.h>
 29#include <asm/leds.h>
 30#include <asm/mach-types.h>
 31
 32#include <asm/io.h>
 33#include <asm/irq.h>
 34#include <asm/arch/map.h>
 35#include <asm/arch/regs-timer.h>
 36#include <asm/arch/regs-irq.h>
 37#include <asm/mach/time.h>
 38#include <asm/hardware/clock.h>
 39
 40#include "clock.h"
 41
 42static unsigned long timer_startval;
 43static unsigned long timer_usec_ticks;
 44
 45#define TIMER_USEC_SHIFT 16
 46
 47/* we use the shifted arithmetic to work out the ratio of timer ticks
 48 * to usecs, as often the peripheral clock is not a nice even multiple
 49 * of 1MHz.
 50 *
 51 * shift of 14 and 15 are too low for the 12MHz, 16 seems to be ok
 52 * for the current HZ value of 200 without producing overflows.
 53 *
 54 * Original patch by Dimitry Andric, updated by Ben Dooks
 55*/
 56
 57
 58/* timer_mask_usec_ticks
 59 *
 60 * given a clock and divisor, make the value to pass into timer_ticks_to_usec
 61 * to scale the ticks into usecs
 62*/
 63
 64static inline unsigned long
 65timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk)
 66{
 67	unsigned long den = pclk / 1000;
 68
 69	return ((1000 << TIMER_USEC_SHIFT) * scaler + (den >> 1)) / den;
 70}
 71
 72/* timer_ticks_to_usec
 73 *
 74 * convert timer ticks to usec.
 75*/
 76
 77static inline unsigned long timer_ticks_to_usec(unsigned long ticks)
 78{
 79	unsigned long res;
 80
 81	res = ticks * timer_usec_ticks;
 82	res += 1 << (TIMER_USEC_SHIFT - 4);	/* round up slightly */
 83
 84	return res >> TIMER_USEC_SHIFT;
 85}
 86
 87/***
 88 * Returns microsecond  since last clock interrupt.  Note that interrupts
 89 * will have been disabled by do_gettimeoffset()
 90 * IRQs are disabled before entering here from do_gettimeofday()
 91 */
 92
 93#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0))
 94
 95static unsigned long s3c2410_gettimeoffset (void)
 96{
 97	unsigned long tdone;
 98	unsigned long irqpend;
 99	unsigned long tval;
100
101	/* work out how many ticks have gone since last timer interrupt */
102
103        tval =  __raw_readl(S3C2410_TCNTO(4));
104	tdone = timer_startval - tval;
105
106	/* check to see if there is an interrupt pending */
107
108	irqpend = __raw_readl(S3C2410_SRCPND);
109	if (irqpend & SRCPND_TIMER4) {
110		/* re-read the timer, and try and fix up for the missed
111		 * interrupt. Note, the interrupt may go off before the
112		 * timer has re-loaded from wrapping.
113		 */
114
115		tval =  __raw_readl(S3C2410_TCNTO(4));
116		tdone = timer_startval - tval;
117
118		if (tval != 0)
119			tdone += timer_startval;
120	}
121
122	return timer_ticks_to_usec(tdone);
123}
124
125
126/*
127 * IRQ handler for the timer
128 */
129static irqreturn_t
130s3c2410_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
131{
132	write_seqlock(&xtime_lock);
133	timer_tick(regs);
134	write_sequnlock(&xtime_lock);
135	return IRQ_HANDLED;
136}
137
138static struct irqaction s3c2410_timer_irq = {
139	.name		= "S3C2410 Timer Tick",
140	.flags		= SA_INTERRUPT,
141	.handler	= s3c2410_timer_interrupt
142};
143
144/*
145 * Set up timer interrupt, and return the current time in seconds.
146 *
147 * Currently we only use timer4, as it is the only timer which has no
148 * other function that can be exploited externally
149 */
150static void s3c2410_timer_setup (void)
151{
152	unsigned long tcon;
153	unsigned long tcnt;
154	unsigned long tcfg1;
155	unsigned long tcfg0;
156
157	tcnt = 0xffff;  /* default value for tcnt */
158
159	/* read the current timer configuration bits */
160
161	tcon = __raw_readl(S3C2410_TCON);
162	tcfg1 = __raw_readl(S3C2410_TCFG1);
163	tcfg0 = __raw_readl(S3C2410_TCFG0);
164
165	/* configure the system for whichever machine is in use */
166
167	if (machine_is_bast() || machine_is_vr1000()) {
168		/* timer is at 12MHz, scaler is 1 */
169		timer_usec_ticks = timer_mask_usec_ticks(1, 12000000);
170		tcnt = 12000000 / HZ;
171
172		tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
173		tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
174	} else {
175		unsigned long pclk;
176		struct clk *clk;
177
178		/* for the h1940 (and others), we use the pclk from the core
179		 * to generate the timer values. since values around 50 to
180		 * 70MHz are not values we can directly generate the timer
181		 * value from, we need to pre-scale and divide before using it.
182		 *
183		 * for instance, using 50.7MHz and dividing by 6 gives 8.45MHz
184		 * (8.45 ticks per usec)
185		 */
186
187		/* this is used as default if no other timer can be found */
188
189		clk = clk_get(NULL, "timers");
190		if (IS_ERR(clk))
191			panic("failed to get clock for system timer");
192
193		clk_use(clk);
194		clk_enable(clk);
195
196		pclk = clk_get_rate(clk);
197
198		/* configure clock tick */
199
200		timer_usec_ticks = timer_mask_usec_ticks(6, pclk);
201
202		tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
203		tcfg1 |= S3C2410_TCFG1_MUX4_DIV2;
204
205		tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
206		tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT;
207
208		tcnt = (pclk / 6) / HZ;
209	}
210
211	/* timers reload after counting zero, so reduce the count by 1 */
212
213	tcnt--;
214
215	printk("timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n",
216	       tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks);
217
218	/* check to see if timer is within 16bit range... */
219	if (tcnt > 0xffff) {
220		panic("setup_timer: HZ is too small, cannot configure timer!");
221		return;
222	}
223
224	__raw_writel(tcfg1, S3C2410_TCFG1);
225	__raw_writel(tcfg0, S3C2410_TCFG0);
226
227	timer_startval = tcnt;
228	__raw_writel(tcnt, S3C2410_TCNTB(4));
229
230	/* ensure timer is stopped... */
231
232	tcon &= ~(7<<20);
233	tcon |= S3C2410_TCON_T4RELOAD;
234	tcon |= S3C2410_TCON_T4MANUALUPD;
235
236	__raw_writel(tcon, S3C2410_TCON);
237	__raw_writel(tcnt, S3C2410_TCNTB(4));
238	__raw_writel(tcnt, S3C2410_TCMPB(4));
239
240	/* start the timer running */
241	tcon |= S3C2410_TCON_T4START;
242	tcon &= ~S3C2410_TCON_T4MANUALUPD;
243	__raw_writel(tcon, S3C2410_TCON);
244}
245
246static void __init s3c2410_timer_init (void)
247{
248	s3c2410_timer_setup();
249	setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
250}
251
252struct sys_timer s3c24xx_timer = {
253	.init		= s3c2410_timer_init,
254	.offset		= s3c2410_gettimeoffset,
255	.resume		= s3c2410_timer_setup
256};