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/arch/arm/mach-omap/time.c

https://bitbucket.org/evzijst/gittest
C | 384 lines | 211 code | 54 blank | 119 comment | 1 complexity | fea7a357139de8bd65f0bf6fad07a15a MD5 | raw file
  1/*
  2 * linux/arch/arm/mach-omap/time.c
  3 *
  4 * OMAP Timers
  5 *
  6 * Copyright (C) 2004 Nokia Corporation
  7 * Partial timer rewrite and additional VST timer support by
  8 * Tony Lindgen <tony@atomide.com> and
  9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
 10 *
 11 * MPU timer code based on the older MPU timer code for OMAP
 12 * Copyright (C) 2000 RidgeRun, Inc.
 13 * Author: Greg Lonnon <glonnon@ridgerun.com>
 14 *
 15 * This program is free software; you can redistribute it and/or modify it
 16 * under the terms of the GNU General Public License as published by the
 17 * Free Software Foundation; either version 2 of the License, or (at your
 18 * option) any later version.
 19 *
 20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
 21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
 23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
 26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 30 *
 31 * You should have received a copy of the  GNU General Public License along
 32 * with this program; if not, write  to the Free Software Foundation, Inc.,
 33 * 675 Mass Ave, Cambridge, MA 02139, USA.
 34 */
 35
 36#include <linux/config.h>
 37#include <linux/kernel.h>
 38#include <linux/init.h>
 39#include <linux/delay.h>
 40#include <linux/interrupt.h>
 41#include <linux/sched.h>
 42#include <linux/spinlock.h>
 43
 44#include <asm/system.h>
 45#include <asm/hardware.h>
 46#include <asm/io.h>
 47#include <asm/leds.h>
 48#include <asm/irq.h>
 49#include <asm/mach/irq.h>
 50#include <asm/mach/time.h>
 51
 52struct sys_timer omap_timer;
 53
 54#ifdef CONFIG_OMAP_MPU_TIMER
 55
 56/*
 57 * ---------------------------------------------------------------------------
 58 * MPU timer
 59 * ---------------------------------------------------------------------------
 60 */
 61#define OMAP_MPU_TIMER1_BASE		(0xfffec500)
 62#define OMAP_MPU_TIMER2_BASE		(0xfffec600)
 63#define OMAP_MPU_TIMER3_BASE		(0xfffec700)
 64#define OMAP_MPU_TIMER_BASE		OMAP_MPU_TIMER1_BASE
 65#define OMAP_MPU_TIMER_OFFSET		0x100
 66
 67#define MPU_TIMER_FREE			(1 << 6)
 68#define MPU_TIMER_CLOCK_ENABLE		(1 << 5)
 69#define MPU_TIMER_AR			(1 << 1)
 70#define MPU_TIMER_ST			(1 << 0)
 71
 72/* cycles to nsec conversions taken from arch/i386/kernel/timers/timer_tsc.c,
 73 * converted to use kHz by Kevin Hilman */
 74/* convert from cycles(64bits) => nanoseconds (64bits)
 75 *  basic equation:
 76 *		ns = cycles / (freq / ns_per_sec)
 77 *		ns = cycles * (ns_per_sec / freq)
 78 *		ns = cycles * (10^9 / (cpu_khz * 10^3))
 79 *		ns = cycles * (10^6 / cpu_khz)
 80 *
 81 *	Then we use scaling math (suggested by george at mvista.com) to get:
 82 *		ns = cycles * (10^6 * SC / cpu_khz / SC
 83 *		ns = cycles * cyc2ns_scale / SC
 84 *
 85 *	And since SC is a constant power of two, we can convert the div
 86 *  into a shift.
 87 *			-johnstul at us.ibm.com "math is hard, lets go shopping!"
 88 */
 89static unsigned long cyc2ns_scale;
 90#define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
 91
 92static inline void set_cyc2ns_scale(unsigned long cpu_khz)
 93{
 94	cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
 95}
 96
 97static inline unsigned long long cycles_2_ns(unsigned long long cyc)
 98{
 99	return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
100}
101
102/*
103 * MPU_TICKS_PER_SEC must be an even number, otherwise machinecycles_to_usecs
104 * will break. On P2, the timer count rate is 6.5 MHz after programming PTV
105 * with 0. This divides the 13MHz input by 2, and is undocumented.
106 */
107#ifdef CONFIG_MACH_OMAP_PERSEUS2
108/* REVISIT: This ifdef construct should be replaced by a query to clock
109 * framework to see if timer base frequency is 12.0, 13.0 or 19.2 MHz.
110 */
111#define MPU_TICKS_PER_SEC		(13000000 / 2)
112#else
113#define MPU_TICKS_PER_SEC		(12000000 / 2)
114#endif
115
116#define MPU_TIMER_TICK_PERIOD		((MPU_TICKS_PER_SEC / HZ) - 1)
117
118typedef struct {
119	u32 cntl;			/* CNTL_TIMER, R/W */
120	u32 load_tim;			/* LOAD_TIM,   W */
121	u32 read_tim;			/* READ_TIM,   R */
122} omap_mpu_timer_regs_t;
123
124#define omap_mpu_timer_base(n)						\
125((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE +	\
126				 (n)*OMAP_MPU_TIMER_OFFSET))
127
128static inline unsigned long omap_mpu_timer_read(int nr)
129{
130	volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
131	return timer->read_tim;
132}
133
134static inline void omap_mpu_timer_start(int nr, unsigned long load_val)
135{
136	volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
137
138	timer->cntl = MPU_TIMER_CLOCK_ENABLE;
139	udelay(1);
140	timer->load_tim = load_val;
141        udelay(1);
142	timer->cntl = (MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_AR | MPU_TIMER_ST);
143}
144
145unsigned long omap_mpu_timer_ticks_to_usecs(unsigned long nr_ticks)
146{
147	unsigned long long nsec;
148
149	nsec = cycles_2_ns((unsigned long long)nr_ticks);
150	return (unsigned long)nsec / 1000;
151}
152
153/*
154 * Last processed system timer interrupt
155 */
156static unsigned long omap_mpu_timer_last = 0;
157
158/*
159 * Returns elapsed usecs since last system timer interrupt
160 */
161static unsigned long omap_mpu_timer_gettimeoffset(void)
162{
163	unsigned long now = 0 - omap_mpu_timer_read(0);
164	unsigned long elapsed = now - omap_mpu_timer_last;
165
166	return omap_mpu_timer_ticks_to_usecs(elapsed);
167}
168
169/*
170 * Elapsed time between interrupts is calculated using timer0.
171 * Latency during the interrupt is calculated using timer1.
172 * Both timer0 and timer1 are counting at 6MHz (P2 6.5MHz).
173 */
174static irqreturn_t omap_mpu_timer_interrupt(int irq, void *dev_id,
175					struct pt_regs *regs)
176{
177	unsigned long now, latency;
178
179	write_seqlock(&xtime_lock);
180	now = 0 - omap_mpu_timer_read(0);
181	latency = MPU_TICKS_PER_SEC / HZ - omap_mpu_timer_read(1);
182	omap_mpu_timer_last = now - latency;
183	timer_tick(regs);
184	write_sequnlock(&xtime_lock);
185
186	return IRQ_HANDLED;
187}
188
189static struct irqaction omap_mpu_timer_irq = {
190	.name		= "mpu timer",
191	.flags		= SA_INTERRUPT,
192	.handler	= omap_mpu_timer_interrupt
193};
194
195static unsigned long omap_mpu_timer1_overflows;
196static irqreturn_t omap_mpu_timer1_interrupt(int irq, void *dev_id,
197					     struct pt_regs *regs)
198{
199	omap_mpu_timer1_overflows++;
200	return IRQ_HANDLED;
201}
202
203static struct irqaction omap_mpu_timer1_irq = {
204	.name		= "mpu timer1 overflow",
205	.flags		= SA_INTERRUPT,
206	.handler	= omap_mpu_timer1_interrupt
207};
208
209static __init void omap_init_mpu_timer(void)
210{
211	set_cyc2ns_scale(MPU_TICKS_PER_SEC / 1000);
212	omap_timer.offset = omap_mpu_timer_gettimeoffset;
213	setup_irq(INT_TIMER1, &omap_mpu_timer1_irq);
214	setup_irq(INT_TIMER2, &omap_mpu_timer_irq);
215	omap_mpu_timer_start(0, 0xffffffff);
216	omap_mpu_timer_start(1, MPU_TIMER_TICK_PERIOD);
217}
218
219/*
220 * Scheduler clock - returns current time in nanosec units.
221 */
222unsigned long long sched_clock(void)
223{
224	unsigned long ticks = 0 - omap_mpu_timer_read(0);
225	unsigned long long ticks64;
226
227	ticks64 = omap_mpu_timer1_overflows;
228	ticks64 <<= 32;
229	ticks64 |= ticks;
230
231	return cycles_2_ns(ticks64);
232}
233#endif	/* CONFIG_OMAP_MPU_TIMER */
234
235#ifdef CONFIG_OMAP_32K_TIMER
236
237#ifdef CONFIG_ARCH_OMAP1510
238#error OMAP 32KHz timer does not currently work on 1510!
239#endif
240
241/*
242 * ---------------------------------------------------------------------------
243 * 32KHz OS timer
244 *
245 * This currently works only on 16xx, as 1510 does not have the continuous
246 * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track
247 * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer
248 * on 1510 would be possible, but the timer would not be as accurate as
249 * with the 32KHz synchronized timer.
250 * ---------------------------------------------------------------------------
251 */
252#define OMAP_32K_TIMER_BASE		0xfffb9000
253#define OMAP_32K_TIMER_CR		0x08
254#define OMAP_32K_TIMER_TVR		0x00
255#define OMAP_32K_TIMER_TCR		0x04
256
257#define OMAP_32K_TICKS_PER_HZ		(32768 / HZ)
258
259/*
260 * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1
261 * so with HZ = 100, TVR = 327.68.
262 */
263#define OMAP_32K_TIMER_TICK_PERIOD	((32768 / HZ) - 1)
264#define MAX_SKIP_JIFFIES		25
265#define TIMER_32K_SYNCHRONIZED		0xfffbc410
266
267#define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate)			\
268				(((nr_jiffies) * (clock_rate)) / HZ)
269
270static inline void omap_32k_timer_write(int val, int reg)
271{
272	omap_writew(val, reg + OMAP_32K_TIMER_BASE);
273}
274
275static inline unsigned long omap_32k_timer_read(int reg)
276{
277	return omap_readl(reg + OMAP_32K_TIMER_BASE) & 0xffffff;
278}
279
280/*
281 * The 32KHz synchronized timer is an additional timer on 16xx.
282 * It is always running.
283 */
284static inline unsigned long omap_32k_sync_timer_read(void)
285{
286	return omap_readl(TIMER_32K_SYNCHRONIZED);
287}
288
289static inline void omap_32k_timer_start(unsigned long load_val)
290{
291	omap_32k_timer_write(load_val, OMAP_32K_TIMER_TVR);
292	omap_32k_timer_write(0x0f, OMAP_32K_TIMER_CR);
293}
294
295static inline void omap_32k_timer_stop(void)
296{
297	omap_32k_timer_write(0x0, OMAP_32K_TIMER_CR);
298}
299
300/*
301 * Rounds down to nearest usec
302 */
303static inline unsigned long omap_32k_ticks_to_usecs(unsigned long ticks_32k)
304{
305	return (ticks_32k * 5*5*5*5*5*5) >> 9;
306}
307
308static unsigned long omap_32k_last_tick = 0;
309
310/*
311 * Returns elapsed usecs since last 32k timer interrupt
312 */
313static unsigned long omap_32k_timer_gettimeoffset(void)
314{
315	unsigned long now = omap_32k_sync_timer_read();
316	return omap_32k_ticks_to_usecs(now - omap_32k_last_tick);
317}
318
319/*
320 * Timer interrupt for 32KHz timer. When dynamic tick is enabled, this
321 * function is also called from other interrupts to remove latency
322 * issues with dynamic tick. In the dynamic tick case, we need to lock
323 * with irqsave.
324 */
325static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id,
326					    struct pt_regs *regs)
327{
328	unsigned long flags;
329	unsigned long now;
330
331	write_seqlock_irqsave(&xtime_lock, flags);
332	now = omap_32k_sync_timer_read();
333
334	while (now - omap_32k_last_tick >= OMAP_32K_TICKS_PER_HZ) {
335		omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
336		timer_tick(regs);
337	}
338
339	/* Restart timer so we don't drift off due to modulo or dynamic tick.
340	 * By default we program the next timer to be continuous to avoid
341	 * latencies during high system load. During dynamic tick operation the
342	 * continuous timer can be overridden from pm_idle to be longer.
343	 */
344	omap_32k_timer_start(omap_32k_last_tick + OMAP_32K_TICKS_PER_HZ - now);
345	write_sequnlock_irqrestore(&xtime_lock, flags);
346
347	return IRQ_HANDLED;
348}
349
350static struct irqaction omap_32k_timer_irq = {
351	.name		= "32KHz timer",
352	.flags		= SA_INTERRUPT,
353	.handler	= omap_32k_timer_interrupt
354};
355
356static __init void omap_init_32k_timer(void)
357{
358	setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
359	omap_timer.offset  = omap_32k_timer_gettimeoffset;
360	omap_32k_last_tick = omap_32k_sync_timer_read();
361	omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
362}
363#endif	/* CONFIG_OMAP_32K_TIMER */
364
365/*
366 * ---------------------------------------------------------------------------
367 * Timer initialization
368 * ---------------------------------------------------------------------------
369 */
370void __init omap_timer_init(void)
371{
372#if defined(CONFIG_OMAP_MPU_TIMER)
373	omap_init_mpu_timer();
374#elif defined(CONFIG_OMAP_32K_TIMER)
375	omap_init_32k_timer();
376#else
377#error No system timer selected in Kconfig!
378#endif
379}
380
381struct sys_timer omap_timer = {
382	.init		= omap_timer_init,
383	.offset		= NULL,		/* Initialized later */
384};