/Documentation/arm/Sharp-LH/LPD7A40X

 1README on Implementing Linux for the Logic PD LPD7A40X-10
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 4- CPLD memory mapping
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 6  The board designers chose to use high address lines for controlling
 7  access to the CPLD registers.  It turns out to be a big waste
 8  because we're using an MMU and must map IO space into virtual
 9  memory.  The result is that we have to make a mapping for every
10  register.
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12- Serial Console
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14  It may be OK not to use the serial console option if the user passes
15  the console device name to the kernel.  This deserves some exploration.
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