PageRenderTime 4ms CodeModel.GetById 1ms app.highlight 0ms RepoModel.GetById 1ms app.codeStats 0ms

/docs/source/api/circuits_core_pools.rst

https://bitbucket.org/prologic/circuits/
ReStructuredText | 23 lines | 13 code | 10 blank | 0 comment | 0 complexity | e64109288a1af4985cbd67cfe7032f6f MD5 | raw file
 1:mod:`circuits.core.pools` -- Worker Pools
 2==========================================
 3
 4.. automodule :: circuits.core.pools
 5
 6
 7Events
 8------
 9
10**none**
11
12
13Components
14----------
15
16.. autoclass :: Pool
17   :members:
18
19
20Functions
21---------
22
23**none**