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/drivers/pcmcia/yenta_socket.c

https://bitbucket.org/zossso/android-kernel-2.6.34-motus
C | 1469 lines | 1068 code | 224 blank | 177 comment | 143 complexity | 85cc0b7f5d3237fc84ed98227473dbdb MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1. /*
  2. * Regular cardbus driver ("yenta_socket")
  3. *
  4. * (C) Copyright 1999, 2000 Linus Torvalds
  5. *
  6. * Changelog:
  7. * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
  8. * Dynamically adjust the size of the bridge resource
  9. *
  10. * May 2003: Dominik Brodowski <linux@brodo.de>
  11. * Merge pci_socket.c and yenta.c into one file
  12. */
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/workqueue.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/delay.h>
  18. #include <linux/module.h>
  19. #include <linux/io.h>
  20. #include <linux/slab.h>
  21. #include <pcmcia/cs_types.h>
  22. #include <pcmcia/ss.h>
  23. #include <pcmcia/cs.h>
  24. #include "yenta_socket.h"
  25. #include "i82365.h"
  26. static int disable_clkrun;
  27. module_param(disable_clkrun, bool, 0444);
  28. MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
  29. static int isa_probe = 1;
  30. module_param(isa_probe, bool, 0444);
  31. MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
  32. static int pwr_irqs_off;
  33. module_param(pwr_irqs_off, bool, 0644);
  34. MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
  35. static char o2_speedup[] = "default";
  36. module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
  37. MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
  38. "or 'default' (uses recommended behaviour for the detected bridge)");
  39. /*
  40. * Only probe "regular" interrupts, don't
  41. * touch dangerous spots like the mouse irq,
  42. * because there are mice that apparently
  43. * get really confused if they get fondled
  44. * too intimately.
  45. *
  46. * Default to 11, 10, 9, 7, 6, 5, 4, 3.
  47. */
  48. static u32 isa_interrupts = 0x0ef8;
  49. #define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
  50. /* Don't ask.. */
  51. #define to_cycles(ns) ((ns)/120)
  52. #define to_ns(cycles) ((cycles)*120)
  53. /*
  54. * yenta PCI irq probing.
  55. * currently only used in the TI/EnE initialization code
  56. */
  57. #ifdef CONFIG_YENTA_TI
  58. static int yenta_probe_cb_irq(struct yenta_socket *socket);
  59. static unsigned int yenta_probe_irq(struct yenta_socket *socket,
  60. u32 isa_irq_mask);
  61. #endif
  62. static unsigned int override_bios;
  63. module_param(override_bios, uint, 0000);
  64. MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
  65. /*
  66. * Generate easy-to-use ways of reading a cardbus sockets
  67. * regular memory space ("cb_xxx"), configuration space
  68. * ("config_xxx") and compatibility space ("exca_xxxx")
  69. */
  70. static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
  71. {
  72. u32 val = readl(socket->base + reg);
  73. debug("%04x %08x\n", socket, reg, val);
  74. return val;
  75. }
  76. static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
  77. {
  78. debug("%04x %08x\n", socket, reg, val);
  79. writel(val, socket->base + reg);
  80. readl(socket->base + reg); /* avoid problems with PCI write posting */
  81. }
  82. static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
  83. {
  84. u8 val;
  85. pci_read_config_byte(socket->dev, offset, &val);
  86. debug("%04x %02x\n", socket, offset, val);
  87. return val;
  88. }
  89. static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
  90. {
  91. u16 val;
  92. pci_read_config_word(socket->dev, offset, &val);
  93. debug("%04x %04x\n", socket, offset, val);
  94. return val;
  95. }
  96. static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
  97. {
  98. u32 val;
  99. pci_read_config_dword(socket->dev, offset, &val);
  100. debug("%04x %08x\n", socket, offset, val);
  101. return val;
  102. }
  103. static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
  104. {
  105. debug("%04x %02x\n", socket, offset, val);
  106. pci_write_config_byte(socket->dev, offset, val);
  107. }
  108. static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
  109. {
  110. debug("%04x %04x\n", socket, offset, val);
  111. pci_write_config_word(socket->dev, offset, val);
  112. }
  113. static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
  114. {
  115. debug("%04x %08x\n", socket, offset, val);
  116. pci_write_config_dword(socket->dev, offset, val);
  117. }
  118. static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
  119. {
  120. u8 val = readb(socket->base + 0x800 + reg);
  121. debug("%04x %02x\n", socket, reg, val);
  122. return val;
  123. }
  124. static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
  125. {
  126. u16 val;
  127. val = readb(socket->base + 0x800 + reg);
  128. val |= readb(socket->base + 0x800 + reg + 1) << 8;
  129. debug("%04x %04x\n", socket, reg, val);
  130. return val;
  131. }
  132. static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
  133. {
  134. debug("%04x %02x\n", socket, reg, val);
  135. writeb(val, socket->base + 0x800 + reg);
  136. readb(socket->base + 0x800 + reg); /* PCI write posting... */
  137. }
  138. static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
  139. {
  140. debug("%04x %04x\n", socket, reg, val);
  141. writeb(val, socket->base + 0x800 + reg);
  142. writeb(val >> 8, socket->base + 0x800 + reg + 1);
  143. /* PCI write posting... */
  144. readb(socket->base + 0x800 + reg);
  145. readb(socket->base + 0x800 + reg + 1);
  146. }
  147. static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
  148. {
  149. struct pci_dev *dev = to_pci_dev(yentadev);
  150. struct yenta_socket *socket = pci_get_drvdata(dev);
  151. int offset = 0, i;
  152. offset = snprintf(buf, PAGE_SIZE, "CB registers:");
  153. for (i = 0; i < 0x24; i += 4) {
  154. unsigned val;
  155. if (!(i & 15))
  156. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
  157. val = cb_readl(socket, i);
  158. offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
  159. }
  160. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
  161. for (i = 0; i < 0x45; i++) {
  162. unsigned char val;
  163. if (!(i & 7)) {
  164. if (i & 8) {
  165. memcpy(buf + offset, " -", 2);
  166. offset += 2;
  167. } else
  168. offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
  169. }
  170. val = exca_readb(socket, i);
  171. offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
  172. }
  173. buf[offset++] = '\n';
  174. return offset;
  175. }
  176. static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
  177. /*
  178. * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
  179. * on what kind of card is inserted..
  180. */
  181. static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
  182. {
  183. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  184. unsigned int val;
  185. u32 state = cb_readl(socket, CB_SOCKET_STATE);
  186. val = (state & CB_3VCARD) ? SS_3VCARD : 0;
  187. val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
  188. val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
  189. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
  190. if (state & CB_CBCARD) {
  191. val |= SS_CARDBUS;
  192. val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
  193. val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
  194. val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
  195. } else if (state & CB_16BITCARD) {
  196. u8 status = exca_readb(socket, I365_STATUS);
  197. val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
  198. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  199. val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
  200. } else {
  201. val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
  202. val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
  203. }
  204. val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
  205. val |= (status & I365_CS_READY) ? SS_READY : 0;
  206. val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
  207. }
  208. *value = val;
  209. return 0;
  210. }
  211. static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
  212. {
  213. /* some birdges require to use the ExCA registers to power 16bit cards */
  214. if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
  215. (socket->flags & YENTA_16BIT_POWER_EXCA)) {
  216. u8 reg, old;
  217. reg = old = exca_readb(socket, I365_POWER);
  218. reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
  219. /* i82365SL-DF style */
  220. if (socket->flags & YENTA_16BIT_POWER_DF) {
  221. switch (state->Vcc) {
  222. case 33:
  223. reg |= I365_VCC_3V;
  224. break;
  225. case 50:
  226. reg |= I365_VCC_5V;
  227. break;
  228. default:
  229. reg = 0;
  230. break;
  231. }
  232. switch (state->Vpp) {
  233. case 33:
  234. case 50:
  235. reg |= I365_VPP1_5V;
  236. break;
  237. case 120:
  238. reg |= I365_VPP1_12V;
  239. break;
  240. }
  241. } else {
  242. /* i82365SL-B style */
  243. switch (state->Vcc) {
  244. case 50:
  245. reg |= I365_VCC_5V;
  246. break;
  247. default:
  248. reg = 0;
  249. break;
  250. }
  251. switch (state->Vpp) {
  252. case 50:
  253. reg |= I365_VPP1_5V | I365_VPP2_5V;
  254. break;
  255. case 120:
  256. reg |= I365_VPP1_12V | I365_VPP2_12V;
  257. break;
  258. }
  259. }
  260. if (reg != old)
  261. exca_writeb(socket, I365_POWER, reg);
  262. } else {
  263. u32 reg = 0; /* CB_SC_STPCLK? */
  264. switch (state->Vcc) {
  265. case 33:
  266. reg = CB_SC_VCC_3V;
  267. break;
  268. case 50:
  269. reg = CB_SC_VCC_5V;
  270. break;
  271. default:
  272. reg = 0;
  273. break;
  274. }
  275. switch (state->Vpp) {
  276. case 33:
  277. reg |= CB_SC_VPP_3V;
  278. break;
  279. case 50:
  280. reg |= CB_SC_VPP_5V;
  281. break;
  282. case 120:
  283. reg |= CB_SC_VPP_12V;
  284. break;
  285. }
  286. if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
  287. cb_writel(socket, CB_SOCKET_CONTROL, reg);
  288. }
  289. }
  290. static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
  291. {
  292. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  293. u16 bridge;
  294. /* if powering down: do it immediately */
  295. if (state->Vcc == 0)
  296. yenta_set_power(socket, state);
  297. socket->io_irq = state->io_irq;
  298. bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
  299. if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
  300. u8 intr;
  301. bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
  302. /* ISA interrupt control? */
  303. intr = exca_readb(socket, I365_INTCTL);
  304. intr = (intr & ~0xf);
  305. if (!socket->dev->irq) {
  306. intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
  307. bridge |= CB_BRIDGE_INTR;
  308. }
  309. exca_writeb(socket, I365_INTCTL, intr);
  310. } else {
  311. u8 reg;
  312. reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
  313. reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
  314. reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
  315. if (state->io_irq != socket->dev->irq) {
  316. reg |= state->io_irq;
  317. bridge |= CB_BRIDGE_INTR;
  318. }
  319. exca_writeb(socket, I365_INTCTL, reg);
  320. reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
  321. reg |= I365_PWR_NORESET;
  322. if (state->flags & SS_PWR_AUTO)
  323. reg |= I365_PWR_AUTO;
  324. if (state->flags & SS_OUTPUT_ENA)
  325. reg |= I365_PWR_OUT;
  326. if (exca_readb(socket, I365_POWER) != reg)
  327. exca_writeb(socket, I365_POWER, reg);
  328. /* CSC interrupt: no ISA irq for CSC */
  329. reg = exca_readb(socket, I365_CSCINT);
  330. reg &= I365_CSC_IRQ_MASK;
  331. reg |= I365_CSC_DETECT;
  332. if (state->flags & SS_IOCARD) {
  333. if (state->csc_mask & SS_STSCHG)
  334. reg |= I365_CSC_STSCHG;
  335. } else {
  336. if (state->csc_mask & SS_BATDEAD)
  337. reg |= I365_CSC_BVD1;
  338. if (state->csc_mask & SS_BATWARN)
  339. reg |= I365_CSC_BVD2;
  340. if (state->csc_mask & SS_READY)
  341. reg |= I365_CSC_READY;
  342. }
  343. exca_writeb(socket, I365_CSCINT, reg);
  344. exca_readb(socket, I365_CSC);
  345. if (sock->zoom_video)
  346. sock->zoom_video(sock, state->flags & SS_ZVCARD);
  347. }
  348. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  349. /* Socket event mask: get card insert/remove events.. */
  350. cb_writel(socket, CB_SOCKET_EVENT, -1);
  351. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  352. /* if powering up: do it as the last step when the socket is configured */
  353. if (state->Vcc != 0)
  354. yenta_set_power(socket, state);
  355. return 0;
  356. }
  357. static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
  358. {
  359. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  360. int map;
  361. unsigned char ioctl, addr, enable;
  362. map = io->map;
  363. if (map > 1)
  364. return -EINVAL;
  365. enable = I365_ENA_IO(map);
  366. addr = exca_readb(socket, I365_ADDRWIN);
  367. /* Disable the window before changing it.. */
  368. if (addr & enable) {
  369. addr &= ~enable;
  370. exca_writeb(socket, I365_ADDRWIN, addr);
  371. }
  372. exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
  373. exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
  374. ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
  375. if (io->flags & MAP_0WS)
  376. ioctl |= I365_IOCTL_0WS(map);
  377. if (io->flags & MAP_16BIT)
  378. ioctl |= I365_IOCTL_16BIT(map);
  379. if (io->flags & MAP_AUTOSZ)
  380. ioctl |= I365_IOCTL_IOCS16(map);
  381. exca_writeb(socket, I365_IOCTL, ioctl);
  382. if (io->flags & MAP_ACTIVE)
  383. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  384. return 0;
  385. }
  386. static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
  387. {
  388. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  389. struct pci_bus_region region;
  390. int map;
  391. unsigned char addr, enable;
  392. unsigned int start, stop, card_start;
  393. unsigned short word;
  394. pcibios_resource_to_bus(socket->dev, &region, mem->res);
  395. map = mem->map;
  396. start = region.start;
  397. stop = region.end;
  398. card_start = mem->card_start;
  399. if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
  400. (card_start >> 26) || mem->speed > 1000)
  401. return -EINVAL;
  402. enable = I365_ENA_MEM(map);
  403. addr = exca_readb(socket, I365_ADDRWIN);
  404. if (addr & enable) {
  405. addr &= ~enable;
  406. exca_writeb(socket, I365_ADDRWIN, addr);
  407. }
  408. exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
  409. word = (start >> 12) & 0x0fff;
  410. if (mem->flags & MAP_16BIT)
  411. word |= I365_MEM_16BIT;
  412. if (mem->flags & MAP_0WS)
  413. word |= I365_MEM_0WS;
  414. exca_writew(socket, I365_MEM(map) + I365_W_START, word);
  415. word = (stop >> 12) & 0x0fff;
  416. switch (to_cycles(mem->speed)) {
  417. case 0:
  418. break;
  419. case 1:
  420. word |= I365_MEM_WS0;
  421. break;
  422. case 2:
  423. word |= I365_MEM_WS1;
  424. break;
  425. default:
  426. word |= I365_MEM_WS1 | I365_MEM_WS0;
  427. break;
  428. }
  429. exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
  430. word = ((card_start - start) >> 12) & 0x3fff;
  431. if (mem->flags & MAP_WRPROT)
  432. word |= I365_MEM_WRPROT;
  433. if (mem->flags & MAP_ATTRIB)
  434. word |= I365_MEM_REG;
  435. exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
  436. if (mem->flags & MAP_ACTIVE)
  437. exca_writeb(socket, I365_ADDRWIN, addr | enable);
  438. return 0;
  439. }
  440. static irqreturn_t yenta_interrupt(int irq, void *dev_id)
  441. {
  442. unsigned int events;
  443. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  444. u8 csc;
  445. u32 cb_event;
  446. /* Clear interrupt status for the event */
  447. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  448. cb_writel(socket, CB_SOCKET_EVENT, cb_event);
  449. csc = exca_readb(socket, I365_CSC);
  450. if (!(cb_event || csc))
  451. return IRQ_NONE;
  452. events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
  453. events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
  454. if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
  455. events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
  456. } else {
  457. events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
  458. events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
  459. events |= (csc & I365_CSC_READY) ? SS_READY : 0;
  460. }
  461. if (events)
  462. pcmcia_parse_events(&socket->socket, events);
  463. return IRQ_HANDLED;
  464. }
  465. static void yenta_interrupt_wrapper(unsigned long data)
  466. {
  467. struct yenta_socket *socket = (struct yenta_socket *) data;
  468. yenta_interrupt(0, (void *)socket);
  469. socket->poll_timer.expires = jiffies + HZ;
  470. add_timer(&socket->poll_timer);
  471. }
  472. static void yenta_clear_maps(struct yenta_socket *socket)
  473. {
  474. int i;
  475. struct resource res = { .start = 0, .end = 0x0fff };
  476. pccard_io_map io = { 0, 0, 0, 0, 1 };
  477. pccard_mem_map mem = { .res = &res, };
  478. yenta_set_socket(&socket->socket, &dead_socket);
  479. for (i = 0; i < 2; i++) {
  480. io.map = i;
  481. yenta_set_io_map(&socket->socket, &io);
  482. }
  483. for (i = 0; i < 5; i++) {
  484. mem.map = i;
  485. yenta_set_mem_map(&socket->socket, &mem);
  486. }
  487. }
  488. /* redoes voltage interrogation if required */
  489. static void yenta_interrogate(struct yenta_socket *socket)
  490. {
  491. u32 state;
  492. state = cb_readl(socket, CB_SOCKET_STATE);
  493. if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
  494. (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
  495. ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
  496. cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
  497. }
  498. /* Called at resume and initialization events */
  499. static int yenta_sock_init(struct pcmcia_socket *sock)
  500. {
  501. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  502. exca_writeb(socket, I365_GBLCTL, 0x00);
  503. exca_writeb(socket, I365_GENCTL, 0x00);
  504. /* Redo card voltage interrogation */
  505. yenta_interrogate(socket);
  506. yenta_clear_maps(socket);
  507. if (socket->type && socket->type->sock_init)
  508. socket->type->sock_init(socket);
  509. /* Re-enable CSC interrupts */
  510. cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
  511. return 0;
  512. }
  513. static int yenta_sock_suspend(struct pcmcia_socket *sock)
  514. {
  515. struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
  516. /* Disable CSC interrupts */
  517. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  518. return 0;
  519. }
  520. /*
  521. * Use an adaptive allocation for the memory resource,
  522. * sometimes the memory behind pci bridges is limited:
  523. * 1/8 of the size of the io window of the parent.
  524. * max 4 MB, min 16 kB. We try very hard to not get below
  525. * the "ACC" values, though.
  526. */
  527. #define BRIDGE_MEM_MAX (4*1024*1024)
  528. #define BRIDGE_MEM_ACC (128*1024)
  529. #define BRIDGE_MEM_MIN (16*1024)
  530. #define BRIDGE_IO_MAX 512
  531. #define BRIDGE_IO_ACC 256
  532. #define BRIDGE_IO_MIN 32
  533. #ifndef PCIBIOS_MIN_CARDBUS_IO
  534. #define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
  535. #endif
  536. static int yenta_search_one_res(struct resource *root, struct resource *res,
  537. u32 min)
  538. {
  539. u32 align, size, start, end;
  540. if (res->flags & IORESOURCE_IO) {
  541. align = 1024;
  542. size = BRIDGE_IO_MAX;
  543. start = PCIBIOS_MIN_CARDBUS_IO;
  544. end = ~0U;
  545. } else {
  546. unsigned long avail = root->end - root->start;
  547. int i;
  548. size = BRIDGE_MEM_MAX;
  549. if (size > avail/8) {
  550. size = (avail+1)/8;
  551. /* round size down to next power of 2 */
  552. i = 0;
  553. while ((size /= 2) != 0)
  554. i++;
  555. size = 1 << i;
  556. }
  557. if (size < min)
  558. size = min;
  559. align = size;
  560. start = PCIBIOS_MIN_MEM;
  561. end = ~0U;
  562. }
  563. do {
  564. if (allocate_resource(root, res, size, start, end, align,
  565. NULL, NULL) == 0) {
  566. return 1;
  567. }
  568. size = size/2;
  569. align = size;
  570. } while (size >= min);
  571. return 0;
  572. }
  573. static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
  574. u32 min)
  575. {
  576. struct resource *root;
  577. int i;
  578. pci_bus_for_each_resource(socket->dev->bus, root, i) {
  579. if (!root)
  580. continue;
  581. if ((res->flags ^ root->flags) &
  582. (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
  583. continue; /* Wrong type */
  584. if (yenta_search_one_res(root, res, min))
  585. return 1;
  586. }
  587. return 0;
  588. }
  589. static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
  590. {
  591. struct pci_dev *dev = socket->dev;
  592. struct resource *res;
  593. struct pci_bus_region region;
  594. unsigned mask;
  595. res = dev->resource + PCI_BRIDGE_RESOURCES + nr;
  596. /* Already allocated? */
  597. if (res->parent)
  598. return 0;
  599. /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
  600. mask = ~0xfff;
  601. if (type & IORESOURCE_IO)
  602. mask = ~3;
  603. res->name = dev->subordinate->name;
  604. res->flags = type;
  605. region.start = config_readl(socket, addr_start) & mask;
  606. region.end = config_readl(socket, addr_end) | ~mask;
  607. if (region.start && region.end > region.start && !override_bios) {
  608. pcibios_bus_to_resource(dev, res, &region);
  609. if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
  610. return 0;
  611. dev_printk(KERN_INFO, &dev->dev,
  612. "Preassigned resource %d busy or not available, "
  613. "reconfiguring...\n",
  614. nr);
  615. }
  616. if (type & IORESOURCE_IO) {
  617. if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
  618. (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
  619. (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
  620. return 1;
  621. } else {
  622. if (type & IORESOURCE_PREFETCH) {
  623. if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
  624. (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
  625. (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
  626. return 1;
  627. /* Approximating prefetchable by non-prefetchable */
  628. res->flags = IORESOURCE_MEM;
  629. }
  630. if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
  631. (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
  632. (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
  633. return 1;
  634. }
  635. dev_printk(KERN_INFO, &dev->dev,
  636. "no resource of type %x available, trying to continue...\n",
  637. type);
  638. res->start = res->end = res->flags = 0;
  639. return 0;
  640. }
  641. /*
  642. * Allocate the bridge mappings for the device..
  643. */
  644. static void yenta_allocate_resources(struct yenta_socket *socket)
  645. {
  646. int program = 0;
  647. program += yenta_allocate_res(socket, 0, IORESOURCE_IO,
  648. PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
  649. program += yenta_allocate_res(socket, 1, IORESOURCE_IO,
  650. PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
  651. program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
  652. PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
  653. program += yenta_allocate_res(socket, 3, IORESOURCE_MEM,
  654. PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
  655. if (program)
  656. pci_setup_cardbus(socket->dev->subordinate);
  657. }
  658. /*
  659. * Free the bridge mappings for the device..
  660. */
  661. static void yenta_free_resources(struct yenta_socket *socket)
  662. {
  663. int i;
  664. for (i = 0; i < 4; i++) {
  665. struct resource *res;
  666. res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
  667. if (res->start != 0 && res->end != 0)
  668. release_resource(res);
  669. res->start = res->end = res->flags = 0;
  670. }
  671. }
  672. /*
  673. * Close it down - release our resources and go home..
  674. */
  675. static void __devexit yenta_close(struct pci_dev *dev)
  676. {
  677. struct yenta_socket *sock = pci_get_drvdata(dev);
  678. /* Remove the register attributes */
  679. device_remove_file(&dev->dev, &dev_attr_yenta_registers);
  680. /* we don't want a dying socket registered */
  681. pcmcia_unregister_socket(&sock->socket);
  682. /* Disable all events so we don't die in an IRQ storm */
  683. cb_writel(sock, CB_SOCKET_MASK, 0x0);
  684. exca_writeb(sock, I365_CSCINT, 0);
  685. if (sock->cb_irq)
  686. free_irq(sock->cb_irq, sock);
  687. else
  688. del_timer_sync(&sock->poll_timer);
  689. if (sock->base)
  690. iounmap(sock->base);
  691. yenta_free_resources(sock);
  692. pci_release_regions(dev);
  693. pci_disable_device(dev);
  694. pci_set_drvdata(dev, NULL);
  695. }
  696. static struct pccard_operations yenta_socket_operations = {
  697. .init = yenta_sock_init,
  698. .suspend = yenta_sock_suspend,
  699. .get_status = yenta_get_status,
  700. .set_socket = yenta_set_socket,
  701. .set_io_map = yenta_set_io_map,
  702. .set_mem_map = yenta_set_mem_map,
  703. };
  704. #ifdef CONFIG_YENTA_TI
  705. #include "ti113x.h"
  706. #endif
  707. #ifdef CONFIG_YENTA_RICOH
  708. #include "ricoh.h"
  709. #endif
  710. #ifdef CONFIG_YENTA_TOSHIBA
  711. #include "topic.h"
  712. #endif
  713. #ifdef CONFIG_YENTA_O2
  714. #include "o2micro.h"
  715. #endif
  716. enum {
  717. CARDBUS_TYPE_DEFAULT = -1,
  718. CARDBUS_TYPE_TI,
  719. CARDBUS_TYPE_TI113X,
  720. CARDBUS_TYPE_TI12XX,
  721. CARDBUS_TYPE_TI1250,
  722. CARDBUS_TYPE_RICOH,
  723. CARDBUS_TYPE_TOPIC95,
  724. CARDBUS_TYPE_TOPIC97,
  725. CARDBUS_TYPE_O2MICRO,
  726. CARDBUS_TYPE_ENE,
  727. };
  728. /*
  729. * Different cardbus controllers have slightly different
  730. * initialization sequences etc details. List them here..
  731. */
  732. static struct cardbus_type cardbus_type[] = {
  733. #ifdef CONFIG_YENTA_TI
  734. [CARDBUS_TYPE_TI] = {
  735. .override = ti_override,
  736. .save_state = ti_save_state,
  737. .restore_state = ti_restore_state,
  738. .sock_init = ti_init,
  739. },
  740. [CARDBUS_TYPE_TI113X] = {
  741. .override = ti113x_override,
  742. .save_state = ti_save_state,
  743. .restore_state = ti_restore_state,
  744. .sock_init = ti_init,
  745. },
  746. [CARDBUS_TYPE_TI12XX] = {
  747. .override = ti12xx_override,
  748. .save_state = ti_save_state,
  749. .restore_state = ti_restore_state,
  750. .sock_init = ti_init,
  751. },
  752. [CARDBUS_TYPE_TI1250] = {
  753. .override = ti1250_override,
  754. .save_state = ti_save_state,
  755. .restore_state = ti_restore_state,
  756. .sock_init = ti_init,
  757. },
  758. #endif
  759. #ifdef CONFIG_YENTA_RICOH
  760. [CARDBUS_TYPE_RICOH] = {
  761. .override = ricoh_override,
  762. .save_state = ricoh_save_state,
  763. .restore_state = ricoh_restore_state,
  764. },
  765. #endif
  766. #ifdef CONFIG_YENTA_TOSHIBA
  767. [CARDBUS_TYPE_TOPIC95] = {
  768. .override = topic95_override,
  769. },
  770. [CARDBUS_TYPE_TOPIC97] = {
  771. .override = topic97_override,
  772. },
  773. #endif
  774. #ifdef CONFIG_YENTA_O2
  775. [CARDBUS_TYPE_O2MICRO] = {
  776. .override = o2micro_override,
  777. .restore_state = o2micro_restore_state,
  778. },
  779. #endif
  780. #ifdef CONFIG_YENTA_TI
  781. [CARDBUS_TYPE_ENE] = {
  782. .override = ene_override,
  783. .save_state = ti_save_state,
  784. .restore_state = ti_restore_state,
  785. .sock_init = ti_init,
  786. },
  787. #endif
  788. };
  789. static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
  790. {
  791. int i;
  792. unsigned long val;
  793. u32 mask;
  794. u8 reg;
  795. /*
  796. * Probe for usable interrupts using the force
  797. * register to generate bogus card status events.
  798. */
  799. cb_writel(socket, CB_SOCKET_EVENT, -1);
  800. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  801. reg = exca_readb(socket, I365_CSCINT);
  802. exca_writeb(socket, I365_CSCINT, 0);
  803. val = probe_irq_on() & isa_irq_mask;
  804. for (i = 1; i < 16; i++) {
  805. if (!((val >> i) & 1))
  806. continue;
  807. exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
  808. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  809. udelay(100);
  810. cb_writel(socket, CB_SOCKET_EVENT, -1);
  811. }
  812. cb_writel(socket, CB_SOCKET_MASK, 0);
  813. exca_writeb(socket, I365_CSCINT, reg);
  814. mask = probe_irq_mask(val) & 0xffff;
  815. return mask;
  816. }
  817. /*
  818. * yenta PCI irq probing.
  819. * currently only used in the TI/EnE initialization code
  820. */
  821. #ifdef CONFIG_YENTA_TI
  822. /* interrupt handler, only used during probing */
  823. static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
  824. {
  825. struct yenta_socket *socket = (struct yenta_socket *) dev_id;
  826. u8 csc;
  827. u32 cb_event;
  828. /* Clear interrupt status for the event */
  829. cb_event = cb_readl(socket, CB_SOCKET_EVENT);
  830. cb_writel(socket, CB_SOCKET_EVENT, -1);
  831. csc = exca_readb(socket, I365_CSC);
  832. if (cb_event || csc) {
  833. socket->probe_status = 1;
  834. return IRQ_HANDLED;
  835. }
  836. return IRQ_NONE;
  837. }
  838. /* probes the PCI interrupt, use only on override functions */
  839. static int yenta_probe_cb_irq(struct yenta_socket *socket)
  840. {
  841. u8 reg = 0;
  842. if (!socket->cb_irq)
  843. return -1;
  844. socket->probe_status = 0;
  845. if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
  846. dev_printk(KERN_WARNING, &socket->dev->dev,
  847. "request_irq() in yenta_probe_cb_irq() failed!\n");
  848. return -1;
  849. }
  850. /* generate interrupt, wait */
  851. if (!socket->dev->irq)
  852. reg = exca_readb(socket, I365_CSCINT);
  853. exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
  854. cb_writel(socket, CB_SOCKET_EVENT, -1);
  855. cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
  856. cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
  857. msleep(100);
  858. /* disable interrupts */
  859. cb_writel(socket, CB_SOCKET_MASK, 0);
  860. exca_writeb(socket, I365_CSCINT, reg);
  861. cb_writel(socket, CB_SOCKET_EVENT, -1);
  862. exca_readb(socket, I365_CSC);
  863. free_irq(socket->cb_irq, socket);
  864. return (int) socket->probe_status;
  865. }
  866. #endif /* CONFIG_YENTA_TI */
  867. /*
  868. * Set static data that doesn't need re-initializing..
  869. */
  870. static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
  871. {
  872. socket->socket.pci_irq = socket->cb_irq;
  873. if (isa_probe)
  874. socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
  875. else
  876. socket->socket.irq_mask = 0;
  877. dev_printk(KERN_INFO, &socket->dev->dev,
  878. "ISA IRQ mask 0x%04x, PCI irq %d\n",
  879. socket->socket.irq_mask, socket->cb_irq);
  880. }
  881. /*
  882. * Initialize the standard cardbus registers
  883. */
  884. static void yenta_config_init(struct yenta_socket *socket)
  885. {
  886. u16 bridge;
  887. struct pci_dev *dev = socket->dev;
  888. struct pci_bus_region region;
  889. pcibios_resource_to_bus(socket->dev, &region, &dev->resource[0]);
  890. config_writel(socket, CB_LEGACY_MODE_BASE, 0);
  891. config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
  892. config_writew(socket, PCI_COMMAND,
  893. PCI_COMMAND_IO |
  894. PCI_COMMAND_MEMORY |
  895. PCI_COMMAND_MASTER |
  896. PCI_COMMAND_WAIT);
  897. /* MAGIC NUMBERS! Fixme */
  898. config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
  899. config_writeb(socket, PCI_LATENCY_TIMER, 168);
  900. config_writel(socket, PCI_PRIMARY_BUS,
  901. (176 << 24) | /* sec. latency timer */
  902. (dev->subordinate->subordinate << 16) | /* subordinate bus */
  903. (dev->subordinate->secondary << 8) | /* secondary bus */
  904. dev->subordinate->primary); /* primary bus */
  905. /*
  906. * Set up the bridging state:
  907. * - enable write posting.
  908. * - memory window 0 prefetchable, window 1 non-prefetchable
  909. * - PCI interrupts enabled if a PCI interrupt exists..
  910. */
  911. bridge = config_readw(socket, CB_BRIDGE_CONTROL);
  912. bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
  913. bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
  914. config_writew(socket, CB_BRIDGE_CONTROL, bridge);
  915. }
  916. /**
  917. * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
  918. * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
  919. *
  920. * Checks if devices on the bus which the CardBus bridge bridges to would be
  921. * invisible during PCI scans because of a misconfigured subordinate number
  922. * of the parent brige - some BIOSes seem to be too lazy to set it right.
  923. * Does the fixup carefully by checking how far it can go without conflicts.
  924. * See http\://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
  925. */
  926. static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
  927. {
  928. struct list_head *tmp;
  929. unsigned char upper_limit;
  930. /*
  931. * We only check and fix the parent bridge: All systems which need
  932. * this fixup that have been reviewed are laptops and the only bridge
  933. * which needed fixing was the parent bridge of the CardBus bridge:
  934. */
  935. struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
  936. /* Check bus numbers are already set up correctly: */
  937. if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate)
  938. return; /* The subordinate number is ok, nothing to do */
  939. if (!bridge_to_fix->parent)
  940. return; /* Root bridges are ok */
  941. /* stay within the limits of the bus range of the parent: */
  942. upper_limit = bridge_to_fix->parent->subordinate;
  943. /* check the bus ranges of all silbling bridges to prevent overlap */
  944. list_for_each(tmp, &bridge_to_fix->parent->children) {
  945. struct pci_bus *silbling = pci_bus_b(tmp);
  946. /*
  947. * If the silbling has a higher secondary bus number
  948. * and it's secondary is equal or smaller than our
  949. * current upper limit, set the new upper limit to
  950. * the bus number below the silbling's range:
  951. */
  952. if (silbling->secondary > bridge_to_fix->subordinate
  953. && silbling->secondary <= upper_limit)
  954. upper_limit = silbling->secondary - 1;
  955. }
  956. /* Show that the wanted subordinate number is not possible: */
  957. if (cardbus_bridge->subordinate > upper_limit)
  958. dev_printk(KERN_WARNING, &cardbus_bridge->dev,
  959. "Upper limit for fixing this "
  960. "bridge's parent bridge: #%02x\n", upper_limit);
  961. /* If we have room to increase the bridge's subordinate number, */
  962. if (bridge_to_fix->subordinate < upper_limit) {
  963. /* use the highest number of the hidden bus, within limits */
  964. unsigned char subordinate_to_assign =
  965. min(cardbus_bridge->subordinate, upper_limit);
  966. dev_printk(KERN_INFO, &bridge_to_fix->dev,
  967. "Raising subordinate bus# of parent "
  968. "bus (#%02x) from #%02x to #%02x\n",
  969. bridge_to_fix->number,
  970. bridge_to_fix->subordinate, subordinate_to_assign);
  971. /* Save the new subordinate in the bus struct of the bridge */
  972. bridge_to_fix->subordinate = subordinate_to_assign;
  973. /* and update the PCI config space with the new subordinate */
  974. pci_write_config_byte(bridge_to_fix->self,
  975. PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate);
  976. }
  977. }
  978. /*
  979. * Initialize a cardbus controller. Make sure we have a usable
  980. * interrupt, and that we can map the cardbus area. Fill in the
  981. * socket information structure..
  982. */
  983. static int __devinit yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
  984. {
  985. struct yenta_socket *socket;
  986. int ret;
  987. /*
  988. * If we failed to assign proper bus numbers for this cardbus
  989. * controller during PCI probe, its subordinate pci_bus is NULL.
  990. * Bail out if so.
  991. */
  992. if (!dev->subordinate) {
  993. dev_printk(KERN_ERR, &dev->dev, "no bus associated! "
  994. "(try 'pci=assign-busses')\n");
  995. return -ENODEV;
  996. }
  997. socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
  998. if (!socket)
  999. return -ENOMEM;
  1000. /* prepare pcmcia_socket */
  1001. socket->socket.ops = &yenta_socket_operations;
  1002. socket->socket.resource_ops = &pccard_nonstatic_ops;
  1003. socket->socket.dev.parent = &dev->dev;
  1004. socket->socket.driver_data = socket;
  1005. socket->socket.owner = THIS_MODULE;
  1006. socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
  1007. socket->socket.map_size = 0x1000;
  1008. socket->socket.cb_dev = dev;
  1009. /* prepare struct yenta_socket */
  1010. socket->dev = dev;
  1011. pci_set_drvdata(dev, socket);
  1012. /*
  1013. * Do some basic sanity checking..
  1014. */
  1015. if (pci_enable_device(dev)) {
  1016. ret = -EBUSY;
  1017. goto free;
  1018. }
  1019. ret = pci_request_regions(dev, "yenta_socket");
  1020. if (ret)
  1021. goto disable;
  1022. if (!pci_resource_start(dev, 0)) {
  1023. dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n");
  1024. ret = -ENODEV;
  1025. goto release;
  1026. }
  1027. /*
  1028. * Ok, start setup.. Map the cardbus registers,
  1029. * and request the IRQ.
  1030. */
  1031. socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
  1032. if (!socket->base) {
  1033. ret = -ENOMEM;
  1034. goto release;
  1035. }
  1036. /*
  1037. * report the subsystem vendor and device for help debugging
  1038. * the irq stuff...
  1039. */
  1040. dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n",
  1041. dev->subsystem_vendor, dev->subsystem_device);
  1042. yenta_config_init(socket);
  1043. /* Disable all events */
  1044. cb_writel(socket, CB_SOCKET_MASK, 0x0);
  1045. /* Set up the bridge regions.. */
  1046. yenta_allocate_resources(socket);
  1047. socket->cb_irq = dev->irq;
  1048. /* Do we have special options for the device? */
  1049. if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
  1050. id->driver_data < ARRAY_SIZE(cardbus_type)) {
  1051. socket->type = &cardbus_type[id->driver_data];
  1052. ret = socket->type->override(socket);
  1053. if (ret < 0)
  1054. goto unmap;
  1055. }
  1056. /* We must finish initialization here */
  1057. if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
  1058. /* No IRQ or request_irq failed. Poll */
  1059. socket->cb_irq = 0; /* But zero is a valid IRQ number. */
  1060. init_timer(&socket->poll_timer);
  1061. socket->poll_timer.function = yenta_interrupt_wrapper;
  1062. socket->poll_timer.data = (unsigned long)socket;
  1063. socket->poll_timer.expires = jiffies + HZ;
  1064. add_timer(&socket->poll_timer);
  1065. dev_printk(KERN_INFO, &dev->dev,
  1066. "no PCI IRQ, CardBus support disabled for this "
  1067. "socket.\n");
  1068. dev_printk(KERN_INFO, &dev->dev,
  1069. "check your BIOS CardBus, BIOS IRQ or ACPI "
  1070. "settings.\n");
  1071. } else {
  1072. socket->socket.features |= SS_CAP_CARDBUS;
  1073. }
  1074. /* Figure out what the dang thing can do for the PCMCIA layer... */
  1075. yenta_interrogate(socket);
  1076. yenta_get_socket_capabilities(socket, isa_interrupts);
  1077. dev_printk(KERN_INFO, &dev->dev,
  1078. "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
  1079. yenta_fixup_parent_bridge(dev->subordinate);
  1080. /* Register it with the pcmcia layer.. */
  1081. ret = pcmcia_register_socket(&socket->socket);
  1082. if (ret == 0) {
  1083. /* Add the yenta register attributes */
  1084. ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
  1085. if (ret == 0)
  1086. goto out;
  1087. /* error path... */
  1088. pcmcia_unregister_socket(&socket->socket);
  1089. }
  1090. unmap:
  1091. iounmap(socket->base);
  1092. release:
  1093. pci_release_regions(dev);
  1094. disable:
  1095. pci_disable_device(dev);
  1096. free:
  1097. kfree(socket);
  1098. out:
  1099. return ret;
  1100. }
  1101. #ifdef CONFIG_PM
  1102. static int yenta_dev_suspend_noirq(struct device *dev)
  1103. {
  1104. struct pci_dev *pdev = to_pci_dev(dev);
  1105. struct yenta_socket *socket = pci_get_drvdata(pdev);
  1106. if (!socket)
  1107. return 0;
  1108. if (socket->type && socket->type->save_state)
  1109. socket->type->save_state(socket);
  1110. pci_save_state(pdev);
  1111. pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
  1112. pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
  1113. pci_disable_device(pdev);
  1114. /*
  1115. * Some laptops (IBM T22) do not like us putting the Cardbus
  1116. * bridge into D3. At a guess, some other laptop will
  1117. * probably require this, so leave it commented out for now.
  1118. */
  1119. /* pci_set_power_state(dev, 3); */
  1120. return 0;
  1121. }
  1122. static int yenta_dev_resume_noirq(struct device *dev)
  1123. {
  1124. struct pci_dev *pdev = to_pci_dev(dev);
  1125. struct yenta_socket *socket = pci_get_drvdata(pdev);
  1126. int ret;
  1127. if (!socket)
  1128. return 0;
  1129. pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
  1130. pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
  1131. ret = pci_enable_device(pdev);
  1132. if (ret)
  1133. return ret;
  1134. pci_set_master(pdev);
  1135. if (socket->type && socket->type->restore_state)
  1136. socket->type->restore_state(socket);
  1137. return 0;
  1138. }
  1139. static const struct dev_pm_ops yenta_pm_ops = {
  1140. .suspend_noirq = yenta_dev_suspend_noirq,
  1141. .resume_noirq = yenta_dev_resume_noirq,
  1142. .freeze_noirq = yenta_dev_suspend_noirq,
  1143. .thaw_noirq = yenta_dev_resume_noirq,
  1144. .poweroff_noirq = yenta_dev_suspend_noirq,
  1145. .restore_noirq = yenta_dev_resume_noirq,
  1146. };
  1147. #define YENTA_PM_OPS (&yenta_pm_ops)
  1148. #else
  1149. #define YENTA_PM_OPS NULL
  1150. #endif
  1151. #define CB_ID(vend, dev, type) \
  1152. { \
  1153. .vendor = vend, \
  1154. .device = dev, \
  1155. .subvendor = PCI_ANY_ID, \
  1156. .subdevice = PCI_ANY_ID, \
  1157. .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
  1158. .class_mask = ~0, \
  1159. .driver_data = CARDBUS_TYPE_##type, \
  1160. }
  1161. static struct pci_device_id yenta_table[] = {
  1162. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
  1163. /*
  1164. * TBD: Check if these TI variants can use more
  1165. * advanced overrides instead. (I can't get the
  1166. * data sheets for these devices. --rmk)
  1167. */
  1168. #ifdef CONFIG_YENTA_TI
  1169. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
  1170. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
  1171. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
  1172. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
  1173. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
  1174. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
  1175. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
  1176. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
  1177. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
  1178. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
  1179. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
  1180. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
  1181. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
  1182. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
  1183. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
  1184. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
  1185. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
  1186. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
  1187. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
  1188. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
  1189. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
  1190. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
  1191. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
  1192. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
  1193. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
  1194. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
  1195. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
  1196. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
  1197. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
  1198. CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
  1199. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
  1200. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
  1201. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
  1202. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
  1203. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
  1204. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
  1205. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
  1206. CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
  1207. #endif /* CONFIG_YENTA_TI */
  1208. #ifdef CONFIG_YENTA_RICOH
  1209. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
  1210. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
  1211. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
  1212. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
  1213. CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
  1214. #endif
  1215. #ifdef CONFIG_YENTA_TOSHIBA
  1216. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
  1217. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
  1218. CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
  1219. #endif
  1220. #ifdef CONFIG_YENTA_O2
  1221. CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
  1222. #endif
  1223. /* match any cardbus bridge */
  1224. CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
  1225. { /* all zeroes */ }
  1226. };
  1227. MODULE_DEVICE_TABLE(pci, yenta_table);
  1228. static struct pci_driver yenta_cardbus_driver = {
  1229. .name = "yenta_cardbus",
  1230. .id_table = yenta_table,
  1231. .probe = yenta_probe,
  1232. .remove = __devexit_p(yenta_close),
  1233. .driver.pm = YENTA_PM_OPS,
  1234. };
  1235. static int __init yenta_socket_init(void)
  1236. {
  1237. return pci_register_driver(&yenta_cardbus_driver);
  1238. }
  1239. static void __exit yenta_socket_exit(void)
  1240. {
  1241. pci_unregister_driver(&yenta_cardbus_driver);
  1242. }
  1243. module_init(yenta_socket_init);
  1244. module_exit(yenta_socket_exit);
  1245. MODULE_LICENSE("GPL");