PageRenderTime 78ms CodeModel.GetById 3ms app.highlight 64ms RepoModel.GetById 1ms app.codeStats 1ms

/drivers/pcmcia/yenta_socket.c

https://bitbucket.org/zossso/android-kernel-2.6.34-motus
C | 1469 lines | 1068 code | 224 blank | 177 comment | 143 complexity | 85cc0b7f5d3237fc84ed98227473dbdb MD5 | raw file
   1/*
   2 * Regular cardbus driver ("yenta_socket")
   3 *
   4 * (C) Copyright 1999, 2000 Linus Torvalds
   5 *
   6 * Changelog:
   7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
   8 * 	Dynamically adjust the size of the bridge resource
   9 *
  10 * May 2003: Dominik Brodowski <linux@brodo.de>
  11 * 	Merge pci_socket.c and yenta.c into one file
  12 */
  13#include <linux/init.h>
  14#include <linux/pci.h>
  15#include <linux/workqueue.h>
  16#include <linux/interrupt.h>
  17#include <linux/delay.h>
  18#include <linux/module.h>
  19#include <linux/io.h>
  20#include <linux/slab.h>
  21
  22#include <pcmcia/cs_types.h>
  23#include <pcmcia/ss.h>
  24#include <pcmcia/cs.h>
  25
  26#include "yenta_socket.h"
  27#include "i82365.h"
  28
  29static int disable_clkrun;
  30module_param(disable_clkrun, bool, 0444);
  31MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
  32
  33static int isa_probe = 1;
  34module_param(isa_probe, bool, 0444);
  35MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
  36
  37static int pwr_irqs_off;
  38module_param(pwr_irqs_off, bool, 0644);
  39MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
  40
  41static char o2_speedup[] = "default";
  42module_param_string(o2_speedup, o2_speedup, sizeof(o2_speedup), 0444);
  43MODULE_PARM_DESC(o2_speedup, "Use prefetch/burst for O2-bridges: 'on', 'off' "
  44	"or 'default' (uses recommended behaviour for the detected bridge)");
  45
  46/*
  47 * Only probe "regular" interrupts, don't
  48 * touch dangerous spots like the mouse irq,
  49 * because there are mice that apparently
  50 * get really confused if they get fondled
  51 * too intimately.
  52 *
  53 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
  54 */
  55static u32 isa_interrupts = 0x0ef8;
  56
  57
  58#define debug(x, s, args...) dev_dbg(&s->dev->dev, x, ##args)
  59
  60/* Don't ask.. */
  61#define to_cycles(ns)	((ns)/120)
  62#define to_ns(cycles)	((cycles)*120)
  63
  64/*
  65 * yenta PCI irq probing.
  66 * currently only used in the TI/EnE initialization code
  67 */
  68#ifdef CONFIG_YENTA_TI
  69static int yenta_probe_cb_irq(struct yenta_socket *socket);
  70static unsigned int yenta_probe_irq(struct yenta_socket *socket,
  71				u32 isa_irq_mask);
  72#endif
  73
  74
  75static unsigned int override_bios;
  76module_param(override_bios, uint, 0000);
  77MODULE_PARM_DESC(override_bios, "yenta ignore bios resource allocation");
  78
  79/*
  80 * Generate easy-to-use ways of reading a cardbus sockets
  81 * regular memory space ("cb_xxx"), configuration space
  82 * ("config_xxx") and compatibility space ("exca_xxxx")
  83 */
  84static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
  85{
  86	u32 val = readl(socket->base + reg);
  87	debug("%04x %08x\n", socket, reg, val);
  88	return val;
  89}
  90
  91static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
  92{
  93	debug("%04x %08x\n", socket, reg, val);
  94	writel(val, socket->base + reg);
  95	readl(socket->base + reg); /* avoid problems with PCI write posting */
  96}
  97
  98static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
  99{
 100	u8 val;
 101	pci_read_config_byte(socket->dev, offset, &val);
 102	debug("%04x %02x\n", socket, offset, val);
 103	return val;
 104}
 105
 106static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
 107{
 108	u16 val;
 109	pci_read_config_word(socket->dev, offset, &val);
 110	debug("%04x %04x\n", socket, offset, val);
 111	return val;
 112}
 113
 114static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
 115{
 116	u32 val;
 117	pci_read_config_dword(socket->dev, offset, &val);
 118	debug("%04x %08x\n", socket, offset, val);
 119	return val;
 120}
 121
 122static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
 123{
 124	debug("%04x %02x\n", socket, offset, val);
 125	pci_write_config_byte(socket->dev, offset, val);
 126}
 127
 128static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
 129{
 130	debug("%04x %04x\n", socket, offset, val);
 131	pci_write_config_word(socket->dev, offset, val);
 132}
 133
 134static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
 135{
 136	debug("%04x %08x\n", socket, offset, val);
 137	pci_write_config_dword(socket->dev, offset, val);
 138}
 139
 140static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
 141{
 142	u8 val = readb(socket->base + 0x800 + reg);
 143	debug("%04x %02x\n", socket, reg, val);
 144	return val;
 145}
 146
 147static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
 148{
 149	u16 val;
 150	val = readb(socket->base + 0x800 + reg);
 151	val |= readb(socket->base + 0x800 + reg + 1) << 8;
 152	debug("%04x %04x\n", socket, reg, val);
 153	return val;
 154}
 155
 156static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
 157{
 158	debug("%04x %02x\n", socket, reg, val);
 159	writeb(val, socket->base + 0x800 + reg);
 160	readb(socket->base + 0x800 + reg); /* PCI write posting... */
 161}
 162
 163static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
 164{
 165	debug("%04x %04x\n", socket, reg, val);
 166	writeb(val, socket->base + 0x800 + reg);
 167	writeb(val >> 8, socket->base + 0x800 + reg + 1);
 168
 169	/* PCI write posting... */
 170	readb(socket->base + 0x800 + reg);
 171	readb(socket->base + 0x800 + reg + 1);
 172}
 173
 174static ssize_t show_yenta_registers(struct device *yentadev, struct device_attribute *attr, char *buf)
 175{
 176	struct pci_dev *dev = to_pci_dev(yentadev);
 177	struct yenta_socket *socket = pci_get_drvdata(dev);
 178	int offset = 0, i;
 179
 180	offset = snprintf(buf, PAGE_SIZE, "CB registers:");
 181	for (i = 0; i < 0x24; i += 4) {
 182		unsigned val;
 183		if (!(i & 15))
 184			offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
 185		val = cb_readl(socket, i);
 186		offset += snprintf(buf + offset, PAGE_SIZE - offset, " %08x", val);
 187	}
 188
 189	offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n\nExCA registers:");
 190	for (i = 0; i < 0x45; i++) {
 191		unsigned char val;
 192		if (!(i & 7)) {
 193			if (i & 8) {
 194				memcpy(buf + offset, " -", 2);
 195				offset += 2;
 196			} else
 197				offset += snprintf(buf + offset, PAGE_SIZE - offset, "\n%02x:", i);
 198		}
 199		val = exca_readb(socket, i);
 200		offset += snprintf(buf + offset, PAGE_SIZE - offset, " %02x", val);
 201	}
 202	buf[offset++] = '\n';
 203	return offset;
 204}
 205
 206static DEVICE_ATTR(yenta_registers, S_IRUSR, show_yenta_registers, NULL);
 207
 208/*
 209 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
 210 * on what kind of card is inserted..
 211 */
 212static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
 213{
 214	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
 215	unsigned int val;
 216	u32 state = cb_readl(socket, CB_SOCKET_STATE);
 217
 218	val  = (state & CB_3VCARD) ? SS_3VCARD : 0;
 219	val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
 220	val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
 221	val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
 222
 223
 224	if (state & CB_CBCARD) {
 225		val |= SS_CARDBUS;
 226		val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
 227		val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
 228		val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
 229	} else if (state & CB_16BITCARD) {
 230		u8 status = exca_readb(socket, I365_STATUS);
 231		val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
 232		if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
 233			val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
 234		} else {
 235			val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
 236			val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
 237		}
 238		val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
 239		val |= (status & I365_CS_READY) ? SS_READY : 0;
 240		val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
 241	}
 242
 243	*value = val;
 244	return 0;
 245}
 246
 247static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
 248{
 249	/* some birdges require to use the ExCA registers to power 16bit cards */
 250	if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
 251	    (socket->flags & YENTA_16BIT_POWER_EXCA)) {
 252		u8 reg, old;
 253		reg = old = exca_readb(socket, I365_POWER);
 254		reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
 255
 256		/* i82365SL-DF style */
 257		if (socket->flags & YENTA_16BIT_POWER_DF) {
 258			switch (state->Vcc) {
 259			case 33:
 260				reg |= I365_VCC_3V;
 261				break;
 262			case 50:
 263				reg |= I365_VCC_5V;
 264				break;
 265			default:
 266				reg = 0;
 267				break;
 268			}
 269			switch (state->Vpp) {
 270			case 33:
 271			case 50:
 272				reg |= I365_VPP1_5V;
 273				break;
 274			case 120:
 275				reg |= I365_VPP1_12V;
 276				break;
 277			}
 278		} else {
 279			/* i82365SL-B style */
 280			switch (state->Vcc) {
 281			case 50:
 282				reg |= I365_VCC_5V;
 283				break;
 284			default:
 285				reg = 0;
 286				break;
 287			}
 288			switch (state->Vpp) {
 289			case 50:
 290				reg |= I365_VPP1_5V | I365_VPP2_5V;
 291				break;
 292			case 120:
 293				reg |= I365_VPP1_12V | I365_VPP2_12V;
 294				break;
 295			}
 296		}
 297
 298		if (reg != old)
 299			exca_writeb(socket, I365_POWER, reg);
 300	} else {
 301		u32 reg = 0;	/* CB_SC_STPCLK? */
 302		switch (state->Vcc) {
 303		case 33:
 304			reg = CB_SC_VCC_3V;
 305			break;
 306		case 50:
 307			reg = CB_SC_VCC_5V;
 308			break;
 309		default:
 310			reg = 0;
 311			break;
 312		}
 313		switch (state->Vpp) {
 314		case 33:
 315			reg |= CB_SC_VPP_3V;
 316			break;
 317		case 50:
 318			reg |= CB_SC_VPP_5V;
 319			break;
 320		case 120:
 321			reg |= CB_SC_VPP_12V;
 322			break;
 323		}
 324		if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
 325			cb_writel(socket, CB_SOCKET_CONTROL, reg);
 326	}
 327}
 328
 329static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
 330{
 331	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
 332	u16 bridge;
 333
 334	/* if powering down: do it immediately */
 335	if (state->Vcc == 0)
 336		yenta_set_power(socket, state);
 337
 338	socket->io_irq = state->io_irq;
 339	bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
 340	if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
 341		u8 intr;
 342		bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
 343
 344		/* ISA interrupt control? */
 345		intr = exca_readb(socket, I365_INTCTL);
 346		intr = (intr & ~0xf);
 347		if (!socket->dev->irq) {
 348			intr |= socket->cb_irq ? socket->cb_irq : state->io_irq;
 349			bridge |= CB_BRIDGE_INTR;
 350		}
 351		exca_writeb(socket, I365_INTCTL, intr);
 352	}  else {
 353		u8 reg;
 354
 355		reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
 356		reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
 357		reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
 358		if (state->io_irq != socket->dev->irq) {
 359			reg |= state->io_irq;
 360			bridge |= CB_BRIDGE_INTR;
 361		}
 362		exca_writeb(socket, I365_INTCTL, reg);
 363
 364		reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
 365		reg |= I365_PWR_NORESET;
 366		if (state->flags & SS_PWR_AUTO)
 367			reg |= I365_PWR_AUTO;
 368		if (state->flags & SS_OUTPUT_ENA)
 369			reg |= I365_PWR_OUT;
 370		if (exca_readb(socket, I365_POWER) != reg)
 371			exca_writeb(socket, I365_POWER, reg);
 372
 373		/* CSC interrupt: no ISA irq for CSC */
 374		reg = exca_readb(socket, I365_CSCINT);
 375		reg &= I365_CSC_IRQ_MASK;
 376		reg |= I365_CSC_DETECT;
 377		if (state->flags & SS_IOCARD) {
 378			if (state->csc_mask & SS_STSCHG)
 379				reg |= I365_CSC_STSCHG;
 380		} else {
 381			if (state->csc_mask & SS_BATDEAD)
 382				reg |= I365_CSC_BVD1;
 383			if (state->csc_mask & SS_BATWARN)
 384				reg |= I365_CSC_BVD2;
 385			if (state->csc_mask & SS_READY)
 386				reg |= I365_CSC_READY;
 387		}
 388		exca_writeb(socket, I365_CSCINT, reg);
 389		exca_readb(socket, I365_CSC);
 390		if (sock->zoom_video)
 391			sock->zoom_video(sock, state->flags & SS_ZVCARD);
 392	}
 393	config_writew(socket, CB_BRIDGE_CONTROL, bridge);
 394	/* Socket event mask: get card insert/remove events.. */
 395	cb_writel(socket, CB_SOCKET_EVENT, -1);
 396	cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
 397
 398	/* if powering up: do it as the last step when the socket is configured */
 399	if (state->Vcc != 0)
 400		yenta_set_power(socket, state);
 401	return 0;
 402}
 403
 404static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
 405{
 406	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
 407	int map;
 408	unsigned char ioctl, addr, enable;
 409
 410	map = io->map;
 411
 412	if (map > 1)
 413		return -EINVAL;
 414
 415	enable = I365_ENA_IO(map);
 416	addr = exca_readb(socket, I365_ADDRWIN);
 417
 418	/* Disable the window before changing it.. */
 419	if (addr & enable) {
 420		addr &= ~enable;
 421		exca_writeb(socket, I365_ADDRWIN, addr);
 422	}
 423
 424	exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
 425	exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
 426
 427	ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
 428	if (io->flags & MAP_0WS)
 429		ioctl |= I365_IOCTL_0WS(map);
 430	if (io->flags & MAP_16BIT)
 431		ioctl |= I365_IOCTL_16BIT(map);
 432	if (io->flags & MAP_AUTOSZ)
 433		ioctl |= I365_IOCTL_IOCS16(map);
 434	exca_writeb(socket, I365_IOCTL, ioctl);
 435
 436	if (io->flags & MAP_ACTIVE)
 437		exca_writeb(socket, I365_ADDRWIN, addr | enable);
 438	return 0;
 439}
 440
 441static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
 442{
 443	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
 444	struct pci_bus_region region;
 445	int map;
 446	unsigned char addr, enable;
 447	unsigned int start, stop, card_start;
 448	unsigned short word;
 449
 450	pcibios_resource_to_bus(socket->dev, &region, mem->res);
 451
 452	map = mem->map;
 453	start = region.start;
 454	stop = region.end;
 455	card_start = mem->card_start;
 456
 457	if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
 458	    (card_start >> 26) || mem->speed > 1000)
 459		return -EINVAL;
 460
 461	enable = I365_ENA_MEM(map);
 462	addr = exca_readb(socket, I365_ADDRWIN);
 463	if (addr & enable) {
 464		addr &= ~enable;
 465		exca_writeb(socket, I365_ADDRWIN, addr);
 466	}
 467
 468	exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
 469
 470	word = (start >> 12) & 0x0fff;
 471	if (mem->flags & MAP_16BIT)
 472		word |= I365_MEM_16BIT;
 473	if (mem->flags & MAP_0WS)
 474		word |= I365_MEM_0WS;
 475	exca_writew(socket, I365_MEM(map) + I365_W_START, word);
 476
 477	word = (stop >> 12) & 0x0fff;
 478	switch (to_cycles(mem->speed)) {
 479	case 0:
 480		break;
 481	case 1:
 482		word |= I365_MEM_WS0;
 483		break;
 484	case 2:
 485		word |= I365_MEM_WS1;
 486		break;
 487	default:
 488		word |= I365_MEM_WS1 | I365_MEM_WS0;
 489		break;
 490	}
 491	exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
 492
 493	word = ((card_start - start) >> 12) & 0x3fff;
 494	if (mem->flags & MAP_WRPROT)
 495		word |= I365_MEM_WRPROT;
 496	if (mem->flags & MAP_ATTRIB)
 497		word |= I365_MEM_REG;
 498	exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
 499
 500	if (mem->flags & MAP_ACTIVE)
 501		exca_writeb(socket, I365_ADDRWIN, addr | enable);
 502	return 0;
 503}
 504
 505
 506
 507static irqreturn_t yenta_interrupt(int irq, void *dev_id)
 508{
 509	unsigned int events;
 510	struct yenta_socket *socket = (struct yenta_socket *) dev_id;
 511	u8 csc;
 512	u32 cb_event;
 513
 514	/* Clear interrupt status for the event */
 515	cb_event = cb_readl(socket, CB_SOCKET_EVENT);
 516	cb_writel(socket, CB_SOCKET_EVENT, cb_event);
 517
 518	csc = exca_readb(socket, I365_CSC);
 519
 520	if (!(cb_event || csc))
 521		return IRQ_NONE;
 522
 523	events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
 524	events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
 525	if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
 526		events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
 527	} else {
 528		events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
 529		events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
 530		events |= (csc & I365_CSC_READY) ? SS_READY : 0;
 531	}
 532
 533	if (events)
 534		pcmcia_parse_events(&socket->socket, events);
 535
 536	return IRQ_HANDLED;
 537}
 538
 539static void yenta_interrupt_wrapper(unsigned long data)
 540{
 541	struct yenta_socket *socket = (struct yenta_socket *) data;
 542
 543	yenta_interrupt(0, (void *)socket);
 544	socket->poll_timer.expires = jiffies + HZ;
 545	add_timer(&socket->poll_timer);
 546}
 547
 548static void yenta_clear_maps(struct yenta_socket *socket)
 549{
 550	int i;
 551	struct resource res = { .start = 0, .end = 0x0fff };
 552	pccard_io_map io = { 0, 0, 0, 0, 1 };
 553	pccard_mem_map mem = { .res = &res, };
 554
 555	yenta_set_socket(&socket->socket, &dead_socket);
 556	for (i = 0; i < 2; i++) {
 557		io.map = i;
 558		yenta_set_io_map(&socket->socket, &io);
 559	}
 560	for (i = 0; i < 5; i++) {
 561		mem.map = i;
 562		yenta_set_mem_map(&socket->socket, &mem);
 563	}
 564}
 565
 566/* redoes voltage interrogation if required */
 567static void yenta_interrogate(struct yenta_socket *socket)
 568{
 569	u32 state;
 570
 571	state = cb_readl(socket, CB_SOCKET_STATE);
 572	if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
 573	    (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
 574	    ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
 575		cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
 576}
 577
 578/* Called at resume and initialization events */
 579static int yenta_sock_init(struct pcmcia_socket *sock)
 580{
 581	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
 582
 583	exca_writeb(socket, I365_GBLCTL, 0x00);
 584	exca_writeb(socket, I365_GENCTL, 0x00);
 585
 586	/* Redo card voltage interrogation */
 587	yenta_interrogate(socket);
 588
 589	yenta_clear_maps(socket);
 590
 591	if (socket->type && socket->type->sock_init)
 592		socket->type->sock_init(socket);
 593
 594	/* Re-enable CSC interrupts */
 595	cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
 596
 597	return 0;
 598}
 599
 600static int yenta_sock_suspend(struct pcmcia_socket *sock)
 601{
 602	struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
 603
 604	/* Disable CSC interrupts */
 605	cb_writel(socket, CB_SOCKET_MASK, 0x0);
 606
 607	return 0;
 608}
 609
 610/*
 611 * Use an adaptive allocation for the memory resource,
 612 * sometimes the memory behind pci bridges is limited:
 613 * 1/8 of the size of the io window of the parent.
 614 * max 4 MB, min 16 kB. We try very hard to not get below
 615 * the "ACC" values, though.
 616 */
 617#define BRIDGE_MEM_MAX (4*1024*1024)
 618#define BRIDGE_MEM_ACC (128*1024)
 619#define BRIDGE_MEM_MIN (16*1024)
 620
 621#define BRIDGE_IO_MAX 512
 622#define BRIDGE_IO_ACC 256
 623#define BRIDGE_IO_MIN 32
 624
 625#ifndef PCIBIOS_MIN_CARDBUS_IO
 626#define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
 627#endif
 628
 629static int yenta_search_one_res(struct resource *root, struct resource *res,
 630				u32 min)
 631{
 632	u32 align, size, start, end;
 633
 634	if (res->flags & IORESOURCE_IO) {
 635		align = 1024;
 636		size = BRIDGE_IO_MAX;
 637		start = PCIBIOS_MIN_CARDBUS_IO;
 638		end = ~0U;
 639	} else {
 640		unsigned long avail = root->end - root->start;
 641		int i;
 642		size = BRIDGE_MEM_MAX;
 643		if (size > avail/8) {
 644			size = (avail+1)/8;
 645			/* round size down to next power of 2 */
 646			i = 0;
 647			while ((size /= 2) != 0)
 648				i++;
 649			size = 1 << i;
 650		}
 651		if (size < min)
 652			size = min;
 653		align = size;
 654		start = PCIBIOS_MIN_MEM;
 655		end = ~0U;
 656	}
 657
 658	do {
 659		if (allocate_resource(root, res, size, start, end, align,
 660				      NULL, NULL) == 0) {
 661			return 1;
 662		}
 663		size = size/2;
 664		align = size;
 665	} while (size >= min);
 666
 667	return 0;
 668}
 669
 670
 671static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
 672			    u32 min)
 673{
 674	struct resource *root;
 675	int i;
 676
 677	pci_bus_for_each_resource(socket->dev->bus, root, i) {
 678		if (!root)
 679			continue;
 680
 681		if ((res->flags ^ root->flags) &
 682		    (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
 683			continue; /* Wrong type */
 684
 685		if (yenta_search_one_res(root, res, min))
 686			return 1;
 687	}
 688	return 0;
 689}
 690
 691static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
 692{
 693	struct pci_dev *dev = socket->dev;
 694	struct resource *res;
 695	struct pci_bus_region region;
 696	unsigned mask;
 697
 698	res = dev->resource + PCI_BRIDGE_RESOURCES + nr;
 699	/* Already allocated? */
 700	if (res->parent)
 701		return 0;
 702
 703	/* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
 704	mask = ~0xfff;
 705	if (type & IORESOURCE_IO)
 706		mask = ~3;
 707
 708	res->name = dev->subordinate->name;
 709	res->flags = type;
 710
 711	region.start = config_readl(socket, addr_start) & mask;
 712	region.end = config_readl(socket, addr_end) | ~mask;
 713	if (region.start && region.end > region.start && !override_bios) {
 714		pcibios_bus_to_resource(dev, res, &region);
 715		if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
 716			return 0;
 717		dev_printk(KERN_INFO, &dev->dev,
 718			   "Preassigned resource %d busy or not available, "
 719			   "reconfiguring...\n",
 720			   nr);
 721	}
 722
 723	if (type & IORESOURCE_IO) {
 724		if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
 725		    (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
 726		    (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
 727			return 1;
 728	} else {
 729		if (type & IORESOURCE_PREFETCH) {
 730			if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
 731			    (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
 732			    (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
 733				return 1;
 734			/* Approximating prefetchable by non-prefetchable */
 735			res->flags = IORESOURCE_MEM;
 736		}
 737		if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
 738		    (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
 739		    (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
 740			return 1;
 741	}
 742
 743	dev_printk(KERN_INFO, &dev->dev,
 744		   "no resource of type %x available, trying to continue...\n",
 745		   type);
 746	res->start = res->end = res->flags = 0;
 747	return 0;
 748}
 749
 750/*
 751 * Allocate the bridge mappings for the device..
 752 */
 753static void yenta_allocate_resources(struct yenta_socket *socket)
 754{
 755	int program = 0;
 756	program += yenta_allocate_res(socket, 0, IORESOURCE_IO,
 757			   PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
 758	program += yenta_allocate_res(socket, 1, IORESOURCE_IO,
 759			   PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
 760	program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
 761			   PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
 762	program += yenta_allocate_res(socket, 3, IORESOURCE_MEM,
 763			   PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
 764	if (program)
 765		pci_setup_cardbus(socket->dev->subordinate);
 766}
 767
 768
 769/*
 770 * Free the bridge mappings for the device..
 771 */
 772static void yenta_free_resources(struct yenta_socket *socket)
 773{
 774	int i;
 775	for (i = 0; i < 4; i++) {
 776		struct resource *res;
 777		res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
 778		if (res->start != 0 && res->end != 0)
 779			release_resource(res);
 780		res->start = res->end = res->flags = 0;
 781	}
 782}
 783
 784
 785/*
 786 * Close it down - release our resources and go home..
 787 */
 788static void __devexit yenta_close(struct pci_dev *dev)
 789{
 790	struct yenta_socket *sock = pci_get_drvdata(dev);
 791
 792	/* Remove the register attributes */
 793	device_remove_file(&dev->dev, &dev_attr_yenta_registers);
 794
 795	/* we don't want a dying socket registered */
 796	pcmcia_unregister_socket(&sock->socket);
 797
 798	/* Disable all events so we don't die in an IRQ storm */
 799	cb_writel(sock, CB_SOCKET_MASK, 0x0);
 800	exca_writeb(sock, I365_CSCINT, 0);
 801
 802	if (sock->cb_irq)
 803		free_irq(sock->cb_irq, sock);
 804	else
 805		del_timer_sync(&sock->poll_timer);
 806
 807	if (sock->base)
 808		iounmap(sock->base);
 809	yenta_free_resources(sock);
 810
 811	pci_release_regions(dev);
 812	pci_disable_device(dev);
 813	pci_set_drvdata(dev, NULL);
 814}
 815
 816
 817static struct pccard_operations yenta_socket_operations = {
 818	.init			= yenta_sock_init,
 819	.suspend		= yenta_sock_suspend,
 820	.get_status		= yenta_get_status,
 821	.set_socket		= yenta_set_socket,
 822	.set_io_map		= yenta_set_io_map,
 823	.set_mem_map		= yenta_set_mem_map,
 824};
 825
 826
 827#ifdef CONFIG_YENTA_TI
 828#include "ti113x.h"
 829#endif
 830#ifdef CONFIG_YENTA_RICOH
 831#include "ricoh.h"
 832#endif
 833#ifdef CONFIG_YENTA_TOSHIBA
 834#include "topic.h"
 835#endif
 836#ifdef CONFIG_YENTA_O2
 837#include "o2micro.h"
 838#endif
 839
 840enum {
 841	CARDBUS_TYPE_DEFAULT = -1,
 842	CARDBUS_TYPE_TI,
 843	CARDBUS_TYPE_TI113X,
 844	CARDBUS_TYPE_TI12XX,
 845	CARDBUS_TYPE_TI1250,
 846	CARDBUS_TYPE_RICOH,
 847	CARDBUS_TYPE_TOPIC95,
 848	CARDBUS_TYPE_TOPIC97,
 849	CARDBUS_TYPE_O2MICRO,
 850	CARDBUS_TYPE_ENE,
 851};
 852
 853/*
 854 * Different cardbus controllers have slightly different
 855 * initialization sequences etc details. List them here..
 856 */
 857static struct cardbus_type cardbus_type[] = {
 858#ifdef CONFIG_YENTA_TI
 859	[CARDBUS_TYPE_TI]	= {
 860		.override	= ti_override,
 861		.save_state	= ti_save_state,
 862		.restore_state	= ti_restore_state,
 863		.sock_init	= ti_init,
 864	},
 865	[CARDBUS_TYPE_TI113X]	= {
 866		.override	= ti113x_override,
 867		.save_state	= ti_save_state,
 868		.restore_state	= ti_restore_state,
 869		.sock_init	= ti_init,
 870	},
 871	[CARDBUS_TYPE_TI12XX]	= {
 872		.override	= ti12xx_override,
 873		.save_state	= ti_save_state,
 874		.restore_state	= ti_restore_state,
 875		.sock_init	= ti_init,
 876	},
 877	[CARDBUS_TYPE_TI1250]	= {
 878		.override	= ti1250_override,
 879		.save_state	= ti_save_state,
 880		.restore_state	= ti_restore_state,
 881		.sock_init	= ti_init,
 882	},
 883#endif
 884#ifdef CONFIG_YENTA_RICOH
 885	[CARDBUS_TYPE_RICOH]	= {
 886		.override	= ricoh_override,
 887		.save_state	= ricoh_save_state,
 888		.restore_state	= ricoh_restore_state,
 889	},
 890#endif
 891#ifdef CONFIG_YENTA_TOSHIBA
 892	[CARDBUS_TYPE_TOPIC95]	= {
 893		.override	= topic95_override,
 894	},
 895	[CARDBUS_TYPE_TOPIC97]	= {
 896		.override	= topic97_override,
 897	},
 898#endif
 899#ifdef CONFIG_YENTA_O2
 900	[CARDBUS_TYPE_O2MICRO]	= {
 901		.override	= o2micro_override,
 902		.restore_state	= o2micro_restore_state,
 903	},
 904#endif
 905#ifdef CONFIG_YENTA_TI
 906	[CARDBUS_TYPE_ENE]	= {
 907		.override	= ene_override,
 908		.save_state	= ti_save_state,
 909		.restore_state	= ti_restore_state,
 910		.sock_init	= ti_init,
 911	},
 912#endif
 913};
 914
 915
 916static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
 917{
 918	int i;
 919	unsigned long val;
 920	u32 mask;
 921	u8 reg;
 922
 923	/*
 924	 * Probe for usable interrupts using the force
 925	 * register to generate bogus card status events.
 926	 */
 927	cb_writel(socket, CB_SOCKET_EVENT, -1);
 928	cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
 929	reg = exca_readb(socket, I365_CSCINT);
 930	exca_writeb(socket, I365_CSCINT, 0);
 931	val = probe_irq_on() & isa_irq_mask;
 932	for (i = 1; i < 16; i++) {
 933		if (!((val >> i) & 1))
 934			continue;
 935		exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
 936		cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
 937		udelay(100);
 938		cb_writel(socket, CB_SOCKET_EVENT, -1);
 939	}
 940	cb_writel(socket, CB_SOCKET_MASK, 0);
 941	exca_writeb(socket, I365_CSCINT, reg);
 942
 943	mask = probe_irq_mask(val) & 0xffff;
 944
 945	return mask;
 946}
 947
 948
 949/*
 950 * yenta PCI irq probing.
 951 * currently only used in the TI/EnE initialization code
 952 */
 953#ifdef CONFIG_YENTA_TI
 954
 955/* interrupt handler, only used during probing */
 956static irqreturn_t yenta_probe_handler(int irq, void *dev_id)
 957{
 958	struct yenta_socket *socket = (struct yenta_socket *) dev_id;
 959	u8 csc;
 960	u32 cb_event;
 961
 962	/* Clear interrupt status for the event */
 963	cb_event = cb_readl(socket, CB_SOCKET_EVENT);
 964	cb_writel(socket, CB_SOCKET_EVENT, -1);
 965	csc = exca_readb(socket, I365_CSC);
 966
 967	if (cb_event || csc) {
 968		socket->probe_status = 1;
 969		return IRQ_HANDLED;
 970	}
 971
 972	return IRQ_NONE;
 973}
 974
 975/* probes the PCI interrupt, use only on override functions */
 976static int yenta_probe_cb_irq(struct yenta_socket *socket)
 977{
 978	u8 reg = 0;
 979
 980	if (!socket->cb_irq)
 981		return -1;
 982
 983	socket->probe_status = 0;
 984
 985	if (request_irq(socket->cb_irq, yenta_probe_handler, IRQF_SHARED, "yenta", socket)) {
 986		dev_printk(KERN_WARNING, &socket->dev->dev,
 987			   "request_irq() in yenta_probe_cb_irq() failed!\n");
 988		return -1;
 989	}
 990
 991	/* generate interrupt, wait */
 992	if (!socket->dev->irq)
 993		reg = exca_readb(socket, I365_CSCINT);
 994	exca_writeb(socket, I365_CSCINT, reg | I365_CSC_STSCHG);
 995	cb_writel(socket, CB_SOCKET_EVENT, -1);
 996	cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
 997	cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
 998
 999	msleep(100);
1000
1001	/* disable interrupts */
1002	cb_writel(socket, CB_SOCKET_MASK, 0);
1003	exca_writeb(socket, I365_CSCINT, reg);
1004	cb_writel(socket, CB_SOCKET_EVENT, -1);
1005	exca_readb(socket, I365_CSC);
1006
1007	free_irq(socket->cb_irq, socket);
1008
1009	return (int) socket->probe_status;
1010}
1011
1012#endif /* CONFIG_YENTA_TI */
1013
1014
1015/*
1016 * Set static data that doesn't need re-initializing..
1017 */
1018static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
1019{
1020	socket->socket.pci_irq = socket->cb_irq;
1021	if (isa_probe)
1022		socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
1023	else
1024		socket->socket.irq_mask = 0;
1025
1026	dev_printk(KERN_INFO, &socket->dev->dev,
1027		   "ISA IRQ mask 0x%04x, PCI irq %d\n",
1028		   socket->socket.irq_mask, socket->cb_irq);
1029}
1030
1031/*
1032 * Initialize the standard cardbus registers
1033 */
1034static void yenta_config_init(struct yenta_socket *socket)
1035{
1036	u16 bridge;
1037	struct pci_dev *dev = socket->dev;
1038	struct pci_bus_region region;
1039
1040	pcibios_resource_to_bus(socket->dev, &region, &dev->resource[0]);
1041
1042	config_writel(socket, CB_LEGACY_MODE_BASE, 0);
1043	config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
1044	config_writew(socket, PCI_COMMAND,
1045			PCI_COMMAND_IO |
1046			PCI_COMMAND_MEMORY |
1047			PCI_COMMAND_MASTER |
1048			PCI_COMMAND_WAIT);
1049
1050	/* MAGIC NUMBERS! Fixme */
1051	config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1052	config_writeb(socket, PCI_LATENCY_TIMER, 168);
1053	config_writel(socket, PCI_PRIMARY_BUS,
1054		(176 << 24) |			   /* sec. latency timer */
1055		(dev->subordinate->subordinate << 16) | /* subordinate bus */
1056		(dev->subordinate->secondary << 8) |  /* secondary bus */
1057		dev->subordinate->primary);		   /* primary bus */
1058
1059	/*
1060	 * Set up the bridging state:
1061	 *  - enable write posting.
1062	 *  - memory window 0 prefetchable, window 1 non-prefetchable
1063	 *  - PCI interrupts enabled if a PCI interrupt exists..
1064	 */
1065	bridge = config_readw(socket, CB_BRIDGE_CONTROL);
1066	bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1067	bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN;
1068	config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1069}
1070
1071/**
1072 * yenta_fixup_parent_bridge - Fix subordinate bus# of the parent bridge
1073 * @cardbus_bridge: The PCI bus which the CardBus bridge bridges to
1074 *
1075 * Checks if devices on the bus which the CardBus bridge bridges to would be
1076 * invisible during PCI scans because of a misconfigured subordinate number
1077 * of the parent brige - some BIOSes seem to be too lazy to set it right.
1078 * Does the fixup carefully by checking how far it can go without conflicts.
1079 * See http\://bugzilla.kernel.org/show_bug.cgi?id=2944 for more information.
1080 */
1081static void yenta_fixup_parent_bridge(struct pci_bus *cardbus_bridge)
1082{
1083	struct list_head *tmp;
1084	unsigned char upper_limit;
1085	/*
1086	 * We only check and fix the parent bridge: All systems which need
1087	 * this fixup that have been reviewed are laptops and the only bridge
1088	 * which needed fixing was the parent bridge of the CardBus bridge:
1089	 */
1090	struct pci_bus *bridge_to_fix = cardbus_bridge->parent;
1091
1092	/* Check bus numbers are already set up correctly: */
1093	if (bridge_to_fix->subordinate >= cardbus_bridge->subordinate)
1094		return; /* The subordinate number is ok, nothing to do */
1095
1096	if (!bridge_to_fix->parent)
1097		return; /* Root bridges are ok */
1098
1099	/* stay within the limits of the bus range of the parent: */
1100	upper_limit = bridge_to_fix->parent->subordinate;
1101
1102	/* check the bus ranges of all silbling bridges to prevent overlap */
1103	list_for_each(tmp, &bridge_to_fix->parent->children) {
1104		struct pci_bus *silbling = pci_bus_b(tmp);
1105		/*
1106		 * If the silbling has a higher secondary bus number
1107		 * and it's secondary is equal or smaller than our
1108		 * current upper limit, set the new upper limit to
1109		 * the bus number below the silbling's range:
1110		 */
1111		if (silbling->secondary > bridge_to_fix->subordinate
1112		    && silbling->secondary <= upper_limit)
1113			upper_limit = silbling->secondary - 1;
1114	}
1115
1116	/* Show that the wanted subordinate number is not possible: */
1117	if (cardbus_bridge->subordinate > upper_limit)
1118		dev_printk(KERN_WARNING, &cardbus_bridge->dev,
1119			   "Upper limit for fixing this "
1120			   "bridge's parent bridge: #%02x\n", upper_limit);
1121
1122	/* If we have room to increase the bridge's subordinate number, */
1123	if (bridge_to_fix->subordinate < upper_limit) {
1124
1125		/* use the highest number of the hidden bus, within limits */
1126		unsigned char subordinate_to_assign =
1127			min(cardbus_bridge->subordinate, upper_limit);
1128
1129		dev_printk(KERN_INFO, &bridge_to_fix->dev,
1130			   "Raising subordinate bus# of parent "
1131			   "bus (#%02x) from #%02x to #%02x\n",
1132			   bridge_to_fix->number,
1133			   bridge_to_fix->subordinate, subordinate_to_assign);
1134
1135		/* Save the new subordinate in the bus struct of the bridge */
1136		bridge_to_fix->subordinate = subordinate_to_assign;
1137
1138		/* and update the PCI config space with the new subordinate */
1139		pci_write_config_byte(bridge_to_fix->self,
1140			PCI_SUBORDINATE_BUS, bridge_to_fix->subordinate);
1141	}
1142}
1143
1144/*
1145 * Initialize a cardbus controller. Make sure we have a usable
1146 * interrupt, and that we can map the cardbus area. Fill in the
1147 * socket information structure..
1148 */
1149static int __devinit yenta_probe(struct pci_dev *dev, const struct pci_device_id *id)
1150{
1151	struct yenta_socket *socket;
1152	int ret;
1153
1154	/*
1155	 * If we failed to assign proper bus numbers for this cardbus
1156	 * controller during PCI probe, its subordinate pci_bus is NULL.
1157	 * Bail out if so.
1158	 */
1159	if (!dev->subordinate) {
1160		dev_printk(KERN_ERR, &dev->dev, "no bus associated! "
1161			   "(try 'pci=assign-busses')\n");
1162		return -ENODEV;
1163	}
1164
1165	socket = kzalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1166	if (!socket)
1167		return -ENOMEM;
1168
1169	/* prepare pcmcia_socket */
1170	socket->socket.ops = &yenta_socket_operations;
1171	socket->socket.resource_ops = &pccard_nonstatic_ops;
1172	socket->socket.dev.parent = &dev->dev;
1173	socket->socket.driver_data = socket;
1174	socket->socket.owner = THIS_MODULE;
1175	socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1176	socket->socket.map_size = 0x1000;
1177	socket->socket.cb_dev = dev;
1178
1179	/* prepare struct yenta_socket */
1180	socket->dev = dev;
1181	pci_set_drvdata(dev, socket);
1182
1183	/*
1184	 * Do some basic sanity checking..
1185	 */
1186	if (pci_enable_device(dev)) {
1187		ret = -EBUSY;
1188		goto free;
1189	}
1190
1191	ret = pci_request_regions(dev, "yenta_socket");
1192	if (ret)
1193		goto disable;
1194
1195	if (!pci_resource_start(dev, 0)) {
1196		dev_printk(KERN_ERR, &dev->dev, "No cardbus resource!\n");
1197		ret = -ENODEV;
1198		goto release;
1199	}
1200
1201	/*
1202	 * Ok, start setup.. Map the cardbus registers,
1203	 * and request the IRQ.
1204	 */
1205	socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1206	if (!socket->base) {
1207		ret = -ENOMEM;
1208		goto release;
1209	}
1210
1211	/*
1212	 * report the subsystem vendor and device for help debugging
1213	 * the irq stuff...
1214	 */
1215	dev_printk(KERN_INFO, &dev->dev, "CardBus bridge found [%04x:%04x]\n",
1216		   dev->subsystem_vendor, dev->subsystem_device);
1217
1218	yenta_config_init(socket);
1219
1220	/* Disable all events */
1221	cb_writel(socket, CB_SOCKET_MASK, 0x0);
1222
1223	/* Set up the bridge regions.. */
1224	yenta_allocate_resources(socket);
1225
1226	socket->cb_irq = dev->irq;
1227
1228	/* Do we have special options for the device? */
1229	if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1230	    id->driver_data < ARRAY_SIZE(cardbus_type)) {
1231		socket->type = &cardbus_type[id->driver_data];
1232
1233		ret = socket->type->override(socket);
1234		if (ret < 0)
1235			goto unmap;
1236	}
1237
1238	/* We must finish initialization here */
1239
1240	if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, IRQF_SHARED, "yenta", socket)) {
1241		/* No IRQ or request_irq failed. Poll */
1242		socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1243		init_timer(&socket->poll_timer);
1244		socket->poll_timer.function = yenta_interrupt_wrapper;
1245		socket->poll_timer.data = (unsigned long)socket;
1246		socket->poll_timer.expires = jiffies + HZ;
1247		add_timer(&socket->poll_timer);
1248		dev_printk(KERN_INFO, &dev->dev,
1249			   "no PCI IRQ, CardBus support disabled for this "
1250			   "socket.\n");
1251		dev_printk(KERN_INFO, &dev->dev,
1252			   "check your BIOS CardBus, BIOS IRQ or ACPI "
1253			   "settings.\n");
1254	} else {
1255		socket->socket.features |= SS_CAP_CARDBUS;
1256	}
1257
1258	/* Figure out what the dang thing can do for the PCMCIA layer... */
1259	yenta_interrogate(socket);
1260	yenta_get_socket_capabilities(socket, isa_interrupts);
1261	dev_printk(KERN_INFO, &dev->dev,
1262		   "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
1263
1264	yenta_fixup_parent_bridge(dev->subordinate);
1265
1266	/* Register it with the pcmcia layer.. */
1267	ret = pcmcia_register_socket(&socket->socket);
1268	if (ret == 0) {
1269		/* Add the yenta register attributes */
1270		ret = device_create_file(&dev->dev, &dev_attr_yenta_registers);
1271		if (ret == 0)
1272			goto out;
1273
1274		/* error path... */
1275		pcmcia_unregister_socket(&socket->socket);
1276	}
1277
1278 unmap:
1279	iounmap(socket->base);
1280 release:
1281	pci_release_regions(dev);
1282 disable:
1283	pci_disable_device(dev);
1284 free:
1285	kfree(socket);
1286 out:
1287	return ret;
1288}
1289
1290#ifdef CONFIG_PM
1291static int yenta_dev_suspend_noirq(struct device *dev)
1292{
1293	struct pci_dev *pdev = to_pci_dev(dev);
1294	struct yenta_socket *socket = pci_get_drvdata(pdev);
1295
1296	if (!socket)
1297		return 0;
1298
1299	if (socket->type && socket->type->save_state)
1300		socket->type->save_state(socket);
1301
1302	pci_save_state(pdev);
1303	pci_read_config_dword(pdev, 16*4, &socket->saved_state[0]);
1304	pci_read_config_dword(pdev, 17*4, &socket->saved_state[1]);
1305	pci_disable_device(pdev);
1306
1307	/*
1308	 * Some laptops (IBM T22) do not like us putting the Cardbus
1309	 * bridge into D3.  At a guess, some other laptop will
1310	 * probably require this, so leave it commented out for now.
1311	 */
1312	/* pci_set_power_state(dev, 3); */
1313
1314	return 0;
1315}
1316
1317static int yenta_dev_resume_noirq(struct device *dev)
1318{
1319	struct pci_dev *pdev = to_pci_dev(dev);
1320	struct yenta_socket *socket = pci_get_drvdata(pdev);
1321	int ret;
1322
1323	if (!socket)
1324		return 0;
1325
1326	pci_write_config_dword(pdev, 16*4, socket->saved_state[0]);
1327	pci_write_config_dword(pdev, 17*4, socket->saved_state[1]);
1328
1329	ret = pci_enable_device(pdev);
1330	if (ret)
1331		return ret;
1332
1333	pci_set_master(pdev);
1334
1335	if (socket->type && socket->type->restore_state)
1336		socket->type->restore_state(socket);
1337
1338	return 0;
1339}
1340
1341static const struct dev_pm_ops yenta_pm_ops = {
1342	.suspend_noirq = yenta_dev_suspend_noirq,
1343	.resume_noirq = yenta_dev_resume_noirq,
1344	.freeze_noirq = yenta_dev_suspend_noirq,
1345	.thaw_noirq = yenta_dev_resume_noirq,
1346	.poweroff_noirq = yenta_dev_suspend_noirq,
1347	.restore_noirq = yenta_dev_resume_noirq,
1348};
1349
1350#define YENTA_PM_OPS	(&yenta_pm_ops)
1351#else
1352#define YENTA_PM_OPS	NULL
1353#endif
1354
1355#define CB_ID(vend, dev, type)				\
1356	{						\
1357		.vendor		= vend,			\
1358		.device		= dev,			\
1359		.subvendor	= PCI_ANY_ID,		\
1360		.subdevice	= PCI_ANY_ID,		\
1361		.class		= PCI_CLASS_BRIDGE_CARDBUS << 8, \
1362		.class_mask	= ~0,			\
1363		.driver_data	= CARDBUS_TYPE_##type,	\
1364	}
1365
1366static struct pci_device_id yenta_table[] = {
1367	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1368
1369	/*
1370	 * TBD: Check if these TI variants can use more
1371	 * advanced overrides instead.  (I can't get the
1372	 * data sheets for these devices. --rmk)
1373	 */
1374#ifdef CONFIG_YENTA_TI
1375	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1376
1377	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1378	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1379
1380	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1381	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1382	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1383	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1384	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1385	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1386	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1387	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1388	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1389	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1390	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1391	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1392	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1393	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1394	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1395	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1396	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1397
1398	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1399	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1400
1401	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX21_XX11, TI12XX),
1402	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X515, TI12XX),
1403	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XX12, TI12XX),
1404	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X420, TI12XX),
1405	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_X620, TI12XX),
1406	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7410, TI12XX),
1407	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7510, TI12XX),
1408	CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_7610, TI12XX),
1409
1410	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_710, ENE),
1411	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_712, ENE),
1412	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_720, ENE),
1413	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_722, ENE),
1414	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, ENE),
1415	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, ENE),
1416	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, ENE),
1417	CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, ENE),
1418#endif /* CONFIG_YENTA_TI */
1419
1420#ifdef CONFIG_YENTA_RICOH
1421	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1422	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1423	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1424	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1425	CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1426#endif
1427
1428#ifdef CONFIG_YENTA_TOSHIBA
1429	CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1430	CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1431	CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1432#endif
1433
1434#ifdef CONFIG_YENTA_O2
1435	CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1436#endif
1437
1438	/* match any cardbus bridge */
1439	CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1440	{ /* all zeroes */ }
1441};
1442MODULE_DEVICE_TABLE(pci, yenta_table);
1443
1444
1445static struct pci_driver yenta_cardbus_driver = {
1446	.name		= "yenta_cardbus",
1447	.id_table	= yenta_table,
1448	.probe		= yenta_probe,
1449	.remove		= __devexit_p(yenta_close),
1450	.driver.pm	= YENTA_PM_OPS,
1451};
1452
1453
1454static int __init yenta_socket_init(void)
1455{
1456	return pci_register_driver(&yenta_cardbus_driver);
1457}
1458
1459
1460static void __exit yenta_socket_exit(void)
1461{
1462	pci_unregister_driver(&yenta_cardbus_driver);
1463}
1464
1465
1466module_init(yenta_socket_init);
1467module_exit(yenta_socket_exit);
1468
1469MODULE_LICENSE("GPL");