/dts/arm/st/l4/stm32l4r5.dtsi

https://github.com/methodpark/zephyr · Device Tree · 235 lines · 204 code · 26 blank · 5 comment · 0 complexity · 8772ee41102a3421dd9d8ed01cc81ccd MD5 · raw file 

    

  1. /*
    2. 

  2.  * Copyright (c) 2018 Pushpal Sidhu
    3. 

  3.  *
    4. 

  4.  * SPDX-License-Identifier: Apache-2.0
    5. 

  5.  */
    6. 

  6. 

  7. #include <mem.h>
    8. 

  8. #include <st/l4/stm32l4.dtsi>
    9. 

  9. 

  10. / {
    11. 

  11. 	sram0: memory@20000000 {
    12. 

  12. 		reg = <0x20000000 DT_SIZE_K(640)>;
    13. 

  13. 	};
    14. 

  14. 

  15. 	soc {
    16. 

  16. 		flash-controller@40022000 {
    17. 

  17. 			flash0: flash@8000000 {
    18. 

  18. 				erase-block-size = <4096>;
    19. 

  19. 			};
    20. 

  20. 		};
    21. 

  21. 

  22. 		pinctrl: pin-controller@48000000 {
    23. 

  23. 			gpiod: gpio@48000c00 {
    24. 

  24. 				compatible = "st,stm32-gpio";
    25. 

  25. 				gpio-controller;
    26. 

  26. 				#gpio-cells = <2>;
    27. 

  27. 				reg = <0x48000c00 0x400>;
    28. 

  28. 				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000008>;
    29. 

  29. 				label = "GPIOD";
    30. 

  30. 			};
    31. 

  31. 

  32. 			gpioe: gpio@48001000 {
    33. 

  33. 				compatible = "st,stm32-gpio";
    34. 

  34. 				gpio-controller;
    35. 

  35. 				#gpio-cells = <2>;
    36. 

  36. 				reg = <0x48001000 0x400>;
    37. 

  37. 				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000010>;
    38. 

  38. 				label = "GPIOE";
    39. 

  39. 			};
    40. 

  40. 

  41. 			gpiof: gpio@48001400 {
    42. 

  42. 				compatible = "st,stm32-gpio";
    43. 

  43. 				gpio-controller;
    44. 

  44. 				#gpio-cells = <2>;
    45. 

  45. 				reg = <0x48001400 0x400>;
    46. 

  46. 				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000020>;
    47. 

  47. 				label = "GPIOF";
    48. 

  48. 			};
    49. 

  49. 

  50. 			gpiog: gpio@48001800 {
    51. 

  51. 				compatible = "st,stm32-gpio";
    52. 

  52. 				gpio-controller;
    53. 

  53. 				#gpio-cells = <2>;
    54. 

  54. 				reg = <0x48001800 0x400>;
    55. 

  55. 				clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>;
    56. 

  56. 				label = "GPIOG";
    57. 

  57. 			};
    58. 

  58. 		};
    59. 

  59. 

  60. 		usart3: serial@40004800 {
    61. 

  61. 			compatible = "st,stm32-usart", "st,stm32-uart";
    62. 

  62. 			reg = <0x40004800 0x400>;
    63. 

  63. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
    64. 

  64. 			interrupts = <39 0>;
    65. 

  65. 			status = "disabled";
    66. 

  66. 			label = "UART_3";
    67. 

  67. 		};
    68. 

  68. 

  69. 		uart4: serial@40004c00 {
    70. 

  70. 			compatible = "st,stm32-uart";
    71. 

  71. 			reg = <0x40004c00 0x400>;
    72. 

  72. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
    73. 

  73. 			interrupts = <52 0>;
    74. 

  74. 			status = "disabled";
    75. 

  75. 			label = "UART_4";
    76. 

  76. 		};
    77. 

  77. 

  78. 		uart5: serial@40005000 {
    79. 

  79. 			compatible = "st,stm32-uart";
    80. 

  80. 			reg = <0x40005000 0x400>;
    81. 

  81. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
    82. 

  82. 			interrupts = <53 0>;
    83. 

  83. 			status = "disabled";
    84. 

  84. 			label = "UART_5";
    85. 

  85. 		};
    86. 

  86. 

  87. 		i2c2: i2c@40005800 {
    88. 

  88. 			compatible = "st,stm32-i2c-v2";
    89. 

  89. 			clock-frequency = <I2C_BITRATE_STANDARD>;
    90. 

  90. 			#address-cells = <1>;
    91. 

  91. 			#size-cells = <0>;
    92. 

  92. 			reg = <0x40005800 0x400>;
    93. 

  93. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
    94. 

  94. 			interrupts = <33 0>, <34 0>;
    95. 

  95. 			interrupt-names = "event", "error";
    96. 

  96. 			status = "disabled";
    97. 

  97. 			label= "I2C_2";
    98. 

  98. 		};
    99. 

  99. 

  100. 		i2c4: i2c@40008400 {
    101. 

  101. 			compatible = "st,stm32-i2c-v2";
    102. 

  102. 			clock-frequency = <I2C_BITRATE_STANDARD>;
    103. 

  103. 			#address-cells = <1>;
    104. 

  104. 			#size-cells = <0>;
    105. 

  105. 			reg = <0x40008400 0x400>;
    106. 

  106. 			clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00000002>;
    107. 

  107. 			interrupts = <83 0>, <84 0>;
    108. 

  108. 			interrupt-names = "event", "error";
    109. 

  109. 			status = "disabled";
    110. 

  110. 			label= "I2C_4";
    111. 

  111. 		};
    112. 

  112. 

  113. 		spi2: spi@40003800 {
    114. 

  114. 			compatible = "st,stm32-spi-fifo", "st,stm32-spi";
    115. 

  115. 			#address-cells = <1>;
    116. 

  116. 			#size-cells = <0>;
    117. 

  117. 			reg = <0x40003800 0x400>;
    118. 

  118. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
    119. 

  119. 			interrupts = <36 5>;
    120. 

  120. 			status = "disabled";
    121. 

  121. 			label = "SPI_2";
    122. 

  122. 		};
    123. 

  123. 

  124. 		spi3: spi@40003c00 {
    125. 

  125. 			compatible = "st,stm32-spi-fifo", "st,stm32-spi";
    126. 

  126. 			#address-cells = <1>;
    127. 

  127. 			#size-cells = <0>;
    128. 

  128. 			reg = <0x40003c00 0x400>;
    129. 

  129. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00008000>;
    130. 

  130. 			interrupts = <51 5>;
    131. 

  131. 			status = "disabled";
    132. 

  132. 			label = "SPI_3";
    133. 

  133. 		};
    134. 

  134. 

  135. 		timers3: timers@40000400 {
    136. 

  136. 			compatible = "st,stm32-timers";
    137. 

  137. 			reg = <0x40000400 0x400>;
    138. 

  138. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>;
    139. 

  139. 			status = "disabled";
    140. 

  140. 			label = "TIMERS_3";
    141. 

  141. 

  142. 			pwm {
    143. 

  143. 				compatible = "st,stm32-pwm";
    144. 

  144. 				status = "disabled";
    145. 

  145. 				st,prescaler = <0>;
    146. 

  146. 				label = "PWM_3";
    147. 

  147. 				#pwm-cells = <2>;
    148. 

  148. 			};
    149. 

  149. 		};
    150. 

  150. 

  151. 		timers4: timers@40000800 {
    152. 

  152. 			compatible = "st,stm32-timers";
    153. 

  153. 			reg = <0x40000800 0x400>;
    154. 

  154. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000004>;
    155. 

  155. 			status = "disabled";
    156. 

  156. 			label = "TIMERS_4";
    157. 

  157. 

  158. 			pwm {
    159. 

  159. 				compatible = "st,stm32-pwm";
    160. 

  160. 				status = "disabled";
    161. 

  161. 				st,prescaler = <0>;
    162. 

  162. 				label = "PWM_4";
    163. 

  163. 				#pwm-cells = <2>;
    164. 

  164. 			};
    165. 

  165. 		};
    166. 

  166. 

  167. 		timers5: timers@40000c00 {
    168. 

  168. 			compatible = "st,stm32-timers";
    169. 

  169. 			reg = <0x40000c00 0x400>;
    170. 

  170. 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000008>;
    171. 

  171. 			status = "disabled";
    172. 

  172. 			label = "TIMERS_5";
    173. 

  173. 

  174. 			pwm {
    175. 

  175. 				compatible = "st,stm32-pwm";
    176. 

  176. 				status = "disabled";
    177. 

  177. 				st,prescaler = <0>;
    178. 

  178. 				label = "PWM_5";
    179. 

  179. 				#pwm-cells = <2>;
    180. 

  180. 			};
    181. 

  181. 		};
    182. 

  182. 

  183. 		timers8: timers@40013400 {
    184. 

  184. 			compatible = "st,stm32-timers";
    185. 

  185. 			reg = <0x40013400 0x400>;
    186. 

  186. 			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00002000>;
    187. 

  187. 			status = "disabled";
    188. 

  188. 			label = "TIMERS_8";
    189. 

  189. 

  190. 			pwm {
    191. 

  191. 				compatible = "st,stm32-pwm";
    192. 

  192. 				status = "disabled";
    193. 

  193. 				st,prescaler = <10000>;
    194. 

  194. 				label = "PWM_8";
    195. 

  195. 				#pwm-cells = <2>;
    196. 

  196. 			};
    197. 

  197. 		};
    198. 

  198. 

  199. 		timers17: timers@40014800 {
    200. 

  200. 			compatible = "st,stm32-timers";
    201. 

  201. 			reg = <0x40014800 0x400>;
    202. 

  202. 			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00040000>;
    203. 

  203. 			status = "disabled";
    204. 

  204. 			label = "TIMERS_17";
    205. 

  205. 

  206. 			pwm {
    207. 

  207. 				compatible = "st,stm32-pwm";
    208. 

  208. 				status = "disabled";
    209. 

  209. 				st,prescaler = <10000>;
    210. 

  210. 				label = "PWM_17";
    211. 

  211. 				#pwm-cells = <2>;
    212. 

  212. 			};
    213. 

  213. 		};
    214. 

  214. 

  215. 		usbotg_fs: otgfs@50000000 {
    216. 

  216. 			compatible = "st,stm32-otgfs";
    217. 

  217. 			reg = <0x50000000 0x40000>;
    218. 

  218. 			interrupts = <67 0>;
    219. 

  219. 			interrupt-names = "otgfs";
    220. 

  220. 			num-bidir-endpoints = <6>;
    221. 

  221. 			ram-size = <1280>;
    222. 

  222. 			maximum-speed = "full-speed";
    223. 

  223. 			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00001000>;
    224. 

  224. 			phys = <&otgfs_phy>;
    225. 

  225. 			status = "disabled";
    226. 

  226. 			label= "OTGFS";
    227. 

  227. 		};
    228. 

  228. 	};
    229. 

  229. 

  230. 	otgfs_phy: otgfs_phy {
    231. 

  231. 		compatible = "usb-nop-xceiv";
    232. 

  232. 		#phy-cells = <0>;
    233. 

  233. 		label = "OTGFS_PHY";
    234. 

  234. 	};
    235. 

  235. };
    236.